
FEB_3211 23.07.25 07:41:18
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07:41:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:41:18:ST3_Shared:INFO: FEB-Microcable 07:41:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:41:18:febtest:INFO: Testing FEB with SN 3211 07:41:19:smx_tester:INFO: Scanning setup 07:41:19:elinks:INFO: Disabling clock on downlink 0 07:41:19:elinks:INFO: Disabling clock on downlink 1 07:41:19:elinks:INFO: Disabling clock on downlink 2 07:41:19:elinks:INFO: Disabling clock on downlink 3 07:41:19:elinks:INFO: Disabling clock on downlink 4 07:41:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:41:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:41:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:41:19:elinks:INFO: Disabling clock on downlink 0 07:41:19:elinks:INFO: Disabling clock on downlink 1 07:41:19:elinks:INFO: Disabling clock on downlink 2 07:41:19:elinks:INFO: Disabling clock on downlink 3 07:41:19:elinks:INFO: Disabling clock on downlink 4 07:41:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:41:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:41:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:41:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:41:20:elinks:INFO: Disabling clock on downlink 0 07:41:20:elinks:INFO: Disabling clock on downlink 1 07:41:20:elinks:INFO: Disabling clock on downlink 2 07:41:20:elinks:INFO: Disabling clock on downlink 3 07:41:20:elinks:INFO: Disabling clock on downlink 4 07:41:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:41:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:41:20:elinks:INFO: Disabling clock on downlink 0 07:41:20:elinks:INFO: Disabling clock on downlink 1 07:41:20:elinks:INFO: Disabling clock on downlink 2 07:41:20:elinks:INFO: Disabling clock on downlink 3 07:41:20:elinks:INFO: Disabling clock on downlink 4 07:41:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:41:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:41:20:elinks:INFO: Disabling clock on downlink 0 07:41:20:elinks:INFO: Disabling clock on downlink 1 07:41:20:elinks:INFO: Disabling clock on downlink 2 07:41:20:elinks:INFO: Disabling clock on downlink 3 07:41:20:elinks:INFO: Disabling clock on downlink 4 07:41:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:41:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:41:20:setup_element:INFO: Scanning clock phase 07:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:41:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:41:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:41:20:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:41:20:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:41:20:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:41:20:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:41:20:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________ Clock Delay: 40 07:41:20:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________ Clock Delay: 40 07:41:20:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:41:20:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:41:20:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 07:41:20:setup_element:INFO: Scanning data phases 07:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:41:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:41:25:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:41:25:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXXXXXXXXXXXXX Data delay found: 11 07:41:25:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___ Data delay found: 14 07:41:25:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX Data delay found: 17 07:41:25:setup_element:INFO: Eye window for uplink 11: XX________________________________XXXXXX Data delay found: 17 07:41:25:setup_element:INFO: Eye window for uplink 12: X__________________________________XXXX_ Data delay found: 17 07:41:25:setup_element:INFO: Eye window for uplink 13: X___________________________________XXXX Data delay found: 18 07:41:25:setup_element:INFO: Eye window for uplink 14: __________________________________XXXXX_ Data delay found: 16 07:41:25:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXXX Data delay found: 16 07:41:25:setup_element:INFO: Setting the data phase to 11 for uplink 8 07:41:25:setup_element:INFO: Setting the data phase to 14 for uplink 9 07:41:25:setup_element:INFO: Setting the data phase to 17 for uplink 10 07:41:25:setup_element:INFO: Setting the data phase to 17 for uplink 11 07:41:25:setup_element:INFO: Setting the data phase to 17 for uplink 12 07:41:25:setup_element:INFO: Setting the data phase to 18 for uplink 13 07:41:25:setup_element:INFO: Setting the data phase to 16 for uplink 14 07:41:25:setup_element:INFO: Setting the data phase to 16 for uplink 15 07:41:25:setup_element:INFO: Beginning SMX ASICs map scan 07:41:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:41:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:41:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:41:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:41:25:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 07:41:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:41:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 07:41:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:41:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:41:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:41:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:41:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:41:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:41:28:setup_element:INFO: Performing Elink synchronization 07:41:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:41:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:41:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:41:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:41:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:41:28:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 07:41:28:febtest:INFO: Init all SMX (CSA): 30 07:41:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:41:36:febtest:INFO: 08-01 | XA-000-09-004-037-009-016-06 | 34.6 | 1171.5 07:41:36:febtest:INFO: 10-03 | XA-000-09-004-037-018-016-08 | 15.6 | 1230.3 07:41:36:febtest:INFO: 12-05 | XA-000-09-004-037-018-017-08 | 21.9 | 1218.6 07:41:37:febtest:INFO: 14-07 | XA-000-09-004-037-015-017-03 | 15.6 | 1230.3 07:41:38:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 07:41:40:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV 07:41:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:40:ST3_smx:INFO: Electrons 07:41:40:ST3_smx:INFO: # loops 0 07:41:41:ST3_smx:INFO: # loops 1 07:41:43:ST3_smx:INFO: # loops 2 07:41:45:ST3_smx:INFO: Total # of broken channels: 0 07:41:45:ST3_smx:INFO: List of broken channels: [] 07:41:45:ST3_smx:INFO: Total # of broken channels: 0 07:41:45:ST3_smx:INFO: List of broken channels: [] 07:41:46:ST3_smx:INFO: chip: 10-3 15.590880 C 1242.040240 mV 07:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:46:ST3_smx:INFO: Electrons 07:41:46:ST3_smx:INFO: # loops 0 07:41:48:ST3_smx:INFO: # loops 1 07:41:49:ST3_smx:INFO: # loops 2 07:41:51:ST3_smx:INFO: Total # of broken channels: 0 07:41:51:ST3_smx:INFO: List of broken channels: [] 07:41:51:ST3_smx:INFO: Total # of broken channels: 0 07:41:51:ST3_smx:INFO: List of broken channels: [] 07:41:53:ST3_smx:INFO: chip: 12-5 21.902970 C 1230.330540 mV 07:41:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:53:ST3_smx:INFO: Electrons 07:41:53:ST3_smx:INFO: # loops 0 07:41:54:ST3_smx:INFO: # loops 1 07:41:56:ST3_smx:INFO: # loops 2 07:41:58:ST3_smx:INFO: Total # of broken channels: 0 07:41:58:ST3_smx:INFO: List of broken channels: [] 07:41:58:ST3_smx:INFO: Total # of broken channels: 0 07:41:58:ST3_smx:INFO: List of broken channels: [] 07:41:59:ST3_smx:INFO: chip: 14-7 15.590880 C 1242.040240 mV 07:41:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:41:59:ST3_smx:INFO: Electrons 07:41:59:ST3_smx:INFO: # loops 0 07:42:01:ST3_smx:INFO: # loops 1 07:42:02:ST3_smx:INFO: # loops 2 07:42:04:ST3_smx:INFO: Total # of broken channels: 0 07:42:04:ST3_smx:INFO: List of broken channels: [] 07:42:04:ST3_smx:INFO: Total # of broken channels: 0 07:42:04:ST3_smx:INFO: List of broken channels: [] 07:42:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:42:05:febtest:INFO: 08-01 | XA-000-09-004-037-009-016-06 | 34.6 | 1206.9 07:42:05:febtest:INFO: 10-03 | XA-000-09-004-037-018-016-08 | 15.6 | 1271.2 07:42:05:febtest:INFO: 12-05 | XA-000-09-004-037-018-017-08 | 21.9 | 1253.7 07:42:05:febtest:INFO: 14-07 | XA-000-09-004-037-015-017-03 | 15.6 | 1265.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_23-07_41_18 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3211| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7812', '1.850', '1.0650', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '0.9970', '1.850', '1.0840', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9942', '1.850', '0.2639', '0.000', '0.0000', '0.000', '0.0000']