Return Icon Go Back
GSI
KIT
Previous FEB
Previous test
Next test
Previous FEB
LDO/GSI
LDO/KIT

FEB_3212    11.02.25 08:50:11

link: XA-000-09-004-002-007-016-02
SMX_1
...SMX_1.root
link: XA-000-09-004-002-010-016-05
SMX_3
...SMX_3.root
link: XA-000-09-004-002-010-017-05
SMX_5
...SMX_5.root
link: XA-000-09-004-002-007-017-02
SMX_7
...SMX_7.root
link: XA-000-09-004-002-007-010-05
SMX_0
...SMX_0.root
link: XA-000-09-004-002-007-013-05
SMX_2
...SMX_2.root
link: XA-000-09-004-002-010-011-02
SMX_4
...SMX_4.root
link: XA-000-09-004-002-010-010-02
SMX_6
...SMX_6.root
link: XA-000-09-004-002-010-010-02
VddmCSAstatus.png
...VddmCSAstatus.root
TextEdit.txt 
            08:50:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:50:12:ST3_Shared:INFO:	                       FEB-Microcable                       
08:50:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:50:12:febtest:INFO:	Testing FEB with SN 3212
08:50:13:smx_tester:INFO:	Scanning setup
08:50:13:elinks:INFO:	Disabling clock on downlink 0
08:50:13:elinks:INFO:	Disabling clock on downlink 1
08:50:13:elinks:INFO:	Disabling clock on downlink 2
08:50:13:elinks:INFO:	Disabling clock on downlink 3
08:50:13:elinks:INFO:	Disabling clock on downlink 4
08:50:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:50:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:50:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:50:13:elinks:INFO:	Disabling clock on downlink 0
08:50:13:elinks:INFO:	Disabling clock on downlink 1
08:50:13:elinks:INFO:	Disabling clock on downlink 2
08:50:13:elinks:INFO:	Disabling clock on downlink 3
08:50:13:elinks:INFO:	Disabling clock on downlink 4
08:50:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:50:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:50:13:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:50:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:50:13:elinks:INFO:	Disabling clock on downlink 0
08:50:13:elinks:INFO:	Disabling clock on downlink 1
08:50:13:elinks:INFO:	Disabling clock on downlink 2
08:50:13:elinks:INFO:	Disabling clock on downlink 3
08:50:13:elinks:INFO:	Disabling clock on downlink 4
08:50:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:50:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:50:14:elinks:INFO:	Disabling clock on downlink 0
08:50:14:elinks:INFO:	Disabling clock on downlink 1
08:50:14:elinks:INFO:	Disabling clock on downlink 2
08:50:14:elinks:INFO:	Disabling clock on downlink 3
08:50:14:elinks:INFO:	Disabling clock on downlink 4
08:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:50:14:elinks:INFO:	Disabling clock on downlink 0
08:50:14:elinks:INFO:	Disabling clock on downlink 1
08:50:14:elinks:INFO:	Disabling clock on downlink 2
08:50:14:elinks:INFO:	Disabling clock on downlink 3
08:50:14:elinks:INFO:	Disabling clock on downlink 4
08:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:50:14:setup_element:INFO:	Scanning clock phase
08:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:50:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:50:14:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:50:14:setup_element:INFO:	Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
08:50:14:setup_element:INFO:	Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
08:50:14:setup_element:INFO:	Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:50:14:setup_element:INFO:	Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:50:14:setup_element:INFO:	Eye window for uplink 4 : __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 5 : __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:50:14:setup_element:INFO:	Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:50:14:setup_element:INFO:	Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 12: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 13: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:50:14:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 1
08:50:14:setup_element:INFO:	Scanning data phases
08:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:50:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:50:19:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:50:19:setup_element:INFO:	Eye window for uplink 0 : ___________XXXX_________________________
Data delay found: 32
08:50:19:setup_element:INFO:	Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
08:50:19:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
08:50:19:setup_element:INFO:	Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
08:50:19:setup_element:INFO:	Eye window for uplink 4 : ___XXXXX________________________________
Data delay found: 25
08:50:19:setup_element:INFO:	Eye window for uplink 5 : XXXX___________________________________X
Data delay found: 21
08:50:19:setup_element:INFO:	Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
08:50:19:setup_element:INFO:	Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
08:50:19:setup_element:INFO:	Eye window for uplink 8 : _______________________XXXXX____________
Data delay found: 5
08:50:19:setup_element:INFO:	Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
08:50:19:setup_element:INFO:	Eye window for uplink 10: ________________________XXXXXX__________
Data delay found: 6
08:50:19:setup_element:INFO:	Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
08:50:19:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
08:50:19:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXX_______
Data delay found: 10
08:50:19:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
08:50:19:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
08:50:19:setup_element:INFO:	Setting the data phase to 32 for uplink 0
08:50:19:setup_element:INFO:	Setting the data phase to 28 for uplink 1
08:50:19:setup_element:INFO:	Setting the data phase to 29 for uplink 2
08:50:19:setup_element:INFO:	Setting the data phase to 25 for uplink 3
08:50:19:setup_element:INFO:	Setting the data phase to 25 for uplink 4
08:50:19:setup_element:INFO:	Setting the data phase to 21 for uplink 5
08:50:19:setup_element:INFO:	Setting the data phase to 19 for uplink 6
08:50:19:setup_element:INFO:	Setting the data phase to 15 for uplink 7
08:50:19:setup_element:INFO:	Setting the data phase to 5 for uplink 8
08:50:19:setup_element:INFO:	Setting the data phase to 9 for uplink 9
08:50:19:setup_element:INFO:	Setting the data phase to 6 for uplink 10
08:50:19:setup_element:INFO:	Setting the data phase to 10 for uplink 11
08:50:19:setup_element:INFO:	Setting the data phase to 8 for uplink 12
08:50:19:setup_element:INFO:	Setting the data phase to 10 for uplink 13
08:50:19:setup_element:INFO:	Setting the data phase to 9 for uplink 14
08:50:19:setup_element:INFO:	Setting the data phase to 11 for uplink 15
08:50:19:setup_element:INFO:	Beginning SMX ASICs map scan
08:50:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:50:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:50:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:50:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:50:19:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:50:19:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:50:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:50:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:50:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:50:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:50:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:50:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:50:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:50:20:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:50:20:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:50:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:50:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:50:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:50:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:50:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:50:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:50:22:setup_element:INFO:	Performing Elink synchronization
08:50:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:50:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:50:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:50:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:50:22:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:50:22:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:50:23:febtest:INFO:	Init all SMX (CSA): 30
08:50:39:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:50:39:febtest:INFO:	01-00 | XA-000-09-004-002-007-010-05 |  40.9 | 1141.9
08:50:39:febtest:INFO:	08-01 | XA-000-09-004-002-007-016-02 |  40.9 | 1141.9
08:50:40:febtest:INFO:	03-02 | XA-000-09-004-002-007-013-05 |  44.1 | 1141.9
08:50:40:febtest:INFO:	10-03 | XA-000-09-004-002-010-016-05 |  40.9 | 1147.8
08:50:40:febtest:INFO:	05-04 | XA-000-09-004-002-010-011-02 |  40.9 | 1141.9
08:50:40:febtest:INFO:	12-05 | XA-000-09-004-002-010-017-05 |  50.4 | 1118.1
08:50:40:febtest:INFO:	07-06 | XA-000-09-004-002-010-010-02 |  34.6 | 1165.6
08:50:41:febtest:INFO:	14-07 | XA-000-09-004-002-007-017-02 |  37.7 | 1159.7
08:50:42:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:50:43:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1153.732915 mV
08:50:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:44:ST3_smx:INFO:		Electrons
08:50:44:ST3_smx:INFO:	# loops 0
08:50:45:ST3_smx:INFO:	# loops 1
08:50:47:ST3_smx:INFO:	# loops 2
08:50:49:ST3_smx:INFO:	Total # of broken channels: 0
08:50:49:ST3_smx:INFO:	List of broken channels: []
08:50:49:ST3_smx:INFO:	Total # of broken channels: 0
08:50:49:ST3_smx:INFO:	List of broken channels: []
08:50:51:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1153.732915 mV
08:50:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:51:ST3_smx:INFO:		Electrons
08:50:51:ST3_smx:INFO:	# loops 0
08:50:53:ST3_smx:INFO:	# loops 1
08:50:55:ST3_smx:INFO:	# loops 2
08:50:56:ST3_smx:INFO:	Total # of broken channels: 0
08:50:56:ST3_smx:INFO:	List of broken channels: []
08:50:56:ST3_smx:INFO:	Total # of broken channels: 1
08:50:56:ST3_smx:INFO:	List of broken channels: [7]
08:50:58:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1147.806000 mV
08:50:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:50:58:ST3_smx:INFO:		Electrons
08:50:58:ST3_smx:INFO:	# loops 0
08:51:00:ST3_smx:INFO:	# loops 1
08:51:02:ST3_smx:INFO:	# loops 2
08:51:04:ST3_smx:INFO:	Total # of broken channels: 0
08:51:04:ST3_smx:INFO:	List of broken channels: []
08:51:04:ST3_smx:INFO:	Total # of broken channels: 1
08:51:04:ST3_smx:INFO:	List of broken channels: [3]
08:51:05:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1171.483840 mV
08:51:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:05:ST3_smx:INFO:		Electrons
08:51:05:ST3_smx:INFO:	# loops 0
08:51:07:ST3_smx:INFO:	# loops 1
08:51:09:ST3_smx:INFO:	# loops 2
08:51:11:ST3_smx:INFO:	Total # of broken channels: 0
08:51:11:ST3_smx:INFO:	List of broken channels: []
08:51:11:ST3_smx:INFO:	Total # of broken channels: 0
08:51:11:ST3_smx:INFO:	List of broken channels: []
08:51:12:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1153.732915 mV
08:51:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:12:ST3_smx:INFO:		Electrons
08:51:12:ST3_smx:INFO:	# loops 0
08:51:14:ST3_smx:INFO:	# loops 1
08:51:16:ST3_smx:INFO:	# loops 2
08:51:18:ST3_smx:INFO:	Total # of broken channels: 0
08:51:18:ST3_smx:INFO:	List of broken channels: []
08:51:18:ST3_smx:INFO:	Total # of broken channels: 0
08:51:18:ST3_smx:INFO:	List of broken channels: []
08:51:19:ST3_smx:INFO:	chip: 12-5 	 50.430383 C 	 1129.995435 mV
08:51:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:19:ST3_smx:INFO:		Electrons
08:51:19:ST3_smx:INFO:	# loops 0
08:51:21:ST3_smx:INFO:	# loops 1
08:51:23:ST3_smx:INFO:	# loops 2
08:51:25:ST3_smx:INFO:	Total # of broken channels: 0
08:51:25:ST3_smx:INFO:	List of broken channels: []
08:51:25:ST3_smx:INFO:	Total # of broken channels: 0
08:51:25:ST3_smx:INFO:	List of broken channels: []
08:51:26:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1177.390875 mV
08:51:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:26:ST3_smx:INFO:		Electrons
08:51:26:ST3_smx:INFO:	# loops 0
08:51:28:ST3_smx:INFO:	# loops 1
08:51:30:ST3_smx:INFO:	# loops 2
08:51:32:ST3_smx:INFO:	Total # of broken channels: 0
08:51:32:ST3_smx:INFO:	List of broken channels: []
08:51:32:ST3_smx:INFO:	Total # of broken channels: 0
08:51:32:ST3_smx:INFO:	List of broken channels: []
08:51:33:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1171.483840 mV
08:51:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:51:33:ST3_smx:INFO:		Electrons
08:51:33:ST3_smx:INFO:	# loops 0
08:51:35:ST3_smx:INFO:	# loops 1
08:51:37:ST3_smx:INFO:	# loops 2
08:51:39:ST3_smx:INFO:	Total # of broken channels: 0
08:51:39:ST3_smx:INFO:	List of broken channels: []
08:51:39:ST3_smx:INFO:	Total # of broken channels: 0
08:51:39:ST3_smx:INFO:	List of broken channels: []
08:51:39:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:51:39:febtest:INFO:	01-00 | XA-000-09-004-002-007-010-05 |  44.1 | 1177.4
08:51:40:febtest:INFO:	08-01 | XA-000-09-004-002-007-016-02 |  40.9 | 1177.4
08:51:40:febtest:INFO:	03-02 | XA-000-09-004-002-007-013-05 |  44.1 | 1171.5
08:51:40:febtest:INFO:	10-03 | XA-000-09-004-002-010-016-05 |  40.9 | 1224.5
08:51:40:febtest:INFO:	05-04 | XA-000-09-004-002-010-011-02 |  44.1 | 1171.5
08:51:40:febtest:INFO:	12-05 | XA-000-09-004-002-010-017-05 |  50.4 | 1153.7
08:51:41:febtest:INFO:	07-06 | XA-000-09-004-002-010-010-02 |  37.7 | 1201.0
08:51:41:febtest:INFO:	14-07 | XA-000-09-004-002-007-017-02 |  44.1 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_11-08_50_11
OPERATOR  : Henrik; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3212| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6520', '1.853', '2.4930', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0040', '1.850', '2.4150', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9760', '1.850', '0.5250', '0.000', '0.0000', '0.000', '0.0000']
Comment.txt