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FEB_3212 24.07.25 13:41:14
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13:41:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:14:ST3_Shared:INFO: FEB-Microcable
13:41:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:14:febtest:INFO: Testing FEB with SN 3212
13:41:15:smx_tester:INFO: Scanning setup
13:41:15:elinks:INFO: Disabling clock on downlink 0
13:41:15:elinks:INFO: Disabling clock on downlink 1
13:41:15:elinks:INFO: Disabling clock on downlink 2
13:41:15:elinks:INFO: Disabling clock on downlink 3
13:41:15:elinks:INFO: Disabling clock on downlink 4
13:41:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:15:elinks:INFO: Disabling clock on downlink 0
13:41:15:elinks:INFO: Disabling clock on downlink 1
13:41:15:elinks:INFO: Disabling clock on downlink 2
13:41:15:elinks:INFO: Disabling clock on downlink 3
13:41:15:elinks:INFO: Disabling clock on downlink 4
13:41:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:15:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:41:15:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:41:15:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:41:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:41:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:16:elinks:INFO: Disabling clock on downlink 0
13:41:16:elinks:INFO: Disabling clock on downlink 1
13:41:16:elinks:INFO: Disabling clock on downlink 2
13:41:16:elinks:INFO: Disabling clock on downlink 3
13:41:16:elinks:INFO: Disabling clock on downlink 4
13:41:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:41:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:16:elinks:INFO: Disabling clock on downlink 0
13:41:16:elinks:INFO: Disabling clock on downlink 1
13:41:16:elinks:INFO: Disabling clock on downlink 2
13:41:16:elinks:INFO: Disabling clock on downlink 3
13:41:16:elinks:INFO: Disabling clock on downlink 4
13:41:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:41:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:16:elinks:INFO: Disabling clock on downlink 0
13:41:16:elinks:INFO: Disabling clock on downlink 1
13:41:16:elinks:INFO: Disabling clock on downlink 2
13:41:16:elinks:INFO: Disabling clock on downlink 3
13:41:16:elinks:INFO: Disabling clock on downlink 4
13:41:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:41:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:16:setup_element:INFO: Scanning clock phase
13:41:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:16:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:41:16:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
13:41:16:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
13:41:16:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
13:41:16:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
13:41:16:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXX____
Clock Delay: 33
13:41:16:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXX____
Clock Delay: 33
13:41:16:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:41:16:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
13:41:16:setup_element:INFO: Scanning data phases
13:41:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:21:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:41:21:setup_element:INFO: Eye window for uplink 0 : ________XXXXX___________________________
Data delay found: 30
13:41:21:setup_element:INFO: Eye window for uplink 1 : _______XXXX_____________________________
Data delay found: 28
13:41:21:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
13:41:21:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
13:41:21:setup_element:INFO: Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
13:41:21:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
13:41:21:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
13:41:21:setup_element:INFO: Eye window for uplink 7 : XX___________________________________XXX
Data delay found: 19
13:41:21:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXXXXXXXXXX_______
Data delay found: 5
13:41:21:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXX_________
Data delay found: 8
13:41:21:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
13:41:21:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
13:41:21:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXXX______
Data delay found: 10
13:41:21:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
13:41:21:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
13:41:21:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
13:41:21:setup_element:INFO: Setting the data phase to 30 for uplink 0
13:41:21:setup_element:INFO: Setting the data phase to 28 for uplink 1
13:41:21:setup_element:INFO: Setting the data phase to 27 for uplink 2
13:41:21:setup_element:INFO: Setting the data phase to 26 for uplink 3
13:41:21:setup_element:INFO: Setting the data phase to 25 for uplink 4
13:41:21:setup_element:INFO: Setting the data phase to 24 for uplink 5
13:41:21:setup_element:INFO: Setting the data phase to 20 for uplink 6
13:41:21:setup_element:INFO: Setting the data phase to 19 for uplink 7
13:41:21:setup_element:INFO: Setting the data phase to 5 for uplink 8
13:41:21:setup_element:INFO: Setting the data phase to 8 for uplink 9
13:41:21:setup_element:INFO: Setting the data phase to 10 for uplink 10
13:41:21:setup_element:INFO: Setting the data phase to 10 for uplink 11
13:41:21:setup_element:INFO: Setting the data phase to 10 for uplink 12
13:41:21:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:41:22:setup_element:INFO: Setting the data phase to 12 for uplink 14
13:41:22:setup_element:INFO: Setting the data phase to 13 for uplink 15
13:41:22:setup_element:INFO: Beginning SMX ASICs map scan
13:41:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:41:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:41:22:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:41:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:41:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:41:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:41:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:41:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:41:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:41:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:41:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:41:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:41:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:41:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:41:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:41:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:41:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:41:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:41:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:41:24:setup_element:INFO: Performing Elink synchronization
13:41:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:41:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:41:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:41:24:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:41:25:febtest:INFO: Init all SMX (CSA): 30
13:41:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:41:38:febtest:INFO: 01-00 | XA-000-09-004-037-010-009-15 | 28.2 | 1195.1
13:41:39:febtest:INFO: 08-01 | XA-000-09-004-037-013-009-07 | 31.4 | 1195.1
13:41:39:febtest:INFO: 03-02 | XA-000-09-004-037-007-009-08 | 34.6 | 1177.4
13:41:39:febtest:INFO: 10-03 | XA-000-09-004-037-016-009-12 | 21.9 | 1230.3
13:41:39:febtest:INFO: 05-04 | XA-000-09-004-037-004-009-06 | 28.2 | 1189.2
13:41:39:febtest:INFO: 12-05 | XA-000-09-004-037-013-008-07 | 44.1 | 1153.7
13:41:40:febtest:INFO: 07-06 | XA-000-09-004-037-004-010-06 | 37.7 | 1165.6
13:41:40:febtest:INFO: 14-07 | XA-000-09-004-037-010-008-15 | 31.4 | 1195.1
13:41:41:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:41:43:ST3_smx:INFO: chip: 1-0 28.225000 C 1206.851500 mV
13:41:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:43:ST3_smx:INFO: Electrons
13:41:43:ST3_smx:INFO: # loops 0
13:41:44:ST3_smx:INFO: # loops 1
13:41:46:ST3_smx:INFO: # loops 2
13:41:48:ST3_smx:INFO: Total # of broken channels: 0
13:41:48:ST3_smx:INFO: List of broken channels: []
13:41:48:ST3_smx:INFO: Total # of broken channels: 0
13:41:48:ST3_smx:INFO: List of broken channels: []
13:41:49:ST3_smx:INFO: chip: 8-1 31.389742 C 1206.851500 mV
13:41:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:49:ST3_smx:INFO: Electrons
13:41:49:ST3_smx:INFO: # loops 0
13:41:51:ST3_smx:INFO: # loops 1
13:41:52:ST3_smx:INFO: # loops 2
13:41:54:ST3_smx:INFO: Total # of broken channels: 0
13:41:54:ST3_smx:INFO: List of broken channels: []
13:41:54:ST3_smx:INFO: Total # of broken channels: 0
13:41:54:ST3_smx:INFO: List of broken channels: []
13:41:56:ST3_smx:INFO: chip: 3-2 34.556970 C 1189.190035 mV
13:41:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:41:56:ST3_smx:INFO: Electrons
13:41:56:ST3_smx:INFO: # loops 0
13:41:57:ST3_smx:INFO: # loops 1
13:41:59:ST3_smx:INFO: # loops 2
13:42:01:ST3_smx:INFO: Total # of broken channels: 0
13:42:01:ST3_smx:INFO: List of broken channels: []
13:42:01:ST3_smx:INFO: Total # of broken channels: 0
13:42:01:ST3_smx:INFO: List of broken channels: []
13:42:03:ST3_smx:INFO: chip: 10-3 21.902970 C 1242.040240 mV
13:42:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:03:ST3_smx:INFO: Electrons
13:42:03:ST3_smx:INFO: # loops 0
13:42:04:ST3_smx:INFO: # loops 1
13:42:06:ST3_smx:INFO: # loops 2
13:42:07:ST3_smx:INFO: Total # of broken channels: 0
13:42:07:ST3_smx:INFO: List of broken channels: []
13:42:07:ST3_smx:INFO: Total # of broken channels: 0
13:42:07:ST3_smx:INFO: List of broken channels: []
13:42:09:ST3_smx:INFO: chip: 5-4 31.389742 C 1206.851500 mV
13:42:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:09:ST3_smx:INFO: Electrons
13:42:09:ST3_smx:INFO: # loops 0
13:42:11:ST3_smx:INFO: # loops 1
13:42:12:ST3_smx:INFO: # loops 2
13:42:14:ST3_smx:INFO: Total # of broken channels: 0
13:42:14:ST3_smx:INFO: List of broken channels: []
13:42:14:ST3_smx:INFO: Total # of broken channels: 0
13:42:14:ST3_smx:INFO: List of broken channels: []
13:42:15:ST3_smx:INFO: chip: 12-5 44.073563 C 1165.571835 mV
13:42:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:15:ST3_smx:INFO: Electrons
13:42:15:ST3_smx:INFO: # loops 0
13:42:17:ST3_smx:INFO: # loops 1
13:42:19:ST3_smx:INFO: # loops 2
13:42:20:ST3_smx:INFO: Total # of broken channels: 0
13:42:20:ST3_smx:INFO: List of broken channels: []
13:42:20:ST3_smx:INFO: Total # of broken channels: 1
13:42:20:ST3_smx:INFO: List of broken channels: [109]
13:42:22:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
13:42:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:22:ST3_smx:INFO: Electrons
13:42:22:ST3_smx:INFO: # loops 0
13:42:24:ST3_smx:INFO: # loops 1
13:42:25:ST3_smx:INFO: # loops 2
13:42:27:ST3_smx:INFO: Total # of broken channels: 0
13:42:27:ST3_smx:INFO: List of broken channels: []
13:42:27:ST3_smx:INFO: Total # of broken channels: 0
13:42:27:ST3_smx:INFO: List of broken channels: []
13:42:28:ST3_smx:INFO: chip: 14-7 31.389742 C 1206.851500 mV
13:42:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:28:ST3_smx:INFO: Electrons
13:42:28:ST3_smx:INFO: # loops 0
13:42:30:ST3_smx:INFO: # loops 1
13:42:32:ST3_smx:INFO: # loops 2
13:42:33:ST3_smx:INFO: Total # of broken channels: 0
13:42:33:ST3_smx:INFO: List of broken channels: []
13:42:33:ST3_smx:INFO: Total # of broken channels: 0
13:42:33:ST3_smx:INFO: List of broken channels: []
13:42:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:42:34:febtest:INFO: 01-00 | XA-000-09-004-037-010-009-15 | 31.4 | 1230.3
13:42:34:febtest:INFO: 08-01 | XA-000-09-004-037-013-009-07 | 34.6 | 1230.3
13:42:34:febtest:INFO: 03-02 | XA-000-09-004-037-007-009-08 | 37.7 | 1212.7
13:42:34:febtest:INFO: 10-03 | XA-000-09-004-037-016-009-12 | 25.1 | 1265.4
13:42:35:febtest:INFO: 05-04 | XA-000-09-004-037-004-009-06 | 31.4 | 1224.5
13:42:35:febtest:INFO: 12-05 | XA-000-09-004-037-013-008-07 | 47.3 | 1189.2
13:42:35:febtest:INFO: 07-06 | XA-000-09-004-037-004-010-06 | 40.9 | 1195.1
13:42:35:febtest:INFO: 14-07 | XA-000-09-004-037-010-008-15 | 34.6 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_24-13_41_14
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3212| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5310', '1.850', '2.1610', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9960', '1.850', '2.3310', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5226', '0.000', '0.0000', '0.000', '0.0000']