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FEB_3230 08.09.25 11:23:38
Info
11:23:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:23:38:ST3_Shared:INFO: FEB-Microcable
11:23:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:23:38:febtest:INFO: Testing FEB with SN 3230
11:23:40:smx_tester:INFO: Scanning setup
11:23:40:elinks:INFO: Disabling clock on downlink 0
11:23:40:elinks:INFO: Disabling clock on downlink 1
11:23:40:elinks:INFO: Disabling clock on downlink 2
11:23:40:elinks:INFO: Disabling clock on downlink 3
11:23:40:elinks:INFO: Disabling clock on downlink 4
11:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:40:elinks:INFO: Disabling clock on downlink 0
11:23:40:elinks:INFO: Disabling clock on downlink 1
11:23:40:elinks:INFO: Disabling clock on downlink 2
11:23:40:elinks:INFO: Disabling clock on downlink 3
11:23:40:elinks:INFO: Disabling clock on downlink 4
11:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:40:elinks:INFO: Disabling clock on downlink 0
11:23:40:elinks:INFO: Disabling clock on downlink 1
11:23:40:elinks:INFO: Disabling clock on downlink 2
11:23:40:elinks:INFO: Disabling clock on downlink 3
11:23:40:elinks:INFO: Disabling clock on downlink 4
11:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:40:elinks:INFO: Disabling clock on downlink 0
11:23:40:elinks:INFO: Disabling clock on downlink 1
11:23:40:elinks:INFO: Disabling clock on downlink 2
11:23:40:elinks:INFO: Disabling clock on downlink 3
11:23:40:elinks:INFO: Disabling clock on downlink 4
11:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:40:elinks:INFO: Disabling clock on downlink 0
11:23:40:elinks:INFO: Disabling clock on downlink 1
11:23:40:elinks:INFO: Disabling clock on downlink 2
11:23:40:elinks:INFO: Disabling clock on downlink 3
11:23:40:elinks:INFO: Disabling clock on downlink 4
11:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:40:setup_element:INFO: Scanning clock phase
11:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:23:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:23:41:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXX_XX___________________________________________________XXXXXXXXXXX
Clock Delay: 43
11:23:41:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXX_XX___________________________________________________XXXXXXXXXXX
Clock Delay: 43
11:23:41:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXX_XX___________________________________________________X_XXXXXXXXX
Clock Delay: 43
11:23:41:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXX_XX___________________________________________________X_XXXXXXXXX
Clock Delay: 43
11:23:41:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXX_________________________________________________________XXXXXXXXXX
Clock Delay: 41
11:23:41:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXX_________________________________________________________XXXXXXXXXX
Clock Delay: 41
11:23:41:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
Clock Delay: 40
11:23:41:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
Clock Delay: 40
11:23:41:setup_element:INFO: Eye window for uplink 8 : XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:23:41:setup_element:INFO: Eye window for uplink 9 : XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:23:41:setup_element:INFO: Eye window for uplink 10: XXXXXX__________________________________________________________________________
Clock Delay: 42
11:23:41:setup_element:INFO: Eye window for uplink 11: XXXXXX__________________________________________________________________________
Clock Delay: 42
11:23:41:setup_element:INFO: Eye window for uplink 12: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:23:41:setup_element:INFO: Eye window for uplink 13: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:23:41:setup_element:INFO: Eye window for uplink 14: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
11:23:41:setup_element:INFO: Eye window for uplink 15: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
11:23:41:setup_element:INFO: Setting the clock phase to 43 for group 0, downlink 1
11:23:41:setup_element:INFO: Scanning data phases
11:23:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:23:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:23:46:setup_element:INFO: Eye window for uplink 0 : XXXX_______________________________XXXXX
Data delay found: 19
11:23:46:setup_element:INFO: Eye window for uplink 1 : XX______________________________XXXXXXXX
Data delay found: 16
11:23:46:setup_element:INFO: Eye window for uplink 2 : XXX_________________________________XXXX
Data delay found: 19
11:23:46:setup_element:INFO: Eye window for uplink 3 : XX_________________________________XXXXX
Data delay found: 18
11:23:46:setup_element:INFO: Eye window for uplink 4 : XX_______________________________XXXXXXX
Data delay found: 17
11:23:46:setup_element:INFO: Eye window for uplink 5 : X_______________________________XXXXXXX_
Data delay found: 16
11:23:46:setup_element:INFO: Eye window for uplink 6 : _________________________XXXXXXXX_______
Data delay found: 8
11:23:46:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXX_________
Data delay found: 7
11:23:46:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXXXX_________________
Data delay found: 37
11:23:46:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXX_______________
Data delay found: 0
11:23:46:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXXX_XXXXXXXXXXXXXX
Data delay found: 8
11:23:46:setup_element:INFO: Eye window for uplink 11: __________________XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
11:23:46:setup_element:INFO: Eye window for uplink 12: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:23:46:setup_element:INFO: Eye window for uplink 13: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:23:46:setup_element:INFO: Eye window for uplink 14: _________________XXXXXXXXX______________
Data delay found: 1
11:23:46:setup_element:INFO: Eye window for uplink 15: __________________XXXXXXXX______________
Data delay found: 1
11:23:46:setup_element:INFO: Setting the data phase to 19 for uplink 0
11:23:46:setup_element:INFO: Setting the data phase to 16 for uplink 1
11:23:46:setup_element:INFO: Setting the data phase to 19 for uplink 2
11:23:46:setup_element:INFO: Setting the data phase to 18 for uplink 3
11:23:46:setup_element:INFO: Setting the data phase to 17 for uplink 4
11:23:46:setup_element:INFO: Setting the data phase to 16 for uplink 5
11:23:46:setup_element:INFO: Setting the data phase to 8 for uplink 6
11:23:46:setup_element:INFO: Setting the data phase to 7 for uplink 7
11:23:46:setup_element:INFO: Setting the data phase to 37 for uplink 8
11:23:46:setup_element:INFO: Setting the data phase to 0 for uplink 9
11:23:46:setup_element:INFO: Setting the data phase to 8 for uplink 10
11:23:46:setup_element:INFO: Setting the data phase to 8 for uplink 11
11:23:46:setup_element:INFO: Setting the data phase to 6 for uplink 12
11:23:46:setup_element:INFO: Setting the data phase to 6 for uplink 13
11:23:46:setup_element:INFO: Setting the data phase to 1 for uplink 14
11:23:46:setup_element:INFO: Setting the data phase to 1 for uplink 15
11:23:46:setup_element:INFO: Beginning SMX ASICs map scan
11:23:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:23:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:23:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:23:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:23:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:23:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:23:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:23:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:23:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:23:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:23:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:23:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:23:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:23:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:23:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:23:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:23:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:23:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:23:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:23:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:23:49:setup_element:INFO: Performing Elink synchronization
11:23:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:23:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:23:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:23:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:23:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:23:49:febtest:INFO: Init all SMX (CSA): 30
11:24:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:24:03:febtest:INFO: 01-00 | XA-000-09-004-035-015-015-06 | 21.9 | 1206.9
11:24:03:febtest:INFO: 08-01 | XA-000-09-004-035-009-017-04 | 31.4 | 1171.5
11:24:04:febtest:INFO: 03-02 | XA-000-09-004-019-013-006-13 | 34.6 | 1165.6
11:24:04:febtest:INFO: 10-03 | XA-000-09-004-035-012-017-15 | 47.3 | 1135.9
11:24:04:febtest:INFO: 05-04 | XA-000-09-004-019-007-005-02 | 40.9 | 1141.9
11:24:04:febtest:INFO: 12-05 | XA-000-09-004-035-010-017-10 | 21.9 | 1206.9
11:24:04:febtest:INFO: 07-06 | XA-000-09-004-035-003-016-11 | 40.9 | 1147.8
11:24:05:febtest:INFO: 14-07 | XA-000-09-004-035-013-017-02 | 18.7 | 1218.6
11:24:06:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:24:08:ST3_smx:INFO: chip: 1-0 21.902970 C 1224.468235 mV
11:24:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:08:ST3_smx:INFO: Electrons
11:24:08:ST3_smx:INFO: # loops 0
11:24:10:ST3_smx:INFO: # loops 1
11:24:11:ST3_smx:INFO: # loops 2
11:24:13:ST3_smx:INFO: Total # of broken channels: 0
11:24:13:ST3_smx:INFO: List of broken channels: []
11:24:13:ST3_smx:INFO: Total # of broken channels: 0
11:24:13:ST3_smx:INFO: List of broken channels: []
11:24:15:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
11:24:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:15:ST3_smx:INFO: Electrons
11:24:15:ST3_smx:INFO: # loops 0
11:24:17:ST3_smx:INFO: # loops 1
11:24:19:ST3_smx:INFO: # loops 2
11:24:20:ST3_smx:INFO: Total # of broken channels: 0
11:24:20:ST3_smx:INFO: List of broken channels: []
11:24:20:ST3_smx:INFO: Total # of broken channels: 0
11:24:20:ST3_smx:INFO: List of broken channels: []
11:24:22:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
11:24:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:22:ST3_smx:INFO: Electrons
11:24:22:ST3_smx:INFO: # loops 0
11:24:23:ST3_smx:INFO: # loops 1
11:24:25:ST3_smx:INFO: # loops 2
11:24:27:ST3_smx:INFO: Total # of broken channels: 0
11:24:27:ST3_smx:INFO: List of broken channels: []
11:24:27:ST3_smx:INFO: Total # of broken channels: 0
11:24:27:ST3_smx:INFO: List of broken channels: []
11:24:29:ST3_smx:INFO: chip: 10-3 47.250730 C 1147.806000 mV
11:24:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:29:ST3_smx:INFO: Electrons
11:24:29:ST3_smx:INFO: # loops 0
11:24:30:ST3_smx:INFO: # loops 1
11:24:32:ST3_smx:INFO: # loops 2
11:24:34:ST3_smx:INFO: Total # of broken channels: 0
11:24:34:ST3_smx:INFO: List of broken channels: []
11:24:34:ST3_smx:INFO: Total # of broken channels: 0
11:24:34:ST3_smx:INFO: List of broken channels: []
11:24:35:ST3_smx:INFO: chip: 5-4 44.073563 C 1147.806000 mV
11:24:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:35:ST3_smx:INFO: Electrons
11:24:35:ST3_smx:INFO: # loops 0
11:24:37:ST3_smx:INFO: # loops 1
11:24:39:ST3_smx:INFO: # loops 2
11:24:41:ST3_smx:INFO: Total # of broken channels: 0
11:24:41:ST3_smx:INFO: List of broken channels: []
11:24:41:ST3_smx:INFO: Total # of broken channels: 0
11:24:41:ST3_smx:INFO: List of broken channels: []
11:24:42:ST3_smx:INFO: chip: 12-5 25.062742 C 1218.600960 mV
11:24:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:42:ST3_smx:INFO: Electrons
11:24:42:ST3_smx:INFO: # loops 0
11:24:44:ST3_smx:INFO: # loops 1
11:24:46:ST3_smx:INFO: # loops 2
11:24:48:ST3_smx:INFO: Total # of broken channels: 0
11:24:48:ST3_smx:INFO: List of broken channels: []
11:24:48:ST3_smx:INFO: Total # of broken channels: 0
11:24:48:ST3_smx:INFO: List of broken channels: []
11:24:49:ST3_smx:INFO: chip: 7-6 44.073563 C 1159.654860 mV
11:24:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:49:ST3_smx:INFO: Electrons
11:24:49:ST3_smx:INFO: # loops 0
11:24:51:ST3_smx:INFO: # loops 1
11:24:53:ST3_smx:INFO: # loops 2
11:24:55:ST3_smx:INFO: Total # of broken channels: 0
11:24:55:ST3_smx:INFO: List of broken channels: []
11:24:55:ST3_smx:INFO: Total # of broken channels: 0
11:24:55:ST3_smx:INFO: List of broken channels: []
11:24:56:ST3_smx:INFO: chip: 14-7 21.902970 C 1230.330540 mV
11:24:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:56:ST3_smx:INFO: Electrons
11:24:56:ST3_smx:INFO: # loops 0
11:24:58:ST3_smx:INFO: # loops 1
11:25:00:ST3_smx:INFO: # loops 2
11:25:02:ST3_smx:INFO: Total # of broken channels: 0
11:25:02:ST3_smx:INFO: List of broken channels: []
11:25:02:ST3_smx:INFO: Total # of broken channels: 0
11:25:02:ST3_smx:INFO: List of broken channels: []
11:25:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:25:02:febtest:INFO: 01-00 | XA-000-09-004-035-015-015-06 | 21.9 | 1247.9
11:25:02:febtest:INFO: 08-01 | XA-000-09-004-035-009-017-04 | 34.6 | 1212.7
11:25:03:febtest:INFO: 03-02 | XA-000-09-004-019-013-006-13 | 34.6 | 1201.0
11:25:03:febtest:INFO: 10-03 | XA-000-09-004-035-012-017-15 | 50.4 | 1171.5
11:25:03:febtest:INFO: 05-04 | XA-000-09-004-019-007-005-02 | 44.1 | 1171.5
11:25:03:febtest:INFO: 12-05 | XA-000-09-004-035-010-017-10 | 28.2 | 1242.0
11:25:03:febtest:INFO: 07-06 | XA-000-09-004-035-003-016-11 | 44.1 | 1177.4
11:25:04:febtest:INFO: 14-07 | XA-000-09-004-035-013-017-02 | 25.1 | 1253.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_08-11_23_38
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3230| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5910', '1.850', '1.9610', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0310', '1.850', '2.5000', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9780', '1.850', '0.5229', '0.000', '0.0000', '0.000', '0.0000']