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FEB_3231 16.09.25 15:10:08
Info
15:10:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:10:08:ST3_Shared:INFO: FEB-Microcable
15:10:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:10:08:febtest:INFO: Testing FEB with SN 3231
15:10:10:smx_tester:INFO: Scanning setup
15:10:10:elinks:INFO: Disabling clock on downlink 0
15:10:10:elinks:INFO: Disabling clock on downlink 1
15:10:10:elinks:INFO: Disabling clock on downlink 2
15:10:10:elinks:INFO: Disabling clock on downlink 3
15:10:10:elinks:INFO: Disabling clock on downlink 4
15:10:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:10:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:10:10:elinks:INFO: Disabling clock on downlink 0
15:10:10:elinks:INFO: Disabling clock on downlink 1
15:10:10:elinks:INFO: Disabling clock on downlink 2
15:10:10:elinks:INFO: Disabling clock on downlink 3
15:10:10:elinks:INFO: Disabling clock on downlink 4
15:10:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:10:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:10:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:10:10:elinks:INFO: Disabling clock on downlink 0
15:10:10:elinks:INFO: Disabling clock on downlink 1
15:10:10:elinks:INFO: Disabling clock on downlink 2
15:10:10:elinks:INFO: Disabling clock on downlink 3
15:10:10:elinks:INFO: Disabling clock on downlink 4
15:10:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:10:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:10:10:elinks:INFO: Disabling clock on downlink 0
15:10:10:elinks:INFO: Disabling clock on downlink 1
15:10:10:elinks:INFO: Disabling clock on downlink 2
15:10:10:elinks:INFO: Disabling clock on downlink 3
15:10:10:elinks:INFO: Disabling clock on downlink 4
15:10:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:10:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:10:10:elinks:INFO: Disabling clock on downlink 0
15:10:10:elinks:INFO: Disabling clock on downlink 1
15:10:10:elinks:INFO: Disabling clock on downlink 2
15:10:10:elinks:INFO: Disabling clock on downlink 3
15:10:10:elinks:INFO: Disabling clock on downlink 4
15:10:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:10:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:10:10:setup_element:INFO: Scanning clock phase
15:10:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:10:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:10:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:10:11:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXX_XXXX_X____________________________________________________XXXXXXXXXX
Clock Delay: 43
15:10:11:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXX_XXXX_X____________________________________________________XXXXXXXXXX
Clock Delay: 43
15:10:11:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXX_X____________________________________________________XXXXXXXXXX
Clock Delay: 43
15:10:11:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXX_X____________________________________________________XXXXXXXXXX
Clock Delay: 43
15:10:11:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXX_XXX______________________________________________________XXXXXXXXXXX
Clock Delay: 41
15:10:11:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXX_XXX______________________________________________________XXXXXXXXXXX
Clock Delay: 41
15:10:11:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXX___________________________________________________________XXXXXXXXXXX
Clock Delay: 39
15:10:11:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXX___________________________________________________________XXXXXXXXXXX
Clock Delay: 39
15:10:11:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
15:10:11:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
15:10:11:setup_element:INFO: Eye window for uplink 10: XXXXX_________________________________________________________________XXXXXXXXXX
Clock Delay: 37
15:10:11:setup_element:INFO: Eye window for uplink 11: XXXXX_________________________________________________________________XXXXXXXXXX
Clock Delay: 37
15:10:11:setup_element:INFO: Eye window for uplink 12: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
15:10:11:setup_element:INFO: Eye window for uplink 13: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
15:10:11:setup_element:INFO: Eye window for uplink 14: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
15:10:11:setup_element:INFO: Eye window for uplink 15: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
15:10:11:setup_element:INFO: Setting the clock phase to 42 for group 0, downlink 1
15:10:11:setup_element:INFO: Scanning data phases
15:10:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:10:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:10:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:10:16:setup_element:INFO: Eye window for uplink 0 : XXXXXXXX_______________________________X
Data delay found: 23
15:10:16:setup_element:INFO: Eye window for uplink 1 : XXXXXX______________________________XXXX
Data delay found: 20
15:10:16:setup_element:INFO: Eye window for uplink 2 : XXXXXX_______________________________XXX
Data delay found: 21
15:10:16:setup_element:INFO: Eye window for uplink 3 : XXXXX_______________________________XXXX
Data delay found: 20
15:10:16:setup_element:INFO: Eye window for uplink 4 : X__________________________________XXXXX
Data delay found: 17
15:10:16:setup_element:INFO: Eye window for uplink 5 : X_______________________________XXXXXXXX
Data delay found: 16
15:10:16:setup_element:INFO: Eye window for uplink 6 : _______________________XXXXXXXXX________
Data delay found: 7
15:10:16:setup_element:INFO: Eye window for uplink 7 : ______________________XXXXXXXX__________
Data delay found: 5
15:10:16:setup_element:INFO: Eye window for uplink 8 : ________________XXXXXXXXX_______________
Data delay found: 0
15:10:16:setup_element:INFO: Eye window for uplink 9 : __________________XXXXXXXXX_____________
Data delay found: 2
15:10:16:setup_element:INFO: Eye window for uplink 10: __________________XXXXXXXXX_____________
Data delay found: 2
15:10:16:setup_element:INFO: Eye window for uplink 11: ___________________XXXXXXXX_____________
Data delay found: 2
15:10:16:setup_element:INFO: Eye window for uplink 12: ________________XXXXXXXX________________
Data delay found: 39
15:10:16:setup_element:INFO: Eye window for uplink 13: _________________XXXXXXXX_______________
Data delay found: 0
15:10:16:setup_element:INFO: Eye window for uplink 14: ___________________XXXXXXXXXX___________
Data delay found: 3
15:10:16:setup_element:INFO: Eye window for uplink 15: _____________XXXXXXXXXXXXXXXXX__________
Data delay found: 1
15:10:16:setup_element:INFO: Setting the data phase to 23 for uplink 0
15:10:16:setup_element:INFO: Setting the data phase to 20 for uplink 1
15:10:16:setup_element:INFO: Setting the data phase to 21 for uplink 2
15:10:16:setup_element:INFO: Setting the data phase to 20 for uplink 3
15:10:16:setup_element:INFO: Setting the data phase to 17 for uplink 4
15:10:16:setup_element:INFO: Setting the data phase to 16 for uplink 5
15:10:16:setup_element:INFO: Setting the data phase to 7 for uplink 6
15:10:16:setup_element:INFO: Setting the data phase to 5 for uplink 7
15:10:16:setup_element:INFO: Setting the data phase to 0 for uplink 8
15:10:16:setup_element:INFO: Setting the data phase to 2 for uplink 9
15:10:16:setup_element:INFO: Setting the data phase to 2 for uplink 10
15:10:16:setup_element:INFO: Setting the data phase to 2 for uplink 11
15:10:16:setup_element:INFO: Setting the data phase to 39 for uplink 12
15:10:16:setup_element:INFO: Setting the data phase to 0 for uplink 13
15:10:16:setup_element:INFO: Setting the data phase to 3 for uplink 14
15:10:16:setup_element:INFO: Setting the data phase to 1 for uplink 15
15:10:16:setup_element:INFO: Beginning SMX ASICs map scan
15:10:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:10:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:10:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:10:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:10:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:10:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:10:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:10:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:10:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:10:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:10:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:10:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:10:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:10:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:10:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:10:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:10:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:10:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:10:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:10:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:10:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:10:19:setup_element:INFO: Performing Elink synchronization
15:10:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:10:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:10:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:10:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:10:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:10:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:10:20:febtest:INFO: Init all SMX (CSA): 30
15:10:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:10:37:febtest:INFO: 01-00 | XA-000-09-004-024-004-009-02 | 21.9 | 1195.1
15:10:37:febtest:INFO: 08-01 | XA-000-09-004-024-013-008-03 | 31.4 | 1171.5
15:10:37:febtest:INFO: 03-02 | XA-000-09-004-024-010-008-11 | 25.1 | 1195.1
15:10:38:febtest:INFO: 10-03 | XA-000-09-004-024-010-010-11 | 31.4 | 1189.2
15:10:38:febtest:INFO: 05-04 | XA-000-09-004-024-007-010-12 | 34.6 | 1177.4
15:10:38:febtest:INFO: 12-05 | XA-000-09-004-024-010-009-11 | 28.2 | 1195.1
15:10:38:febtest:INFO: 07-06 | XA-000-09-004-024-007-009-12 | 34.6 | 1171.5
15:10:38:febtest:INFO: 14-07 | XA-000-09-004-024-013-007-03 | 37.7 | 1165.6
15:10:39:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:10:41:ST3_smx:INFO: chip: 1-0 25.062742 C 1206.851500 mV
15:10:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:41:ST3_smx:INFO: Electrons
15:10:41:ST3_smx:INFO: # loops 0
15:10:43:ST3_smx:INFO: # loops 1
15:10:45:ST3_smx:INFO: # loops 2
15:10:47:ST3_smx:INFO: Total # of broken channels: 0
15:10:47:ST3_smx:INFO: List of broken channels: []
15:10:47:ST3_smx:INFO: Total # of broken channels: 1
15:10:47:ST3_smx:INFO: List of broken channels: [0]
15:10:49:ST3_smx:INFO: chip: 8-1 31.389742 C 1183.292940 mV
15:10:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:49:ST3_smx:INFO: Electrons
15:10:49:ST3_smx:INFO: # loops 0
15:10:51:ST3_smx:INFO: # loops 1
15:10:54:ST3_smx:INFO: # loops 2
15:10:55:ST3_smx:INFO: Total # of broken channels: 0
15:10:55:ST3_smx:INFO: List of broken channels: []
15:10:55:ST3_smx:INFO: Total # of broken channels: 0
15:10:55:ST3_smx:INFO: List of broken channels: []
15:10:57:ST3_smx:INFO: chip: 3-2 28.225000 C 1212.728715 mV
15:10:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:10:57:ST3_smx:INFO: Electrons
15:10:57:ST3_smx:INFO: # loops 0
15:10:59:ST3_smx:INFO: # loops 1
15:11:01:ST3_smx:INFO: # loops 2
15:11:03:ST3_smx:INFO: Total # of broken channels: 0
15:11:03:ST3_smx:INFO: List of broken channels: []
15:11:03:ST3_smx:INFO: Total # of broken channels: 0
15:11:03:ST3_smx:INFO: List of broken channels: []
15:11:05:ST3_smx:INFO: chip: 10-3 31.389742 C 1200.969315 mV
15:11:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:05:ST3_smx:INFO: Electrons
15:11:05:ST3_smx:INFO: # loops 0
15:11:07:ST3_smx:INFO: # loops 1
15:11:09:ST3_smx:INFO: # loops 2
15:11:11:ST3_smx:INFO: Total # of broken channels: 0
15:11:11:ST3_smx:INFO: List of broken channels: []
15:11:11:ST3_smx:INFO: Total # of broken channels: 0
15:11:11:ST3_smx:INFO: List of broken channels: []
15:11:12:ST3_smx:INFO: chip: 5-4 34.556970 C 1189.190035 mV
15:11:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:12:ST3_smx:INFO: Electrons
15:11:12:ST3_smx:INFO: # loops 0
15:11:14:ST3_smx:INFO: # loops 1
15:11:16:ST3_smx:INFO: # loops 2
15:11:18:ST3_smx:INFO: Total # of broken channels: 0
15:11:18:ST3_smx:INFO: List of broken channels: []
15:11:18:ST3_smx:INFO: Total # of broken channels: 0
15:11:18:ST3_smx:INFO: List of broken channels: []
15:11:20:ST3_smx:INFO: chip: 12-5 31.389742 C 1206.851500 mV
15:11:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:20:ST3_smx:INFO: Electrons
15:11:20:ST3_smx:INFO: # loops 0
15:11:22:ST3_smx:INFO: # loops 1
15:11:24:ST3_smx:INFO: # loops 2
15:11:26:ST3_smx:INFO: Total # of broken channels: 0
15:11:26:ST3_smx:INFO: List of broken channels: []
15:11:26:ST3_smx:INFO: Total # of broken channels: 0
15:11:26:ST3_smx:INFO: List of broken channels: []
15:11:28:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
15:11:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:28:ST3_smx:INFO: Electrons
15:11:28:ST3_smx:INFO: # loops 0
15:11:30:ST3_smx:INFO: # loops 1
15:11:32:ST3_smx:INFO: # loops 2
15:11:34:ST3_smx:INFO: Total # of broken channels: 0
15:11:34:ST3_smx:INFO: List of broken channels: []
15:11:34:ST3_smx:INFO: Total # of broken channels: 0
15:11:34:ST3_smx:INFO: List of broken channels: []
15:11:36:ST3_smx:INFO: chip: 14-7 40.898880 C 1177.390875 mV
15:11:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:11:36:ST3_smx:INFO: Electrons
15:11:36:ST3_smx:INFO: # loops 0
15:11:38:ST3_smx:INFO: # loops 1
15:11:40:ST3_smx:INFO: # loops 2
15:11:42:ST3_smx:INFO: Total # of broken channels: 0
15:11:42:ST3_smx:INFO: List of broken channels: []
15:11:42:ST3_smx:INFO: Total # of broken channels: 0
15:11:42:ST3_smx:INFO: List of broken channels: []
15:11:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:11:42:febtest:INFO: 01-00 | XA-000-09-004-024-004-009-02 | 25.1 | 1230.3
15:11:43:febtest:INFO: 08-01 | XA-000-09-004-024-013-008-03 | 34.6 | 1206.9
15:11:43:febtest:INFO: 03-02 | XA-000-09-004-024-010-008-11 | 28.2 | 1230.3
15:11:43:febtest:INFO: 10-03 | XA-000-09-004-024-010-010-11 | 34.6 | 1224.5
15:11:43:febtest:INFO: 05-04 | XA-000-09-004-024-007-010-12 | 37.7 | 1206.9
15:11:43:febtest:INFO: 12-05 | XA-000-09-004-024-010-009-11 | 34.6 | 1230.3
15:11:44:febtest:INFO: 07-06 | XA-000-09-004-024-007-009-12 | 37.7 | 1206.9
15:11:44:febtest:INFO: 14-07 | XA-000-09-004-024-013-007-03 | 40.9 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_16-15_10_08
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3231| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5800', '1.850', '2.2120', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0110', '1.850', '2.2790', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.5173', '0.000', '0.0000', '0.000', '0.0000']