FEB_3234 11.09.25 13:32:17
Info
13:32:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:17:ST3_Shared:INFO: FEB-Microcable
13:32:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:17:febtest:INFO: Testing FEB with SN 3234
13:32:19:smx_tester:INFO: Scanning setup
13:32:19:elinks:INFO: Disabling clock on downlink 0
13:32:19:elinks:INFO: Disabling clock on downlink 1
13:32:19:elinks:INFO: Disabling clock on downlink 2
13:32:19:elinks:INFO: Disabling clock on downlink 3
13:32:19:elinks:INFO: Disabling clock on downlink 4
13:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:19:elinks:INFO: Disabling clock on downlink 0
13:32:19:elinks:INFO: Disabling clock on downlink 1
13:32:19:elinks:INFO: Disabling clock on downlink 2
13:32:19:elinks:INFO: Disabling clock on downlink 3
13:32:19:elinks:INFO: Disabling clock on downlink 4
13:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:19:elinks:INFO: Disabling clock on downlink 0
13:32:19:elinks:INFO: Disabling clock on downlink 1
13:32:19:elinks:INFO: Disabling clock on downlink 2
13:32:19:elinks:INFO: Disabling clock on downlink 3
13:32:19:elinks:INFO: Disabling clock on downlink 4
13:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:19:elinks:INFO: Disabling clock on downlink 0
13:32:19:elinks:INFO: Disabling clock on downlink 1
13:32:19:elinks:INFO: Disabling clock on downlink 2
13:32:19:elinks:INFO: Disabling clock on downlink 3
13:32:19:elinks:INFO: Disabling clock on downlink 4
13:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:19:elinks:INFO: Disabling clock on downlink 0
13:32:19:elinks:INFO: Disabling clock on downlink 1
13:32:19:elinks:INFO: Disabling clock on downlink 2
13:32:19:elinks:INFO: Disabling clock on downlink 3
13:32:19:elinks:INFO: Disabling clock on downlink 4
13:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:19:setup_element:INFO: Scanning clock phase
13:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:32:20:setup_element:INFO: Eye window for uplink 8 : XX_X____________________________________________________________________________
Clock Delay: 41
13:32:20:setup_element:INFO: Eye window for uplink 9 : XX_X____________________________________________________________________________
Clock Delay: 41
13:32:20:setup_element:INFO: Eye window for uplink 10: XXXX__________________________________________________________________XXXXXXXXXX
Clock Delay: 36
13:32:20:setup_element:INFO: Eye window for uplink 11: XXXX__________________________________________________________________XXXXXXXXXX
Clock Delay: 36
13:32:20:setup_element:INFO: Eye window for uplink 12: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:32:20:setup_element:INFO: Eye window for uplink 13: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:32:20:setup_element:INFO: Eye window for uplink 14: XXXXX______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
13:32:20:setup_element:INFO: Eye window for uplink 15: XXXXX______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
13:32:20:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
13:32:20:setup_element:INFO: Scanning data phases
13:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:25:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:32:25:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
13:32:25:setup_element:INFO: Eye window for uplink 9 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
13:32:25:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXXXXX____
Data delay found: 11
13:32:25:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXXXX____
Data delay found: 12
13:32:25:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXXXXX____
Data delay found: 11
13:32:25:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXXXXX____
Data delay found: 11
13:32:25:setup_element:INFO: Eye window for uplink 14: ________________________XXXXXXXXXXX_____
Data delay found: 9
13:32:25:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXXXXX_____
Data delay found: 9
13:32:25:setup_element:INFO: Setting the data phase to 9 for uplink 8
13:32:25:setup_element:INFO: Setting the data phase to 9 for uplink 9
13:32:25:setup_element:INFO: Setting the data phase to 11 for uplink 10
13:32:25:setup_element:INFO: Setting the data phase to 12 for uplink 11
13:32:25:setup_element:INFO: Setting the data phase to 11 for uplink 12
13:32:25:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:32:25:setup_element:INFO: Setting the data phase to 9 for uplink 14
13:32:25:setup_element:INFO: Setting the data phase to 9 for uplink 15
13:32:25:setup_element:INFO: Beginning SMX ASICs map scan
13:32:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:32:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:25:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:32:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:32:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:32:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:32:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:32:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:32:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:32:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:32:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:32:27:setup_element:INFO: Performing Elink synchronization
13:32:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:32:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:32:27:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:32:28:febtest:INFO: Init all SMX (CSA): 30
13:32:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:36:febtest:INFO: 08-01 | XA-000-09-004-024-005-021-08 | 37.7 | 1171.5
13:32:36:febtest:INFO: 10-03 | XA-000-09-004-024-014-020-10 | 31.4 | 1201.0
13:32:36:febtest:INFO: 12-05 | XA-000-09-004-024-005-019-08 | 44.1 | 1153.7
13:32:36:febtest:INFO: 14-07 | XA-000-09-004-024-008-021-15 | 37.7 | 1183.3
13:32:37:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:32:39:ST3_smx:INFO: chip: 8-1 37.726682 C 1183.292940 mV
13:32:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:39:ST3_smx:INFO: Electrons
13:32:39:ST3_smx:INFO: # loops 0
13:32:41:ST3_smx:INFO: # loops 1
13:32:43:ST3_smx:INFO: # loops 2
13:32:45:ST3_smx:INFO: Total # of broken channels: 0
13:32:45:ST3_smx:INFO: List of broken channels: []
13:32:45:ST3_smx:INFO: Total # of broken channels: 0
13:32:45:ST3_smx:INFO: List of broken channels: []
13:32:46:ST3_smx:INFO: chip: 10-3 34.556970 C 1212.728715 mV
13:32:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:46:ST3_smx:INFO: Electrons
13:32:46:ST3_smx:INFO: # loops 0
13:32:48:ST3_smx:INFO: # loops 1
13:32:49:ST3_smx:INFO: # loops 2
13:32:51:ST3_smx:INFO: Total # of broken channels: 0
13:32:51:ST3_smx:INFO: List of broken channels: []
13:32:51:ST3_smx:INFO: Total # of broken channels: 0
13:32:51:ST3_smx:INFO: List of broken channels: []
13:32:53:ST3_smx:INFO: chip: 12-5 47.250730 C 1159.654860 mV
13:32:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:53:ST3_smx:INFO: Electrons
13:32:53:ST3_smx:INFO: # loops 0
13:32:54:ST3_smx:INFO: # loops 1
13:32:56:ST3_smx:INFO: # loops 2
13:32:58:ST3_smx:INFO: Total # of broken channels: 0
13:32:58:ST3_smx:INFO: List of broken channels: []
13:32:58:ST3_smx:INFO: Total # of broken channels: 0
13:32:58:ST3_smx:INFO: List of broken channels: []
13:32:59:ST3_smx:INFO: chip: 14-7 40.898880 C 1195.082160 mV
13:32:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:59:ST3_smx:INFO: Electrons
13:32:59:ST3_smx:INFO: # loops 0
13:33:01:ST3_smx:INFO: # loops 1
13:33:02:ST3_smx:INFO: # loops 2
13:33:04:ST3_smx:INFO: Total # of broken channels: 0
13:33:04:ST3_smx:INFO: List of broken channels: []
13:33:04:ST3_smx:INFO: Total # of broken channels: 0
13:33:04:ST3_smx:INFO: List of broken channels: []
13:33:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:04:febtest:INFO: 08-01 | XA-000-09-004-024-005-021-08 | 40.9 | 1212.7
13:33:05:febtest:INFO: 10-03 | XA-000-09-004-024-014-020-10 | 37.7 | 1230.3
13:33:05:febtest:INFO: 12-05 | XA-000-09-004-024-005-019-08 | 50.4 | 1183.3
13:33:05:febtest:INFO: 14-07 | XA-000-09-004-024-008-021-15 | 44.1 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_11-13_32_17
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3234| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7436', '1.850', '1.4560', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0190', '1.850', '1.1740', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9979', '1.850', '0.2670', '0.000', '0.0000', '0.000', '0.0000']