FEB_3236 12.09.25 13:27:44
Info
13:27:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:27:44:ST3_Shared:INFO: FEB-Microcable
13:27:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:27:44:febtest:INFO: Testing FEB with SN 3236
13:27:45:smx_tester:INFO: Scanning setup
13:27:45:elinks:INFO: Disabling clock on downlink 0
13:27:45:elinks:INFO: Disabling clock on downlink 1
13:27:45:elinks:INFO: Disabling clock on downlink 2
13:27:45:elinks:INFO: Disabling clock on downlink 3
13:27:45:elinks:INFO: Disabling clock on downlink 4
13:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:45:elinks:INFO: Disabling clock on downlink 0
13:27:45:elinks:INFO: Disabling clock on downlink 1
13:27:45:elinks:INFO: Disabling clock on downlink 2
13:27:45:elinks:INFO: Disabling clock on downlink 3
13:27:45:elinks:INFO: Disabling clock on downlink 4
13:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:46:elinks:INFO: Disabling clock on downlink 0
13:27:46:elinks:INFO: Disabling clock on downlink 1
13:27:46:elinks:INFO: Disabling clock on downlink 2
13:27:46:elinks:INFO: Disabling clock on downlink 3
13:27:46:elinks:INFO: Disabling clock on downlink 4
13:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:46:elinks:INFO: Disabling clock on downlink 0
13:27:46:elinks:INFO: Disabling clock on downlink 1
13:27:46:elinks:INFO: Disabling clock on downlink 2
13:27:46:elinks:INFO: Disabling clock on downlink 3
13:27:46:elinks:INFO: Disabling clock on downlink 4
13:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:46:elinks:INFO: Disabling clock on downlink 0
13:27:46:elinks:INFO: Disabling clock on downlink 1
13:27:46:elinks:INFO: Disabling clock on downlink 2
13:27:46:elinks:INFO: Disabling clock on downlink 3
13:27:46:elinks:INFO: Disabling clock on downlink 4
13:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:46:setup_element:INFO: Scanning clock phase
13:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:27:46:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXX_________________________________________________________XXXXXXXXXXXX
Clock Delay: 39
13:27:46:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXX_________________________________________________________XXXXXXXXXXXX
Clock Delay: 39
13:27:46:setup_element:INFO: Eye window for uplink 8 : XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:27:46:setup_element:INFO: Eye window for uplink 9 : XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:27:46:setup_element:INFO: Eye window for uplink 10: XXXXX___________________________________________________________________________
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 11: XXXXX___________________________________________________________________________
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 12: XXXXX___________________________________________________________________________
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 13: XXXXX___________________________________________________________________________
Clock Delay: 42
13:27:46:setup_element:INFO: Eye window for uplink 14: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:27:46:setup_element:INFO: Eye window for uplink 15: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:27:46:setup_element:INFO: Setting the clock phase to 41 for group 0, downlink 1
13:27:46:setup_element:INFO: Scanning data phases
13:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:27:52:setup_element:INFO: Eye window for uplink 0 : _XXXXXXX_______________________________X
Data delay found: 23
13:27:52:setup_element:INFO: Eye window for uplink 1 : XXXXXX_______________________________XXX
Data delay found: 21
13:27:52:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXX_______________________________
Data delay found: 24
13:27:52:setup_element:INFO: Eye window for uplink 3 : XXXXXXXX________________________________
Data delay found: 23
13:27:52:setup_element:INFO: Eye window for uplink 4 : XXX_________________________________XXXX
Data delay found: 19
13:27:52:setup_element:INFO: Eye window for uplink 5 : X_________________________________XXXXXX
Data delay found: 17
13:27:52:setup_element:INFO: Eye window for uplink 6 : _________________________XXXXXXXXX______
Data delay found: 9
13:27:52:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXXX_______
Data delay found: 8
13:27:52:setup_element:INFO: Eye window for uplink 8 : _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
13:27:52:setup_element:INFO: Eye window for uplink 9 : _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
13:27:52:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXXXX__________
Data delay found: 5
13:27:52:setup_element:INFO: Eye window for uplink 11: _______________________XXXXXXX__________
Data delay found: 6
13:27:52:setup_element:INFO: Eye window for uplink 12: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
13:27:52:setup_element:INFO: Eye window for uplink 13: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
13:27:52:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXXXX____________
Data delay found: 3
13:27:52:setup_element:INFO: Eye window for uplink 15: ____________________XXXXXXXXX___________
Data delay found: 4
13:27:52:setup_element:INFO: Setting the data phase to 23 for uplink 0
13:27:52:setup_element:INFO: Setting the data phase to 21 for uplink 1
13:27:52:setup_element:INFO: Setting the data phase to 24 for uplink 2
13:27:52:setup_element:INFO: Setting the data phase to 23 for uplink 3
13:27:52:setup_element:INFO: Setting the data phase to 19 for uplink 4
13:27:52:setup_element:INFO: Setting the data phase to 17 for uplink 5
13:27:52:setup_element:INFO: Setting the data phase to 9 for uplink 6
13:27:52:setup_element:INFO: Setting the data phase to 8 for uplink 7
13:27:52:setup_element:INFO: Setting the data phase to 2 for uplink 8
13:27:52:setup_element:INFO: Setting the data phase to 2 for uplink 9
13:27:52:setup_element:INFO: Setting the data phase to 5 for uplink 10
13:27:52:setup_element:INFO: Setting the data phase to 6 for uplink 11
13:27:52:setup_element:INFO: Setting the data phase to 5 for uplink 12
13:27:52:setup_element:INFO: Setting the data phase to 5 for uplink 13
13:27:52:setup_element:INFO: Setting the data phase to 3 for uplink 14
13:27:52:setup_element:INFO: Setting the data phase to 4 for uplink 15
13:27:52:setup_element:INFO: Beginning SMX ASICs map scan
13:27:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:27:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:27:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:27:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:27:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:27:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:27:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:27:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:27:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:27:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:27:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:27:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:27:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:27:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:27:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:27:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:27:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:27:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:27:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:27:54:setup_element:INFO: Performing Elink synchronization
13:27:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:27:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:27:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:27:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:27:55:febtest:INFO: Init all SMX (CSA): 30
13:28:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:28:13:febtest:INFO: 01-00 | XA-000-09-004-024-009-024-02 | 37.7 | 1159.7
13:28:14:febtest:INFO: 08-01 | XA-000-09-004-024-009-026-02 | 44.1 | 1135.9
13:28:14:febtest:INFO: 03-02 | XA-000-09-004-024-015-025-07 | 21.9 | 1212.7
13:28:14:febtest:INFO: 10-03 | XA-000-09-004-024-005-005-15 | 47.3 | 1135.9
13:28:14:febtest:INFO: 05-04 | XA-000-09-004-024-015-024-07 | 40.9 | 1153.7
13:28:15:febtest:INFO: 12-05 | XA-000-09-004-024-005-007-15 | 44.1 | 1153.7
13:28:15:febtest:INFO: 07-06 | XA-000-09-004-024-012-024-09 | 28.2 | 1206.9
13:28:15:febtest:INFO: 14-07 | XA-000-09-004-024-008-007-08 | 47.3 | 1135.9
13:28:16:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:28:18:ST3_smx:INFO: chip: 1-0 37.726682 C 1171.483840 mV
13:28:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:18:ST3_smx:INFO: Electrons
13:28:18:ST3_smx:INFO: # loops 0
13:28:20:ST3_smx:INFO: # loops 1
13:28:22:ST3_smx:INFO: # loops 2
13:28:24:ST3_smx:INFO: Total # of broken channels: 2
13:28:24:ST3_smx:INFO: List of broken channels: [95, 122]
13:28:24:ST3_smx:INFO: Total # of broken channels: 3
13:28:24:ST3_smx:INFO: List of broken channels: [95, 105, 122]
13:28:26:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
13:28:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:26:ST3_smx:INFO: Electrons
13:28:26:ST3_smx:INFO: # loops 0
13:28:28:ST3_smx:INFO: # loops 1
13:28:30:ST3_smx:INFO: # loops 2
13:28:32:ST3_smx:INFO: Total # of broken channels: 0
13:28:32:ST3_smx:INFO: List of broken channels: []
13:28:32:ST3_smx:INFO: Total # of broken channels: 0
13:28:32:ST3_smx:INFO: List of broken channels: []
13:28:34:ST3_smx:INFO: chip: 3-2 21.902970 C 1224.468235 mV
13:28:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:34:ST3_smx:INFO: Electrons
13:28:34:ST3_smx:INFO: # loops 0
13:28:36:ST3_smx:INFO: # loops 1
13:28:38:ST3_smx:INFO: # loops 2
13:28:39:ST3_smx:INFO: Total # of broken channels: 0
13:28:39:ST3_smx:INFO: List of broken channels: []
13:28:39:ST3_smx:INFO: Total # of broken channels: 0
13:28:39:ST3_smx:INFO: List of broken channels: []
13:28:41:ST3_smx:INFO: chip: 10-3 47.250730 C 1147.806000 mV
13:28:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:41:ST3_smx:INFO: Electrons
13:28:41:ST3_smx:INFO: # loops 0
13:28:43:ST3_smx:INFO: # loops 1
13:28:45:ST3_smx:INFO: # loops 2
13:28:47:ST3_smx:INFO: Total # of broken channels: 0
13:28:47:ST3_smx:INFO: List of broken channels: []
13:28:47:ST3_smx:INFO: Total # of broken channels: 1
13:28:47:ST3_smx:INFO: List of broken channels: [82]
13:28:49:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
13:28:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:49:ST3_smx:INFO: Electrons
13:28:49:ST3_smx:INFO: # loops 0
13:28:51:ST3_smx:INFO: # loops 1
13:28:53:ST3_smx:INFO: # loops 2
13:28:55:ST3_smx:INFO: Total # of broken channels: 0
13:28:55:ST3_smx:INFO: List of broken channels: []
13:28:55:ST3_smx:INFO: Total # of broken channels: 0
13:28:55:ST3_smx:INFO: List of broken channels: []
13:28:57:ST3_smx:INFO: chip: 12-5 44.073563 C 1165.571835 mV
13:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:57:ST3_smx:INFO: Electrons
13:28:57:ST3_smx:INFO: # loops 0
13:28:59:ST3_smx:INFO: # loops 1
13:29:01:ST3_smx:INFO: # loops 2
13:29:03:ST3_smx:INFO: Total # of broken channels: 0
13:29:03:ST3_smx:INFO: List of broken channels: []
13:29:03:ST3_smx:INFO: Total # of broken channels: 8
13:29:03:ST3_smx:INFO: List of broken channels: [110, 112, 114, 116, 118, 120, 122, 124]
13:29:04:ST3_smx:INFO: chip: 7-6 28.225000 C 1212.728715 mV
13:29:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:29:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:29:04:ST3_smx:INFO: Electrons
13:29:04:ST3_smx:INFO: # loops 0
13:29:06:ST3_smx:INFO: # loops 1
13:29:08:ST3_smx:INFO: # loops 2
13:29:10:ST3_smx:INFO: Total # of broken channels: 0
13:29:10:ST3_smx:INFO: List of broken channels: []
13:29:10:ST3_smx:INFO: Total # of broken channels: 0
13:29:10:ST3_smx:INFO: List of broken channels: []
13:29:12:ST3_smx:INFO: chip: 14-7 47.250730 C 1147.806000 mV
13:29:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:29:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:29:12:ST3_smx:INFO: Electrons
13:29:12:ST3_smx:INFO: # loops 0
13:29:13:ST3_smx:INFO: # loops 1
13:29:16:ST3_smx:INFO: # loops 2
13:29:18:ST3_smx:INFO: Total # of broken channels: 0
13:29:18:ST3_smx:INFO: List of broken channels: []
13:29:18:ST3_smx:INFO: Total # of broken channels: 0
13:29:18:ST3_smx:INFO: List of broken channels: []
13:29:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:29:18:febtest:INFO: 01-00 | XA-000-09-004-024-009-024-02 | 40.9 | 1189.2
13:29:18:febtest:INFO: 08-01 | XA-000-09-004-024-009-026-02 | 47.3 | 1171.5
13:29:19:febtest:INFO: 03-02 | XA-000-09-004-024-015-025-07 | 25.1 | 1242.0
13:29:19:febtest:INFO: 10-03 | XA-000-09-004-024-005-005-15 | 47.3 | 1171.5
13:29:19:febtest:INFO: 05-04 | XA-000-09-004-024-015-024-07 | 40.9 | 1189.2
13:29:19:febtest:INFO: 12-05 | XA-000-09-004-024-005-007-15 | 44.1 | 1189.2
13:29:19:febtest:INFO: 07-06 | XA-000-09-004-024-012-024-09 | 31.4 | 1236.2
13:29:20:febtest:INFO: 14-07 | XA-000-09-004-024-008-007-08 | 50.4 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_12-13_27_44
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3236| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9470', '1.850', '2.1740', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9950', '1.850', '2.2800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5187', '0.000', '0.0000', '0.000', '0.0000']