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FEB_3245 18.09.25 11:33:32
Info
11:33:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:33:32:ST3_Shared:INFO: FEB-Microcable
11:33:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:33:32:febtest:INFO: Testing FEB with SN 3245
11:33:34:smx_tester:INFO: Scanning setup
11:33:34:elinks:INFO: Disabling clock on downlink 0
11:33:34:elinks:INFO: Disabling clock on downlink 1
11:33:34:elinks:INFO: Disabling clock on downlink 2
11:33:34:elinks:INFO: Disabling clock on downlink 3
11:33:34:elinks:INFO: Disabling clock on downlink 4
11:33:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:33:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:33:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:33:34:elinks:INFO: Disabling clock on downlink 0
11:33:34:elinks:INFO: Disabling clock on downlink 1
11:33:34:elinks:INFO: Disabling clock on downlink 2
11:33:34:elinks:INFO: Disabling clock on downlink 3
11:33:34:elinks:INFO: Disabling clock on downlink 4
11:33:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:33:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:33:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:33:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:33:34:elinks:INFO: Disabling clock on downlink 0
11:33:34:elinks:INFO: Disabling clock on downlink 1
11:33:34:elinks:INFO: Disabling clock on downlink 2
11:33:34:elinks:INFO: Disabling clock on downlink 3
11:33:34:elinks:INFO: Disabling clock on downlink 4
11:33:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:33:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:33:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:33:34:elinks:INFO: Disabling clock on downlink 0
11:33:34:elinks:INFO: Disabling clock on downlink 1
11:33:34:elinks:INFO: Disabling clock on downlink 2
11:33:34:elinks:INFO: Disabling clock on downlink 3
11:33:34:elinks:INFO: Disabling clock on downlink 4
11:33:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:33:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:33:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:33:34:elinks:INFO: Disabling clock on downlink 0
11:33:34:elinks:INFO: Disabling clock on downlink 1
11:33:34:elinks:INFO: Disabling clock on downlink 2
11:33:34:elinks:INFO: Disabling clock on downlink 3
11:33:34:elinks:INFO: Disabling clock on downlink 4
11:33:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:33:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:33:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:33:35:setup_element:INFO: Scanning clock phase
11:33:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:33:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:33:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:33:35:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXXXX
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXXXX
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
11:33:35:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXX________________________________________________________XXXXXXXXX
Clock Delay: 42
11:33:35:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXX__________________________________________________________XXXXXXXXX
Clock Delay: 41
11:33:35:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXX__________________________________________________________XXXXXXXXX
Clock Delay: 41
11:33:35:setup_element:INFO: Eye window for uplink 8 : XXXXXX______________________________________________________________X_XXXXXXXXXX
Clock Delay: 36
11:33:35:setup_element:INFO: Eye window for uplink 9 : XXXXXX______________________________________________________________X_XXXXXXXXXX
Clock Delay: 36
11:33:35:setup_element:INFO: Eye window for uplink 10: XXX_________________________________________________________________X_XXXXXXXXXX
Clock Delay: 35
11:33:35:setup_element:INFO: Eye window for uplink 11: XXX_________________________________________________________________X_XXXXXXXXXX
Clock Delay: 35
11:33:35:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
11:33:35:setup_element:INFO: Eye window for uplink 14: XXXXXXX____________________________________________________________X_XXXXXXXXXXX
Clock Delay: 36
11:33:35:setup_element:INFO: Eye window for uplink 15: XXXXXXX____________________________________________________________X_XXXXXXXXXXX
Clock Delay: 36
11:33:35:setup_element:INFO: Setting the clock phase to 40 for group 0, downlink 1
11:33:35:setup_element:INFO: Scanning data phases
11:33:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:33:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:33:40:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:33:40:setup_element:INFO: Eye window for uplink 0 : XXXXXXX_______________________________X_
Data delay found: 22
11:33:40:setup_element:INFO: Eye window for uplink 1 : XXXXX_____________________________X__XXX
Data delay found: 19
11:33:40:setup_element:INFO: Eye window for uplink 2 : XXXX________________________________XXXX
Data delay found: 19
11:33:40:setup_element:INFO: Eye window for uplink 3 : XXX_______________________________X_XXXX
Data delay found: 18
11:33:40:setup_element:INFO: Eye window for uplink 4 : XXX__________________________________XXX
Data delay found: 19
11:33:40:setup_element:INFO: Eye window for uplink 5 : XXX________________________________XXXXX
Data delay found: 18
11:33:40:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXXXX___
Data delay found: 12
11:33:40:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXXX_X____
Data delay found: 10
11:33:40:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXXXXXXX______________
Data delay found: 0
11:33:40:setup_element:INFO: Eye window for uplink 9 : ___________________XXXXXXXXX____________
Data delay found: 3
11:33:40:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXXXX___________
Data delay found: 4
11:33:40:setup_element:INFO: Eye window for uplink 11: _____________________XXXXXXXXX__________
Data delay found: 5
11:33:40:setup_element:INFO: Eye window for uplink 12: ___________________XXXXXXXXX____________
Data delay found: 3
11:33:40:setup_element:INFO: Eye window for uplink 13: ____________________XXXXXXXXX___________
Data delay found: 4
11:33:40:setup_element:INFO: Eye window for uplink 14: ___________________XXXXXXXXXX___________
Data delay found: 3
11:33:40:setup_element:INFO: Eye window for uplink 15: _____________XXXXXXXXXXXXXXXXXXX________
Data delay found: 2
11:33:40:setup_element:INFO: Setting the data phase to 22 for uplink 0
11:33:40:setup_element:INFO: Setting the data phase to 19 for uplink 1
11:33:40:setup_element:INFO: Setting the data phase to 19 for uplink 2
11:33:40:setup_element:INFO: Setting the data phase to 18 for uplink 3
11:33:40:setup_element:INFO: Setting the data phase to 19 for uplink 4
11:33:40:setup_element:INFO: Setting the data phase to 18 for uplink 5
11:33:40:setup_element:INFO: Setting the data phase to 12 for uplink 6
11:33:40:setup_element:INFO: Setting the data phase to 10 for uplink 7
11:33:40:setup_element:INFO: Setting the data phase to 0 for uplink 8
11:33:40:setup_element:INFO: Setting the data phase to 3 for uplink 9
11:33:40:setup_element:INFO: Setting the data phase to 4 for uplink 10
11:33:40:setup_element:INFO: Setting the data phase to 5 for uplink 11
11:33:40:setup_element:INFO: Setting the data phase to 3 for uplink 12
11:33:40:setup_element:INFO: Setting the data phase to 4 for uplink 13
11:33:40:setup_element:INFO: Setting the data phase to 3 for uplink 14
11:33:40:setup_element:INFO: Setting the data phase to 2 for uplink 15
11:33:40:setup_element:INFO: Beginning SMX ASICs map scan
11:33:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:33:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:33:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:33:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:33:40:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:33:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:33:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:33:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:33:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:33:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:33:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:33:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:33:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:33:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:33:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:33:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:33:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:33:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:33:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:33:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:33:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:33:43:setup_element:INFO: Performing Elink synchronization
11:33:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:33:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:33:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:33:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:33:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:33:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:33:44:febtest:INFO: Init all SMX (CSA): 30
11:33:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:33:59:febtest:INFO: 01-00 | XA-000-09-004-035-008-012-14 | 25.1 | 1183.3
11:34:00:febtest:INFO: 08-01 | XA-000-09-004-035-011-011-00 | 21.9 | 1201.0
11:34:00:febtest:INFO: 03-02 | XA-000-09-004-035-011-012-00 | 37.7 | 1159.7
11:34:00:febtest:INFO: 10-03 | XA-000-09-004-035-014-011-11 | 25.1 | 1189.2
11:34:00:febtest:INFO: 05-04 | XA-000-09-004-035-005-011-09 | 21.9 | 1206.9
11:34:00:febtest:INFO: 12-05 | XA-000-09-004-035-008-010-14 | 31.4 | 1159.7
11:34:01:febtest:INFO: 07-06 | XA-000-09-004-035-008-011-14 | 34.6 | 1171.5
11:34:01:febtest:INFO: 14-07 | XA-000-09-004-035-014-010-11 | 37.7 | 1147.8
11:34:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:34:04:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
11:34:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:04:ST3_smx:INFO: Electrons
11:34:04:ST3_smx:INFO: # loops 0
11:34:05:ST3_smx:INFO: # loops 1
11:34:07:ST3_smx:INFO: # loops 2
11:34:09:ST3_smx:INFO: Total # of broken channels: 0
11:34:09:ST3_smx:INFO: List of broken channels: []
11:34:09:ST3_smx:INFO: Total # of broken channels: 0
11:34:09:ST3_smx:INFO: List of broken channels: []
11:34:11:ST3_smx:INFO: chip: 8-1 21.902970 C 1212.728715 mV
11:34:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:11:ST3_smx:INFO: Electrons
11:34:11:ST3_smx:INFO: # loops 0
11:34:12:ST3_smx:INFO: # loops 1
11:34:14:ST3_smx:INFO: # loops 2
11:34:16:ST3_smx:INFO: Total # of broken channels: 0
11:34:16:ST3_smx:INFO: List of broken channels: []
11:34:16:ST3_smx:INFO: Total # of broken channels: 0
11:34:16:ST3_smx:INFO: List of broken channels: []
11:34:17:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV
11:34:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:17:ST3_smx:INFO: Electrons
11:34:17:ST3_smx:INFO: # loops 0
11:34:19:ST3_smx:INFO: # loops 1
11:34:21:ST3_smx:INFO: # loops 2
11:34:23:ST3_smx:INFO: Total # of broken channels: 0
11:34:23:ST3_smx:INFO: List of broken channels: []
11:34:23:ST3_smx:INFO: Total # of broken channels: 0
11:34:23:ST3_smx:INFO: List of broken channels: []
11:34:24:ST3_smx:INFO: chip: 10-3 25.062742 C 1200.969315 mV
11:34:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:24:ST3_smx:INFO: Electrons
11:34:24:ST3_smx:INFO: # loops 0
11:34:26:ST3_smx:INFO: # loops 1
11:34:28:ST3_smx:INFO: # loops 2
11:34:30:ST3_smx:INFO: Total # of broken channels: 0
11:34:30:ST3_smx:INFO: List of broken channels: []
11:34:30:ST3_smx:INFO: Total # of broken channels: 17
11:34:30:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 85, 91, 105, 107, 109, 111, 117, 121]
11:34:31:ST3_smx:INFO: chip: 5-4 21.902970 C 1218.600960 mV
11:34:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:31:ST3_smx:INFO: Electrons
11:34:31:ST3_smx:INFO: # loops 0
11:34:33:ST3_smx:INFO: # loops 1
11:34:35:ST3_smx:INFO: # loops 2
11:34:36:ST3_smx:INFO: Total # of broken channels: 0
11:34:36:ST3_smx:INFO: List of broken channels: []
11:34:36:ST3_smx:INFO: Total # of broken channels: 0
11:34:36:ST3_smx:INFO: List of broken channels: []
11:34:38:ST3_smx:INFO: chip: 12-5 34.556970 C 1171.483840 mV
11:34:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:38:ST3_smx:INFO: Electrons
11:34:38:ST3_smx:INFO: # loops 0
11:34:40:ST3_smx:INFO: # loops 1
11:34:42:ST3_smx:INFO: # loops 2
11:34:44:ST3_smx:INFO: Total # of broken channels: 0
11:34:44:ST3_smx:INFO: List of broken channels: []
11:34:44:ST3_smx:INFO: Total # of broken channels: 0
11:34:44:ST3_smx:INFO: List of broken channels: []
11:34:45:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
11:34:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:45:ST3_smx:INFO: Electrons
11:34:45:ST3_smx:INFO: # loops 0
11:34:47:ST3_smx:INFO: # loops 1
11:34:49:ST3_smx:INFO: # loops 2
11:34:51:ST3_smx:INFO: Total # of broken channels: 0
11:34:51:ST3_smx:INFO: List of broken channels: []
11:34:51:ST3_smx:INFO: Total # of broken channels: 0
11:34:51:ST3_smx:INFO: List of broken channels: []
11:34:52:ST3_smx:INFO: chip: 14-7 37.726682 C 1159.654860 mV
11:34:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:34:52:ST3_smx:INFO: Electrons
11:34:52:ST3_smx:INFO: # loops 0
11:34:54:ST3_smx:INFO: # loops 1
11:34:56:ST3_smx:INFO: # loops 2
11:34:58:ST3_smx:INFO: Total # of broken channels: 0
11:34:58:ST3_smx:INFO: List of broken channels: []
11:34:58:ST3_smx:INFO: Total # of broken channels: 0
11:34:58:ST3_smx:INFO: List of broken channels: []
11:34:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:34:58:febtest:INFO: 01-00 | XA-000-09-004-035-008-012-14 | 28.2 | 1236.2
11:34:58:febtest:INFO: 08-01 | XA-000-09-004-035-011-011-00 | 25.1 | 1242.0
11:34:59:febtest:INFO: 03-02 | XA-000-09-004-035-011-012-00 | 37.7 | 1195.1
11:34:59:febtest:INFO: 10-03 | XA-000-09-004-035-014-011-11 | 28.2 | 1224.5
11:34:59:febtest:INFO: 05-04 | XA-000-09-004-035-005-011-09 | 25.1 | 1242.0
11:34:59:febtest:INFO: 12-05 | XA-000-09-004-035-008-010-14 | 37.7 | 1195.1
11:35:00:febtest:INFO: 07-06 | XA-000-09-004-035-008-011-14 | 34.6 | 1206.9
11:35:00:febtest:INFO: 14-07 | XA-000-09-004-035-014-010-11 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_18-11_33_32
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3245| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0790', '1.850', '2.3490', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0680', '1.850', '2.3200', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5228', '0.000', '0.0000', '0.000', '0.0000']