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FEB_3252 24.09.25 16:39:58
Info
16:39:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:39:58:ST3_Shared:INFO: FEB-Microcable
16:39:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:39:58:febtest:INFO: Testing FEB with SN 3252
16:39:59:smx_tester:INFO: Scanning setup
16:39:59:elinks:INFO: Disabling clock on downlink 0
16:39:59:elinks:INFO: Disabling clock on downlink 1
16:39:59:elinks:INFO: Disabling clock on downlink 2
16:39:59:elinks:INFO: Disabling clock on downlink 3
16:39:59:elinks:INFO: Disabling clock on downlink 4
16:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
16:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:39:59:elinks:INFO: Disabling clock on downlink 0
16:39:59:elinks:INFO: Disabling clock on downlink 1
16:39:59:elinks:INFO: Disabling clock on downlink 2
16:39:59:elinks:INFO: Disabling clock on downlink 3
16:39:59:elinks:INFO: Disabling clock on downlink 4
16:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
16:39:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
16:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:39:59:elinks:INFO: Disabling clock on downlink 0
16:39:59:elinks:INFO: Disabling clock on downlink 1
16:39:59:elinks:INFO: Disabling clock on downlink 2
16:39:59:elinks:INFO: Disabling clock on downlink 3
16:39:59:elinks:INFO: Disabling clock on downlink 4
16:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:40:00:elinks:INFO: Disabling clock on downlink 0
16:40:00:elinks:INFO: Disabling clock on downlink 1
16:40:00:elinks:INFO: Disabling clock on downlink 2
16:40:00:elinks:INFO: Disabling clock on downlink 3
16:40:00:elinks:INFO: Disabling clock on downlink 4
16:40:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
16:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:40:00:elinks:INFO: Disabling clock on downlink 0
16:40:00:elinks:INFO: Disabling clock on downlink 1
16:40:00:elinks:INFO: Disabling clock on downlink 2
16:40:00:elinks:INFO: Disabling clock on downlink 3
16:40:00:elinks:INFO: Disabling clock on downlink 4
16:40:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
16:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:40:00:setup_element:INFO: Scanning clock phase
16:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:40:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1
16:40:00:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX__XX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
16:40:00:setup_element:INFO: Eye window for uplink 3 : _______XXXXXX__XX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
16:40:00:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXX___X_______________________________________________________XXXXXXXXXXXX
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXX___X_______________________________________________________XXXXXXXXXXXX
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXX_________________________________________________________X_XXXXXXXXXXXX
Clock Delay: 37
16:40:00:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXX_________________________________________________________X_XXXXXXXXXXXX
Clock Delay: 37
16:40:00:setup_element:INFO: Eye window for uplink 8 : XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
16:40:00:setup_element:INFO: Eye window for uplink 9 : XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
16:40:00:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
16:40:00:setup_element:INFO: Eye window for uplink 12: XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
16:40:00:setup_element:INFO: Eye window for uplink 13: XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
16:40:00:setup_element:INFO: Eye window for uplink 14: XXXXX_____________________________________________________________X_XXXXXXXXXXXX
Clock Delay: 35
16:40:00:setup_element:INFO: Eye window for uplink 15: XXXXX_____________________________________________________________X_XXXXXXXXXXXX
Clock Delay: 35
16:40:00:setup_element:INFO: Setting the clock phase to 41 for group 0, downlink 1
16:40:00:setup_element:INFO: Scanning data phases
16:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:40:05:setup_element:INFO: Data phase scan results for group 0, downlink 1
16:40:05:setup_element:INFO: Eye window for uplink 0 : ____XXXXXXXXX___________________________
Data delay found: 28
16:40:05:setup_element:INFO: Eye window for uplink 1 : ____XXXXXX______________________________
Data delay found: 26
16:40:05:setup_element:INFO: Eye window for uplink 2 : XXXXXXX_______________________________XX
Data delay found: 22
16:40:05:setup_element:INFO: Eye window for uplink 3 : XXXXXX________________________________XX
Data delay found: 21
16:40:05:setup_element:INFO: Eye window for uplink 4 : X_____________________________X_XXXXXXXX
Data delay found: 15
16:40:05:setup_element:INFO: Eye window for uplink 5 : ______________________________XXXXXXXX__
Data delay found: 13
16:40:05:setup_element:INFO: Eye window for uplink 6 : ______________________XXXXXXXXXX________
Data delay found: 6
16:40:05:setup_element:INFO: Eye window for uplink 7 : ______________________XXXXXXXX__________
Data delay found: 5
16:40:05:setup_element:INFO: Eye window for uplink 8 : __________X_XXXXXXXXXXXXX_______________
Data delay found: 37
16:40:05:setup_element:INFO: Eye window for uplink 9 : ________________X_XXXXXXX_______________
Data delay found: 0
16:40:05:setup_element:INFO: Eye window for uplink 10: __________________XXXXXXXX______________
Data delay found: 1
16:40:05:setup_element:INFO: Eye window for uplink 11: __________________XXXXXXXX______________
Data delay found: 1
16:40:05:setup_element:INFO: Eye window for uplink 12: __________________X_XXXXXXXX____________
Data delay found: 2
16:40:05:setup_element:INFO: Eye window for uplink 13: _____________________XXXXXXX____________
Data delay found: 4
16:40:05:setup_element:INFO: Eye window for uplink 14: __________________XXXXXXXXXXX___________
Data delay found: 3
16:40:05:setup_element:INFO: Eye window for uplink 15: ____________X_XXXXXXXXXXXXXXXXXX________
Data delay found: 1
16:40:05:setup_element:INFO: Setting the data phase to 28 for uplink 0
16:40:05:setup_element:INFO: Setting the data phase to 26 for uplink 1
16:40:05:setup_element:INFO: Setting the data phase to 22 for uplink 2
16:40:05:setup_element:INFO: Setting the data phase to 21 for uplink 3
16:40:05:setup_element:INFO: Setting the data phase to 15 for uplink 4
16:40:05:setup_element:INFO: Setting the data phase to 13 for uplink 5
16:40:05:setup_element:INFO: Setting the data phase to 6 for uplink 6
16:40:05:setup_element:INFO: Setting the data phase to 5 for uplink 7
16:40:05:setup_element:INFO: Setting the data phase to 37 for uplink 8
16:40:05:setup_element:INFO: Setting the data phase to 0 for uplink 9
16:40:05:setup_element:INFO: Setting the data phase to 1 for uplink 10
16:40:05:setup_element:INFO: Setting the data phase to 1 for uplink 11
16:40:05:setup_element:INFO: Setting the data phase to 2 for uplink 12
16:40:05:setup_element:INFO: Setting the data phase to 4 for uplink 13
16:40:05:setup_element:INFO: Setting the data phase to 3 for uplink 14
16:40:05:setup_element:INFO: Setting the data phase to 1 for uplink 15
16:40:05:setup_element:INFO: Beginning SMX ASICs map scan
16:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:40:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:40:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:40:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:40:05:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
16:40:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
16:40:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
16:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
16:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
16:40:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
16:40:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
16:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
16:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
16:40:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
16:40:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
16:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
16:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
16:40:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
16:40:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
16:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
16:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
16:40:08:setup_element:INFO: Performing Elink synchronization
16:40:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:40:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:40:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:40:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:40:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
16:40:08:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
16:40:09:febtest:INFO: Init all SMX (CSA): 30
16:40:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:40:25:febtest:INFO: 01-00 | XA-000-09-004-035-018-011-13 | 18.7 | 1236.2
16:40:25:febtest:INFO: 08-01 | XA-000-09-004-035-007-009-10 | 34.6 | 1183.3
16:40:25:febtest:INFO: 03-02 | XA-000-09-004-035-018-012-13 | 15.6 | 1247.9
16:40:25:febtest:INFO: 10-03 | XA-000-09-004-035-004-009-04 | 37.7 | 1165.6
16:40:26:febtest:INFO: 05-04 | XA-000-09-004-035-015-012-06 | 25.1 | 1218.6
16:40:26:febtest:INFO: 12-05 | XA-000-09-004-035-004-008-04 | 44.1 | 1141.9
16:40:26:febtest:INFO: 07-06 | XA-000-09-004-035-012-012-08 | 37.7 | 1177.4
16:40:26:febtest:INFO: 14-07 | XA-000-09-004-035-016-010-14 | 28.2 | 1206.9
16:40:27:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
16:40:29:ST3_smx:INFO: chip: 1-0 15.590880 C 1253.730060 mV
16:40:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:29:ST3_smx:INFO: Electrons
16:40:29:ST3_smx:INFO: # loops 0
16:40:31:ST3_smx:INFO: # loops 1
16:40:33:ST3_smx:INFO: # loops 2
16:40:35:ST3_smx:INFO: Total # of broken channels: 0
16:40:35:ST3_smx:INFO: List of broken channels: []
16:40:35:ST3_smx:INFO: Total # of broken channels: 0
16:40:35:ST3_smx:INFO: List of broken channels: []
16:40:36:ST3_smx:INFO: chip: 8-1 34.556970 C 1200.969315 mV
16:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:36:ST3_smx:INFO: Electrons
16:40:36:ST3_smx:INFO: # loops 0
16:40:38:ST3_smx:INFO: # loops 1
16:40:40:ST3_smx:INFO: # loops 2
16:40:42:ST3_smx:INFO: Total # of broken channels: 0
16:40:42:ST3_smx:INFO: List of broken channels: []
16:40:42:ST3_smx:INFO: Total # of broken channels: 0
16:40:42:ST3_smx:INFO: List of broken channels: []
16:40:43:ST3_smx:INFO: chip: 3-2 15.590880 C 1265.400000 mV
16:40:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:43:ST3_smx:INFO: Electrons
16:40:43:ST3_smx:INFO: # loops 0
16:40:45:ST3_smx:INFO: # loops 1
16:40:47:ST3_smx:INFO: # loops 2
16:40:49:ST3_smx:INFO: Total # of broken channels: 0
16:40:49:ST3_smx:INFO: List of broken channels: []
16:40:49:ST3_smx:INFO: Total # of broken channels: 0
16:40:49:ST3_smx:INFO: List of broken channels: []
16:40:50:ST3_smx:INFO: chip: 10-3 37.726682 C 1183.292940 mV
16:40:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:50:ST3_smx:INFO: Electrons
16:40:50:ST3_smx:INFO: # loops 0
16:40:52:ST3_smx:INFO: # loops 1
16:40:54:ST3_smx:INFO: # loops 2
16:40:56:ST3_smx:INFO: Total # of broken channels: 0
16:40:56:ST3_smx:INFO: List of broken channels: []
16:40:56:ST3_smx:INFO: Total # of broken channels: 0
16:40:56:ST3_smx:INFO: List of broken channels: []
16:40:58:ST3_smx:INFO: chip: 5-4 25.062742 C 1230.330540 mV
16:40:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:40:58:ST3_smx:INFO: Electrons
16:40:58:ST3_smx:INFO: # loops 0
16:40:59:ST3_smx:INFO: # loops 1
16:41:01:ST3_smx:INFO: # loops 2
16:41:03:ST3_smx:INFO: Total # of broken channels: 0
16:41:03:ST3_smx:INFO: List of broken channels: []
16:41:03:ST3_smx:INFO: Total # of broken channels: 0
16:41:03:ST3_smx:INFO: List of broken channels: []
16:41:05:ST3_smx:INFO: chip: 12-5 44.073563 C 1153.732915 mV
16:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:05:ST3_smx:INFO: Electrons
16:41:05:ST3_smx:INFO: # loops 0
16:41:06:ST3_smx:INFO: # loops 1
16:41:08:ST3_smx:INFO: # loops 2
16:41:10:ST3_smx:INFO: Total # of broken channels: 0
16:41:10:ST3_smx:INFO: List of broken channels: []
16:41:10:ST3_smx:INFO: Total # of broken channels: 0
16:41:10:ST3_smx:INFO: List of broken channels: []
16:41:12:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
16:41:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:12:ST3_smx:INFO: Electrons
16:41:12:ST3_smx:INFO: # loops 0
16:41:13:ST3_smx:INFO: # loops 1
16:41:15:ST3_smx:INFO: # loops 2
16:41:17:ST3_smx:INFO: Total # of broken channels: 0
16:41:17:ST3_smx:INFO: List of broken channels: []
16:41:17:ST3_smx:INFO: Total # of broken channels: 0
16:41:17:ST3_smx:INFO: List of broken channels: []
16:41:19:ST3_smx:INFO: chip: 14-7 28.225000 C 1218.600960 mV
16:41:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:41:19:ST3_smx:INFO: Electrons
16:41:19:ST3_smx:INFO: # loops 0
16:41:20:ST3_smx:INFO: # loops 1
16:41:22:ST3_smx:INFO: # loops 2
16:41:24:ST3_smx:INFO: Total # of broken channels: 0
16:41:24:ST3_smx:INFO: List of broken channels: []
16:41:24:ST3_smx:INFO: Total # of broken channels: 0
16:41:24:ST3_smx:INFO: List of broken channels: []
16:41:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:41:25:febtest:INFO: 01-00 | XA-000-09-004-035-018-011-13 | 18.7 | 1277.1
16:41:25:febtest:INFO: 08-01 | XA-000-09-004-035-007-009-10 | 37.7 | 1218.6
16:41:25:febtest:INFO: 03-02 | XA-000-09-004-035-018-012-13 | 18.7 | 1311.9
16:41:25:febtest:INFO: 10-03 | XA-000-09-004-035-004-009-04 | 40.9 | 1201.0
16:41:25:febtest:INFO: 05-04 | XA-000-09-004-035-015-012-06 | 28.2 | 1253.7
16:41:26:febtest:INFO: 12-05 | XA-000-09-004-035-004-008-04 | 47.3 | 1177.4
16:41:26:febtest:INFO: 07-06 | XA-000-09-004-035-012-012-08 | 40.9 | 1206.9
16:41:26:febtest:INFO: 14-07 | XA-000-09-004-035-016-010-14 | 31.4 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_24-16_39_58
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3252| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4740', '1.850', '1.9890', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0410', '1.850', '2.3210', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9740', '1.850', '0.5174', '0.000', '0.0000', '0.000', '0.0000']