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FEB_3254 24.09.25 10:29:52
Info
10:29:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:29:52:ST3_Shared:INFO: FEB-Microcable
10:29:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:29:52:febtest:INFO: Testing FEB with SN 3254
10:29:54:smx_tester:INFO: Scanning setup
10:29:54:elinks:INFO: Disabling clock on downlink 0
10:29:54:elinks:INFO: Disabling clock on downlink 1
10:29:54:elinks:INFO: Disabling clock on downlink 2
10:29:54:elinks:INFO: Disabling clock on downlink 3
10:29:54:elinks:INFO: Disabling clock on downlink 4
10:29:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:29:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:29:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:29:54:elinks:INFO: Disabling clock on downlink 0
10:29:54:elinks:INFO: Disabling clock on downlink 1
10:29:54:elinks:INFO: Disabling clock on downlink 2
10:29:54:elinks:INFO: Disabling clock on downlink 3
10:29:54:elinks:INFO: Disabling clock on downlink 4
10:29:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:29:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:29:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:29:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:29:54:elinks:INFO: Disabling clock on downlink 0
10:29:54:elinks:INFO: Disabling clock on downlink 1
10:29:54:elinks:INFO: Disabling clock on downlink 2
10:29:54:elinks:INFO: Disabling clock on downlink 3
10:29:54:elinks:INFO: Disabling clock on downlink 4
10:29:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:29:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:29:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:29:54:elinks:INFO: Disabling clock on downlink 0
10:29:54:elinks:INFO: Disabling clock on downlink 1
10:29:54:elinks:INFO: Disabling clock on downlink 2
10:29:54:elinks:INFO: Disabling clock on downlink 3
10:29:54:elinks:INFO: Disabling clock on downlink 4
10:29:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:29:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:29:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:29:55:elinks:INFO: Disabling clock on downlink 0
10:29:55:elinks:INFO: Disabling clock on downlink 1
10:29:55:elinks:INFO: Disabling clock on downlink 2
10:29:55:elinks:INFO: Disabling clock on downlink 3
10:29:55:elinks:INFO: Disabling clock on downlink 4
10:29:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:29:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:29:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:29:55:setup_element:INFO: Scanning clock phase
10:29:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:29:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:29:55:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:29:55:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
10:29:55:setup_element:INFO: Eye window for uplink 14: XXXXXXX____________________________________________________________XXXXXXXXXXXXX
Clock Delay: 36
10:29:55:setup_element:INFO: Eye window for uplink 15: XXXXXXX____________________________________________________________XXXXXXXXXXXXX
Clock Delay: 36
10:29:55:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
10:29:55:setup_element:INFO: Scanning data phases
10:29:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:29:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:30:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:30:00:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXXXXXXXXX___
Data delay found: 9
10:30:00:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXXXXXX___
Data delay found: 11
10:30:00:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXXXXX__
Data delay found: 13
10:30:00:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXXXXXXX_
Data delay found: 13
10:30:00:setup_element:INFO: Eye window for uplink 12: ______________________X_XXXXXXXXXX______
Data delay found: 7
10:30:00:setup_element:INFO: Eye window for uplink 13: ________________________X_XXXXXXXXX_____
Data delay found: 9
10:30:00:setup_element:INFO: Eye window for uplink 14: ________________________XXXXXXXXXXXXX___
Data delay found: 10
10:30:00:setup_element:INFO: Eye window for uplink 15: ___________________X_XXXXXXXXXXXXXXXXX__
Data delay found: 8
10:30:00:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:30:00:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:30:00:setup_element:INFO: Setting the data phase to 13 for uplink 10
10:30:00:setup_element:INFO: Setting the data phase to 13 for uplink 11
10:30:00:setup_element:INFO: Setting the data phase to 7 for uplink 12
10:30:00:setup_element:INFO: Setting the data phase to 9 for uplink 13
10:30:00:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:30:00:setup_element:INFO: Setting the data phase to 8 for uplink 15
10:30:00:setup_element:INFO: Beginning SMX ASICs map scan
10:30:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:30:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:30:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:30:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:30:00:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:30:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:30:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:30:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:30:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:30:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:30:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:30:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:30:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:30:03:setup_element:INFO: Performing Elink synchronization
10:30:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:30:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:30:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:30:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:30:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:30:03:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:30:03:febtest:INFO: Init all SMX (CSA): 30
10:30:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:12:febtest:INFO: 08-01 | XA-000-09-004-035-004-020-03 | 25.1 | 1177.4
10:30:12:febtest:INFO: 10-03 | XA-000-09-004-035-004-022-03 | 31.4 | 1159.7
10:30:12:febtest:INFO: 12-05 | XA-000-09-004-035-013-021-02 | 21.9 | 1195.1
10:30:12:febtest:INFO: 14-07 | XA-000-09-004-035-004-021-03 | 21.9 | 1195.1
10:30:13:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:30:15:ST3_smx:INFO: chip: 8-1 25.062742 C 1195.082160 mV
10:30:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:15:ST3_smx:INFO: Electrons
10:30:15:ST3_smx:INFO: # loops 0
10:30:17:ST3_smx:INFO: # loops 1
10:30:19:ST3_smx:INFO: # loops 2
10:30:21:ST3_smx:INFO: Total # of broken channels: 0
10:30:21:ST3_smx:INFO: List of broken channels: []
10:30:21:ST3_smx:INFO: Total # of broken channels: 0
10:30:21:ST3_smx:INFO: List of broken channels: []
10:30:23:ST3_smx:INFO: chip: 10-3 31.389742 C 1171.483840 mV
10:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:23:ST3_smx:INFO: Electrons
10:30:23:ST3_smx:INFO: # loops 0
10:30:25:ST3_smx:INFO: # loops 1
10:30:27:ST3_smx:INFO: # loops 2
10:30:28:ST3_smx:INFO: Total # of broken channels: 0
10:30:28:ST3_smx:INFO: List of broken channels: []
10:30:28:ST3_smx:INFO: Total # of broken channels: 0
10:30:28:ST3_smx:INFO: List of broken channels: []
10:30:30:ST3_smx:INFO: chip: 12-5 21.902970 C 1200.969315 mV
10:30:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:30:ST3_smx:INFO: Electrons
10:30:30:ST3_smx:INFO: # loops 0
10:30:31:ST3_smx:INFO: # loops 1
10:30:33:ST3_smx:INFO: # loops 2
10:30:35:ST3_smx:INFO: Total # of broken channels: 0
10:30:35:ST3_smx:INFO: List of broken channels: []
10:30:35:ST3_smx:INFO: Total # of broken channels: 0
10:30:35:ST3_smx:INFO: List of broken channels: []
10:30:37:ST3_smx:INFO: chip: 14-7 25.062742 C 1200.969315 mV
10:30:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:37:ST3_smx:INFO: Electrons
10:30:37:ST3_smx:INFO: # loops 0
10:30:39:ST3_smx:INFO: # loops 1
10:30:40:ST3_smx:INFO: # loops 2
10:30:42:ST3_smx:INFO: Total # of broken channels: 0
10:30:42:ST3_smx:INFO: List of broken channels: []
10:30:42:ST3_smx:INFO: Total # of broken channels: 0
10:30:42:ST3_smx:INFO: List of broken channels: []
10:30:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:42:febtest:INFO: 08-01 | XA-000-09-004-035-004-020-03 | 25.1 | 1212.7
10:30:42:febtest:INFO: 10-03 | XA-000-09-004-035-004-022-03 | 31.4 | 1195.1
10:30:43:febtest:INFO: 12-05 | XA-000-09-004-035-013-021-02 | 25.1 | 1224.5
10:30:43:febtest:INFO: 14-07 | XA-000-09-004-035-004-021-03 | 25.1 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_24-10_29_52
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3254| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '0.8029', '1.850', '1.0190', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0080', '1.850', '1.0300', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9921', '1.850', '0.2648', '0.000', '0.0000', '0.000', '0.0000']