FEB_3255 25.09.25 17:12:40
Info
17:12:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:12:40:ST3_Shared:INFO: FEB-Microcable
17:12:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:12:40:febtest:INFO: Testing FEB with SN 3255
17:12:42:smx_tester:INFO: Scanning setup
17:12:42:elinks:INFO: Disabling clock on downlink 0
17:12:42:elinks:INFO: Disabling clock on downlink 1
17:12:42:elinks:INFO: Disabling clock on downlink 2
17:12:42:elinks:INFO: Disabling clock on downlink 3
17:12:42:elinks:INFO: Disabling clock on downlink 4
17:12:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
17:12:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:12:42:elinks:INFO: Disabling clock on downlink 0
17:12:42:elinks:INFO: Disabling clock on downlink 1
17:12:42:elinks:INFO: Disabling clock on downlink 2
17:12:42:elinks:INFO: Disabling clock on downlink 3
17:12:42:elinks:INFO: Disabling clock on downlink 4
17:12:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
17:12:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
17:12:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:12:42:elinks:INFO: Disabling clock on downlink 0
17:12:42:elinks:INFO: Disabling clock on downlink 1
17:12:42:elinks:INFO: Disabling clock on downlink 2
17:12:42:elinks:INFO: Disabling clock on downlink 3
17:12:42:elinks:INFO: Disabling clock on downlink 4
17:12:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:12:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:12:42:elinks:INFO: Disabling clock on downlink 0
17:12:42:elinks:INFO: Disabling clock on downlink 1
17:12:42:elinks:INFO: Disabling clock on downlink 2
17:12:42:elinks:INFO: Disabling clock on downlink 3
17:12:42:elinks:INFO: Disabling clock on downlink 4
17:12:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
17:12:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:12:42:elinks:INFO: Disabling clock on downlink 0
17:12:42:elinks:INFO: Disabling clock on downlink 1
17:12:42:elinks:INFO: Disabling clock on downlink 2
17:12:42:elinks:INFO: Disabling clock on downlink 3
17:12:42:elinks:INFO: Disabling clock on downlink 4
17:12:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
17:12:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:12:42:setup_element:INFO: Scanning clock phase
17:12:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:12:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:12:43:setup_element:INFO: Clock phase scan results for group 0, downlink 1
17:12:43:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXX______________________________________________________X_XXXXXXX
Clock Delay: 43
17:12:43:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXX______________________________________________________X_XXXXXXX
Clock Delay: 43
17:12:43:setup_element:INFO: Eye window for uplink 2 : _________XXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
17:12:43:setup_element:INFO: Eye window for uplink 3 : _________XXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
17:12:43:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXX_XX_______________________________________________________XXXXXXXXXXX
Clock Delay: 41
17:12:43:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXX_XX_______________________________________________________XXXXXXXXXXX
Clock Delay: 41
17:12:43:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXX_X___________________________________________________________________
Clock Delay: 46
17:12:43:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXX_X___________________________________________________________________
Clock Delay: 46
17:12:43:setup_element:INFO: Eye window for uplink 8 : XXX__________________________________________________________________XXXXXXXXXXX
Clock Delay: 35
17:12:43:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________________________________________XXXXXXXXXXX
Clock Delay: 35
17:12:43:setup_element:INFO: Eye window for uplink 10: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
17:12:43:setup_element:INFO: Eye window for uplink 11: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
17:12:43:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
17:12:43:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
17:12:43:setup_element:INFO: Eye window for uplink 14: XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
17:12:43:setup_element:INFO: Eye window for uplink 15: XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
17:12:43:setup_element:INFO: Setting the clock phase to 42 for group 0, downlink 1
17:12:43:setup_element:INFO: Scanning data phases
17:12:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:12:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:12:48:setup_element:INFO: Data phase scan results for group 0, downlink 1
17:12:48:setup_element:INFO: Eye window for uplink 0 : XXXXXXXX________________________________
Data delay found: 23
17:12:48:setup_element:INFO: Eye window for uplink 1 : XXXXXXX_____________________________XXXX
Data delay found: 21
17:12:48:setup_element:INFO: Eye window for uplink 2 : XXXXXXX_______________________________XX
Data delay found: 22
17:12:48:setup_element:INFO: Eye window for uplink 3 : XXXXXXX_____________________________XXXX
Data delay found: 21
17:12:48:setup_element:INFO: Eye window for uplink 4 : XXX____________________________XXXXXXXXX
Data delay found: 16
17:12:48:setup_element:INFO: Eye window for uplink 5 : X___________________________XXXXXXXXXXXX
Data delay found: 14
17:12:48:setup_element:INFO: Eye window for uplink 6 : _______________________X__XXXXXXXXX_____
Data delay found: 8
17:12:48:setup_element:INFO: Eye window for uplink 7 : _______________________XX_XXXXXXXX______
Data delay found: 8
17:12:48:setup_element:INFO: Eye window for uplink 8 : ____________XXXXXXXXXXXXX_______________
Data delay found: 38
17:12:48:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXX_______________
Data delay found: 0
17:12:48:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXXX_______________
Data delay found: 0
17:12:48:setup_element:INFO: Eye window for uplink 11: _________________XXXXXXXXX______________
Data delay found: 1
17:12:48:setup_element:INFO: Eye window for uplink 12: ________X_X___X_XXXXXXXXX________X______
Data delay found: 0
17:12:48:setup_element:INFO: Eye window for uplink 13: ________X_X___X_XXXXXXXXX________X______
Data delay found: 0
17:12:48:setup_element:INFO: Eye window for uplink 14: ______________X_XXXXXXXXXX______________
Data delay found: 39
17:12:48:setup_element:INFO: Eye window for uplink 15: ________XXXXXXXXXXXXXXXXXXXXX___________
Data delay found: 38
17:12:48:setup_element:INFO: Setting the data phase to 23 for uplink 0
17:12:48:setup_element:INFO: Setting the data phase to 21 for uplink 1
17:12:48:setup_element:INFO: Setting the data phase to 22 for uplink 2
17:12:48:setup_element:INFO: Setting the data phase to 21 for uplink 3
17:12:48:setup_element:INFO: Setting the data phase to 16 for uplink 4
17:12:48:setup_element:INFO: Setting the data phase to 14 for uplink 5
17:12:48:setup_element:INFO: Setting the data phase to 8 for uplink 6
17:12:48:setup_element:INFO: Setting the data phase to 8 for uplink 7
17:12:48:setup_element:INFO: Setting the data phase to 38 for uplink 8
17:12:48:setup_element:INFO: Setting the data phase to 0 for uplink 9
17:12:48:setup_element:INFO: Setting the data phase to 0 for uplink 10
17:12:48:setup_element:INFO: Setting the data phase to 1 for uplink 11
17:12:48:setup_element:INFO: Setting the data phase to 0 for uplink 12
17:12:48:setup_element:INFO: Setting the data phase to 0 for uplink 13
17:12:48:setup_element:INFO: Setting the data phase to 39 for uplink 14
17:12:48:setup_element:INFO: Setting the data phase to 38 for uplink 15
17:12:48:setup_element:INFO: Beginning SMX ASICs map scan
17:12:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:12:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:12:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
17:12:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
17:12:48:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
17:12:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
17:12:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
17:12:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
17:12:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
17:12:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
17:12:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
17:12:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
17:12:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
17:12:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
17:12:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
17:12:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
17:12:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
17:12:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
17:12:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
17:12:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
17:12:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
17:12:50:setup_element:INFO: Performing Elink synchronization
17:12:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:12:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:12:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
17:12:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
17:12:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
17:12:50:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
17:12:51:febtest:INFO: Init all SMX (CSA): 30
17:13:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
17:13:05:febtest:INFO: 01-00 | XA-000-09-004-035-016-006-14 | 31.4 | 1177.4
17:13:06:febtest:INFO: 08-01 | XA-000-09-004-035-013-006-05 | 31.4 | 1183.3
17:13:06:febtest:INFO: 03-02 | XA-000-09-004-035-016-007-14 | 18.7 | 1224.5
17:13:06:febtest:INFO: 10-03 | XA-000-09-004-035-010-006-13 | 28.2 | 1201.0
17:13:06:febtest:INFO: 05-04 | XA-000-09-004-035-013-007-05 | 25.1 | 1212.7
17:13:06:febtest:INFO: 12-05 | XA-000-09-004-035-007-006-10 | 31.4 | 1189.2
17:13:07:febtest:INFO: 07-06 | XA-000-09-004-035-010-007-13 | 28.2 | 1206.9
17:13:07:febtest:INFO: 14-07 | XA-000-09-004-035-004-006-04 | 18.7 | 1224.5
17:13:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
17:13:10:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV
17:13:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:10:ST3_smx:INFO: Electrons
17:13:10:ST3_smx:INFO: # loops 0
17:13:11:ST3_smx:INFO: # loops 1
17:13:13:ST3_smx:INFO: # loops 2
17:13:14:ST3_smx:INFO: Total # of broken channels: 0
17:13:14:ST3_smx:INFO: List of broken channels: []
17:13:14:ST3_smx:INFO: Total # of broken channels: 0
17:13:14:ST3_smx:INFO: List of broken channels: []
17:13:16:ST3_smx:INFO: chip: 8-1 28.225000 C 1195.082160 mV
17:13:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:16:ST3_smx:INFO: Electrons
17:13:16:ST3_smx:INFO: # loops 0
17:13:18:ST3_smx:INFO: # loops 1
17:13:19:ST3_smx:INFO: # loops 2
17:13:21:ST3_smx:INFO: Total # of broken channels: 0
17:13:21:ST3_smx:INFO: List of broken channels: []
17:13:21:ST3_smx:INFO: Total # of broken channels: 0
17:13:21:ST3_smx:INFO: List of broken channels: []
17:13:23:ST3_smx:INFO: chip: 3-2 21.902970 C 1242.040240 mV
17:13:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:23:ST3_smx:INFO: Electrons
17:13:23:ST3_smx:INFO: # loops 0
17:13:24:ST3_smx:INFO: # loops 1
17:13:26:ST3_smx:INFO: # loops 2
17:13:28:ST3_smx:INFO: Total # of broken channels: 0
17:13:28:ST3_smx:INFO: List of broken channels: []
17:13:28:ST3_smx:INFO: Total # of broken channels: 0
17:13:28:ST3_smx:INFO: List of broken channels: []
17:13:29:ST3_smx:INFO: chip: 10-3 28.225000 C 1212.728715 mV
17:13:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:29:ST3_smx:INFO: Electrons
17:13:29:ST3_smx:INFO: # loops 0
17:13:31:ST3_smx:INFO: # loops 1
17:13:32:ST3_smx:INFO: # loops 2
17:13:34:ST3_smx:INFO: Total # of broken channels: 0
17:13:34:ST3_smx:INFO: List of broken channels: []
17:13:34:ST3_smx:INFO: Total # of broken channels: 0
17:13:34:ST3_smx:INFO: List of broken channels: []
17:13:35:ST3_smx:INFO: chip: 5-4 25.062742 C 1224.468235 mV
17:13:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:35:ST3_smx:INFO: Electrons
17:13:35:ST3_smx:INFO: # loops 0
17:13:37:ST3_smx:INFO: # loops 1
17:13:39:ST3_smx:INFO: # loops 2
17:13:40:ST3_smx:INFO: Total # of broken channels: 0
17:13:40:ST3_smx:INFO: List of broken channels: []
17:13:40:ST3_smx:INFO: Total # of broken channels: 0
17:13:40:ST3_smx:INFO: List of broken channels: []
17:13:42:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
17:13:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:42:ST3_smx:INFO: Electrons
17:13:42:ST3_smx:INFO: # loops 0
17:13:43:ST3_smx:INFO: # loops 1
17:13:45:ST3_smx:INFO: # loops 2
17:13:47:ST3_smx:INFO: Total # of broken channels: 0
17:13:47:ST3_smx:INFO: List of broken channels: []
17:13:47:ST3_smx:INFO: Total # of broken channels: 0
17:13:47:ST3_smx:INFO: List of broken channels: []
17:13:49:ST3_smx:INFO: chip: 7-6 28.225000 C 1212.728715 mV
17:13:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:49:ST3_smx:INFO: Electrons
17:13:49:ST3_smx:INFO: # loops 0
17:13:50:ST3_smx:INFO: # loops 1
17:13:52:ST3_smx:INFO: # loops 2
17:13:54:ST3_smx:INFO: Total # of broken channels: 0
17:13:54:ST3_smx:INFO: List of broken channels: []
17:13:54:ST3_smx:INFO: Total # of broken channels: 0
17:13:54:ST3_smx:INFO: List of broken channels: []
17:13:55:ST3_smx:INFO: chip: 14-7 21.902970 C 1242.040240 mV
17:13:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:13:55:ST3_smx:INFO: Electrons
17:13:55:ST3_smx:INFO: # loops 0
17:13:57:ST3_smx:INFO: # loops 1
17:13:59:ST3_smx:INFO: # loops 2
17:14:00:ST3_smx:INFO: Total # of broken channels: 0
17:14:00:ST3_smx:INFO: List of broken channels: []
17:14:00:ST3_smx:INFO: Total # of broken channels: 0
17:14:00:ST3_smx:INFO: List of broken channels: []
17:14:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
17:14:01:febtest:INFO: 01-00 | XA-000-09-004-035-016-006-14 | 31.4 | 1212.7
17:14:01:febtest:INFO: 08-01 | XA-000-09-004-035-013-006-05 | 31.4 | 1218.6
17:14:01:febtest:INFO: 03-02 | XA-000-09-004-035-016-007-14 | 21.9 | 1259.6
17:14:01:febtest:INFO: 10-03 | XA-000-09-004-035-010-006-13 | 28.2 | 1236.2
17:14:02:febtest:INFO: 05-04 | XA-000-09-004-035-013-007-05 | 28.2 | 1242.0
17:14:02:febtest:INFO: 12-05 | XA-000-09-004-035-007-006-10 | 31.4 | 1230.3
17:14:02:febtest:INFO: 07-06 | XA-000-09-004-035-010-007-13 | 31.4 | 1236.2
17:14:02:febtest:INFO: 14-07 | XA-000-09-004-035-004-006-04 | 21.9 | 1259.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_25-17_12_40
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3255| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4220', '1.850', '1.9280', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9940', '1.850', '2.3790', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9560', '1.850', '0.5148', '0.000', '0.0000', '0.000', '0.0000']