DTL-STS tests database

FEB_3256 01.10.25 15:08:30

link: XA-000-09-004-035-003-012-12
...SMX_1.root
link: XA-000-09-004-035-006-012-07
...SMX_3.root
link: XA-000-09-004-035-009-012-03
...SMX_5.root
link: XA-000-09-004-035-015-022-01
...SMX_7.root
link: XA-000-09-004-035-009-013-03
...SMX_0.root
link: XA-000-09-004-035-012-013-08
...SMX_2.root
link: XA-000-09-004-035-015-013-06
...SMX_4.root
link: XA-000-09-004-035-003-013-12
...SMX_6.root
link: XA-000-09-004-035-003-013-12
...VddmCSAstatus.root
Info
            15:08:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:30:ST3_Shared:INFO:	                         FEB-Sensor                         
15:08:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:49:ST3_ModuleSelector:INFO:	L3UL301012 M3UL3T4010124B2 124 C

15:08:49:ST3_ModuleSelector:INFO:	30114

15:08:49:febtest:INFO:	Testing FEB with SN 3256
15:08:50:smx_tester:INFO:	Scanning setup
15:08:51:elinks:INFO:	Disabling clock on downlink 0
15:08:51:elinks:INFO:	Disabling clock on downlink 1
15:08:51:elinks:INFO:	Disabling clock on downlink 2
15:08:51:elinks:INFO:	Disabling clock on downlink 3
15:08:51:elinks:INFO:	Disabling clock on downlink 4
15:08:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:08:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:08:51:elinks:INFO:	Disabling clock on downlink 0
15:08:51:elinks:INFO:	Disabling clock on downlink 1
15:08:51:elinks:INFO:	Disabling clock on downlink 2
15:08:51:elinks:INFO:	Disabling clock on downlink 3
15:08:51:elinks:INFO:	Disabling clock on downlink 4
15:08:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
15:08:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
15:08:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:08:51:elinks:INFO:	Disabling clock on downlink 0
15:08:51:elinks:INFO:	Disabling clock on downlink 1
15:08:51:elinks:INFO:	Disabling clock on downlink 2
15:08:51:elinks:INFO:	Disabling clock on downlink 3
15:08:51:elinks:INFO:	Disabling clock on downlink 4
15:08:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:08:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:08:51:elinks:INFO:	Disabling clock on downlink 0
15:08:51:elinks:INFO:	Disabling clock on downlink 1
15:08:51:elinks:INFO:	Disabling clock on downlink 2
15:08:51:elinks:INFO:	Disabling clock on downlink 3
15:08:51:elinks:INFO:	Disabling clock on downlink 4
15:08:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:08:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:08:51:elinks:INFO:	Disabling clock on downlink 0
15:08:51:elinks:INFO:	Disabling clock on downlink 1
15:08:51:elinks:INFO:	Disabling clock on downlink 2
15:08:51:elinks:INFO:	Disabling clock on downlink 3
15:08:51:elinks:INFO:	Disabling clock on downlink 4
15:08:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:08:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:08:51:setup_element:INFO:	Scanning clock phase
15:08:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:08:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:08:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
15:08:51:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXXXXXXXXX_X_________________________________________________XXXXXXXXXXX
Clock Delay: 44
15:08:51:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXXXXX_X_________________________________________________XXXXXXXXXXX
Clock Delay: 44
15:08:51:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXX
Clock Delay: 42
15:08:51:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXX
Clock Delay: 42
15:08:51:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
15:08:51:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
15:08:51:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXXXXX_XX_______________________________________________________XXXXXXXXXXX
Clock Delay: 41
15:08:51:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXX_XX_______________________________________________________XXXXXXXXXXX
Clock Delay: 41
15:08:51:setup_element:INFO:	Eye window for uplink 8 : XXX_XX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
15:08:51:setup_element:INFO:	Eye window for uplink 9 : XXX_XX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
15:08:52:setup_element:INFO:	Eye window for uplink 10: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
15:08:52:setup_element:INFO:	Eye window for uplink 11: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
15:08:52:setup_element:INFO:	Eye window for uplink 12: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
15:08:52:setup_element:INFO:	Eye window for uplink 13: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
15:08:52:setup_element:INFO:	Eye window for uplink 14: XXXXXXX_______________________________________________________________XXXXXXXXXX
Clock Delay: 38
15:08:52:setup_element:INFO:	Eye window for uplink 15: XXXXXXX_______________________________________________________________XXXXXXXXXX
Clock Delay: 38
15:08:52:setup_element:INFO:	Setting the clock phase to 43 for group 0, downlink 1
15:08:52:setup_element:INFO:	Scanning data phases
15:08:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:08:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:08:57:setup_element:INFO:	Data phase scan results for group 0, downlink 1
15:08:57:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXX______________________________XX
Data delay found: 22
15:08:57:setup_element:INFO:	Eye window for uplink 1 : XXXXX_______________________________XXXX
Data delay found: 20
15:08:57:setup_element:INFO:	Eye window for uplink 2 : XXX_______________________________XXXXXX
Data delay found: 18
15:08:57:setup_element:INFO:	Eye window for uplink 3 : XXX_______________________________XXXXXX
Data delay found: 18
15:08:57:setup_element:INFO:	Eye window for uplink 4 : X______________________________X_XXXXXXX
Data delay found: 15
15:08:57:setup_element:INFO:	Eye window for uplink 5 : ________________________________XXXXXXX_
Data delay found: 15
15:08:57:setup_element:INFO:	Eye window for uplink 6 : __________________________XXXXXXXXX_____
Data delay found: 10
15:08:57:setup_element:INFO:	Eye window for uplink 7 : ______________________X_XXXXXXXXX_______
Data delay found: 7
15:08:57:setup_element:INFO:	Eye window for uplink 8 : ___________XXXXXXXXXXXXXX_______________
Data delay found: 37
15:08:57:setup_element:INFO:	Eye window for uplink 9 : ________________XXXXXXXX________________
Data delay found: 39
15:08:57:setup_element:INFO:	Eye window for uplink 10: ______________X_XXXXXXXX________________
Data delay found: 38
15:08:57:setup_element:INFO:	Eye window for uplink 11: ________________XXXXXXXX________________
Data delay found: 39
15:08:57:setup_element:INFO:	Eye window for uplink 12: ____________XXXXXXXXXX__________________
Data delay found: 36
15:08:57:setup_element:INFO:	Eye window for uplink 13: ______________XXXXXXXX__________________
Data delay found: 37
15:08:57:setup_element:INFO:	Eye window for uplink 14: _________________XXXXXXXXXX_____________
Data delay found: 1
15:08:57:setup_element:INFO:	Eye window for uplink 15: ___________X_XXXXXXXXXXXXXXXXX__________
Data delay found: 0
15:08:57:setup_element:INFO:	Setting the data phase to 22 for uplink 0
15:08:57:setup_element:INFO:	Setting the data phase to 20 for uplink 1
15:08:57:setup_element:INFO:	Setting the data phase to 18 for uplink 2
15:08:57:setup_element:INFO:	Setting the data phase to 18 for uplink 3
15:08:57:setup_element:INFO:	Setting the data phase to 15 for uplink 4
15:08:57:setup_element:INFO:	Setting the data phase to 15 for uplink 5
15:08:57:setup_element:INFO:	Setting the data phase to 10 for uplink 6
15:08:57:setup_element:INFO:	Setting the data phase to 7 for uplink 7
15:08:57:setup_element:INFO:	Setting the data phase to 37 for uplink 8
15:08:57:setup_element:INFO:	Setting the data phase to 39 for uplink 9
15:08:57:setup_element:INFO:	Setting the data phase to 38 for uplink 10
15:08:57:setup_element:INFO:	Setting the data phase to 39 for uplink 11
15:08:57:setup_element:INFO:	Setting the data phase to 36 for uplink 12
15:08:57:setup_element:INFO:	Setting the data phase to 37 for uplink 13
15:08:57:setup_element:INFO:	Setting the data phase to 1 for uplink 14
15:08:57:setup_element:INFO:	Setting the data phase to 0 for uplink 15
15:08:57:setup_element:INFO:	Beginning SMX ASICs map scan
15:08:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:08:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:08:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
15:08:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
15:08:57:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:08:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:08:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:08:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:08:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:08:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:08:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:08:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:08:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:08:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:08:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:08:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:08:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:08:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:08:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:08:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:08:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:08:59:setup_element:INFO:	Performing Elink synchronization
15:08:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:08:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:08:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
15:08:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
15:08:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
15:08:59:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:09:00:febtest:INFO:	Init all SMX (CSA): 30
15:09:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:09:14:febtest:INFO:	01-00 | XA-000-09-004-035-009-013-03 |  28.2 | 1177.4
15:09:15:febtest:INFO:	08-01 | XA-000-09-004-035-003-012-12 |  28.2 | 1183.3
15:09:15:febtest:INFO:	03-02 | XA-000-09-004-035-012-013-08 |  21.9 | 1206.9
15:09:15:febtest:INFO:	10-03 | XA-000-09-004-035-006-012-07 |  21.9 | 1212.7
15:09:15:febtest:INFO:	05-04 | XA-000-09-004-035-015-013-06 |  18.7 | 1218.6
15:09:15:febtest:INFO:	12-05 | XA-000-09-004-035-009-012-03 |  37.7 | 1147.8
15:09:16:febtest:INFO:	07-06 | XA-000-09-004-035-003-013-12 |  21.9 | 1206.9
15:09:16:febtest:INFO:	14-07 | XA-000-09-004-035-015-022-01 |  15.6 | 1224.5
15:09:17:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:09:19:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1189.190035 mV
15:09:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:19:ST3_smx:INFO:		Electrons
15:09:19:ST3_smx:INFO:	# loops 0
15:09:20:ST3_smx:INFO:	# loops 1
15:09:22:ST3_smx:INFO:	# loops 2
15:09:24:ST3_smx:INFO:	Total # of broken channels: 0
15:09:24:ST3_smx:INFO:	List of broken channels: []
15:09:24:ST3_smx:INFO:	Total # of broken channels: 0
15:09:24:ST3_smx:INFO:	List of broken channels: []
15:09:26:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1195.082160 mV
15:09:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:26:ST3_smx:INFO:		Electrons
15:09:26:ST3_smx:INFO:	# loops 0
15:09:28:ST3_smx:INFO:	# loops 1
15:09:29:ST3_smx:INFO:	# loops 2
15:09:31:ST3_smx:INFO:	Total # of broken channels: 0
15:09:31:ST3_smx:INFO:	List of broken channels: []
15:09:31:ST3_smx:INFO:	Total # of broken channels: 0
15:09:31:ST3_smx:INFO:	List of broken channels: []
15:09:33:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1218.600960 mV
15:09:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:33:ST3_smx:INFO:		Electrons
15:09:33:ST3_smx:INFO:	# loops 0
15:09:34:ST3_smx:INFO:	# loops 1
15:09:36:ST3_smx:INFO:	# loops 2
15:09:38:ST3_smx:INFO:	Total # of broken channels: 0
15:09:38:ST3_smx:INFO:	List of broken channels: []
15:09:38:ST3_smx:INFO:	Total # of broken channels: 0
15:09:38:ST3_smx:INFO:	List of broken channels: []
15:09:40:ST3_smx:INFO:	chip: 10-3 	 21.902970 C 	 1230.330540 mV
15:09:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:40:ST3_smx:INFO:		Electrons
15:09:40:ST3_smx:INFO:	# loops 0
15:09:41:ST3_smx:INFO:	# loops 1
15:09:43:ST3_smx:INFO:	# loops 2
15:09:45:ST3_smx:INFO:	Total # of broken channels: 0
15:09:45:ST3_smx:INFO:	List of broken channels: []
15:09:45:ST3_smx:INFO:	Total # of broken channels: 0
15:09:45:ST3_smx:INFO:	List of broken channels: []
15:09:46:ST3_smx:INFO:	chip: 5-4 	 18.745682 C 	 1230.330540 mV
15:09:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:46:ST3_smx:INFO:		Electrons
15:09:46:ST3_smx:INFO:	# loops 0
15:09:48:ST3_smx:INFO:	# loops 1
15:09:49:ST3_smx:INFO:	# loops 2
15:09:51:ST3_smx:INFO:	Total # of broken channels: 0
15:09:51:ST3_smx:INFO:	List of broken channels: []
15:09:51:ST3_smx:INFO:	Total # of broken channels: 0
15:09:51:ST3_smx:INFO:	List of broken channels: []
15:09:53:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1165.571835 mV
15:09:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:53:ST3_smx:INFO:		Electrons
15:09:53:ST3_smx:INFO:	# loops 0
15:09:54:ST3_smx:INFO:	# loops 1
15:09:56:ST3_smx:INFO:	# loops 2
15:09:58:ST3_smx:INFO:	Total # of broken channels: 0
15:09:58:ST3_smx:INFO:	List of broken channels: []
15:09:58:ST3_smx:INFO:	Total # of broken channels: 0
15:09:58:ST3_smx:INFO:	List of broken channels: []
15:09:59:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1218.600960 mV
15:09:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:09:59:ST3_smx:INFO:		Electrons
15:09:59:ST3_smx:INFO:	# loops 0
15:10:01:ST3_smx:INFO:	# loops 1
15:10:03:ST3_smx:INFO:	# loops 2
15:10:04:ST3_smx:INFO:	Total # of broken channels: 0
15:10:04:ST3_smx:INFO:	List of broken channels: []
15:10:04:ST3_smx:INFO:	Total # of broken channels: 0
15:10:04:ST3_smx:INFO:	List of broken channels: []
15:10:06:ST3_smx:INFO:	chip: 14-7 	 15.590880 C 	 1236.187875 mV
15:10:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:10:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:10:06:ST3_smx:INFO:		Electrons
15:10:06:ST3_smx:INFO:	# loops 0
15:10:08:ST3_smx:INFO:	# loops 1
15:10:09:ST3_smx:INFO:	# loops 2
15:10:11:ST3_smx:INFO:	Total # of broken channels: 0
15:10:11:ST3_smx:INFO:	List of broken channels: []
15:10:11:ST3_smx:INFO:	Total # of broken channels: 0
15:10:11:ST3_smx:INFO:	List of broken channels: []
15:10:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:10:11:febtest:INFO:	01-00 | XA-000-09-004-035-009-013-03 |  34.6 | 1206.9
15:10:11:febtest:INFO:	08-01 | XA-000-09-004-035-003-012-12 |  31.4 | 1218.6
15:10:12:febtest:INFO:	03-02 | XA-000-09-004-035-012-013-08 |  25.1 | 1242.0
15:10:12:febtest:INFO:	10-03 | XA-000-09-004-035-006-012-07 |  25.1 | 1253.7
15:10:12:febtest:INFO:	05-04 | XA-000-09-004-035-015-013-06 |  21.9 | 1253.7
15:10:12:febtest:INFO:	12-05 | XA-000-09-004-035-009-012-03 |  40.9 | 1183.3
15:10:12:febtest:INFO:	07-06 | XA-000-09-004-035-003-013-12 |  25.1 | 1236.2
15:10:13:febtest:INFO:	14-07 | XA-000-09-004-035-015-022-01 |  18.7 | 1259.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_10_01-15_08_30
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3256| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	30114

MODULE_NAME:	L3UL301012 M3UL3T4010124B2 124 C

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['2.451', '1.5850', '1.850', '1.9370', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9710', '1.850', '2.3900', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5191', '0.000', '0.0000', '0.000', '0.0000']
Comment