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FEB_3257 30.09.25 14:05:34
Info
14:05:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:34:ST3_Shared:INFO: FEB-Microcable
14:05:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:34:febtest:INFO: Testing FEB with SN 3257
14:05:35:smx_tester:INFO: Scanning setup
14:05:35:elinks:INFO: Disabling clock on downlink 0
14:05:35:elinks:INFO: Disabling clock on downlink 1
14:05:35:elinks:INFO: Disabling clock on downlink 2
14:05:35:elinks:INFO: Disabling clock on downlink 3
14:05:35:elinks:INFO: Disabling clock on downlink 4
14:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:05:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:35:elinks:INFO: Disabling clock on downlink 0
14:05:35:elinks:INFO: Disabling clock on downlink 1
14:05:35:elinks:INFO: Disabling clock on downlink 2
14:05:35:elinks:INFO: Disabling clock on downlink 3
14:05:35:elinks:INFO: Disabling clock on downlink 4
14:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:05:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:setup_element:INFO: Scanning clock phase
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:05:36:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXX_X__________________________________________________X_XXXXXXX
Clock Delay: 45
14:05:36:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXX_X__________________________________________________X_XXXXXXX
Clock Delay: 45
14:05:36:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXXXX
Clock Delay: 42
14:05:36:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXXXX
Clock Delay: 42
14:05:36:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 8 : XXX___X_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
14:05:36:setup_element:INFO: Eye window for uplink 9 : XXX___X_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
14:05:36:setup_element:INFO: Eye window for uplink 10: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:05:36:setup_element:INFO: Eye window for uplink 11: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:05:36:setup_element:INFO: Eye window for uplink 12: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:05:36:setup_element:INFO: Eye window for uplink 13: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:05:36:setup_element:INFO: Eye window for uplink 14: XXXXXXX_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
14:05:36:setup_element:INFO: Eye window for uplink 15: XXXXXXX_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
14:05:36:setup_element:INFO: Setting the clock phase to 44 for group 0, downlink 1
14:05:36:setup_element:INFO: Scanning data phases
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:05:41:setup_element:INFO: Eye window for uplink 0 : XXXXXXX______________________________XXX
Data delay found: 21
14:05:41:setup_element:INFO: Eye window for uplink 1 : XXXXX________________________________XXX
Data delay found: 20
14:05:41:setup_element:INFO: Eye window for uplink 2 : ________________________________XXXXXXXX
Data delay found: 15
14:05:41:setup_element:INFO: Eye window for uplink 3 : ______________________________XXXXXXX___
Data delay found: 13
14:05:41:setup_element:INFO: Eye window for uplink 4 : _______________________________XXXXXXXX_
Data delay found: 14
14:05:41:setup_element:INFO: Eye window for uplink 5 : ______________________________XXXXXXXX__
Data delay found: 13
14:05:41:setup_element:INFO: Eye window for uplink 6 : _________________________XXXXXXX________
Data delay found: 8
14:05:41:setup_element:INFO: Eye window for uplink 7 : _____________________X__XXXXX___________
Data delay found: 4
14:05:41:setup_element:INFO: Eye window for uplink 8 : __________XXXXXXXXXXXXXXX_______________
Data delay found: 37
14:05:41:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXX________________
Data delay found: 0
14:05:41:setup_element:INFO: Eye window for uplink 10: _______________XXXXXXXXX________________
Data delay found: 39
14:05:41:setup_element:INFO: Eye window for uplink 11: ________________XXXXXXXXXX______________
Data delay found: 0
14:05:41:setup_element:INFO: Eye window for uplink 12: _________________XXXXXXX________________
Data delay found: 0
14:05:41:setup_element:INFO: Eye window for uplink 13: _________________XXXXXXX________________
Data delay found: 0
14:05:41:setup_element:INFO: Eye window for uplink 14: _______________X_XXXXXXXXX______________
Data delay found: 0
14:05:41:setup_element:INFO: Eye window for uplink 15: _________XXXXXXXXXXXXXXXXXXX____________
Data delay found: 38
14:05:41:setup_element:INFO: Setting the data phase to 21 for uplink 0
14:05:41:setup_element:INFO: Setting the data phase to 20 for uplink 1
14:05:41:setup_element:INFO: Setting the data phase to 15 for uplink 2
14:05:41:setup_element:INFO: Setting the data phase to 13 for uplink 3
14:05:41:setup_element:INFO: Setting the data phase to 14 for uplink 4
14:05:41:setup_element:INFO: Setting the data phase to 13 for uplink 5
14:05:41:setup_element:INFO: Setting the data phase to 8 for uplink 6
14:05:41:setup_element:INFO: Setting the data phase to 4 for uplink 7
14:05:41:setup_element:INFO: Setting the data phase to 37 for uplink 8
14:05:41:setup_element:INFO: Setting the data phase to 0 for uplink 9
14:05:41:setup_element:INFO: Setting the data phase to 39 for uplink 10
14:05:41:setup_element:INFO: Setting the data phase to 0 for uplink 11
14:05:41:setup_element:INFO: Setting the data phase to 0 for uplink 12
14:05:41:setup_element:INFO: Setting the data phase to 0 for uplink 13
14:05:41:setup_element:INFO: Setting the data phase to 0 for uplink 14
14:05:41:setup_element:INFO: Setting the data phase to 38 for uplink 15
14:05:41:setup_element:INFO: Beginning SMX ASICs map scan
14:05:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:05:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:05:42:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:05:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:05:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:05:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:05:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:05:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:05:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:05:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:05:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:05:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:05:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:05:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:05:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:05:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:05:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:05:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:05:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:05:44:setup_element:INFO: Performing Elink synchronization
14:05:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:05:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:05:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:05:45:febtest:INFO: Init all SMX (CSA): 30
14:06:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:00:febtest:INFO: 01-00 | XA-000-09-004-035-003-014-12 | 28.2 | 1183.3
14:06:00:febtest:INFO: 08-01 | XA-000-09-004-035-012-014-08 | 28.2 | 1183.3
14:06:00:febtest:INFO: 03-02 | XA-000-09-004-035-012-015-08 | 25.1 | 1201.0
14:06:01:febtest:INFO: 10-03 | XA-000-09-004-035-009-014-03 | 31.4 | 1183.3
14:06:01:febtest:INFO: 05-04 | XA-000-09-004-035-015-014-06 | 21.9 | 1218.6
14:06:01:febtest:INFO: 12-05 | XA-000-09-004-035-018-015-13 | 9.3 | 1247.9
14:06:01:febtest:INFO: 07-06 | XA-000-09-004-035-006-014-07 | 34.6 | 1165.6
14:06:01:febtest:INFO: 14-07 | XA-000-09-004-035-006-013-07 | 25.1 | 1195.1
14:06:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:06:04:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV
14:06:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:04:ST3_smx:INFO: Electrons
14:06:04:ST3_smx:INFO: # loops 0
14:06:06:ST3_smx:INFO: # loops 1
14:06:07:ST3_smx:INFO: # loops 2
14:06:09:ST3_smx:INFO: Total # of broken channels: 0
14:06:09:ST3_smx:INFO: List of broken channels: []
14:06:09:ST3_smx:INFO: Total # of broken channels: 0
14:06:09:ST3_smx:INFO: List of broken channels: []
14:06:11:ST3_smx:INFO: chip: 8-1 28.225000 C 1200.969315 mV
14:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:11:ST3_smx:INFO: Electrons
14:06:11:ST3_smx:INFO: # loops 0
14:06:13:ST3_smx:INFO: # loops 1
14:06:14:ST3_smx:INFO: # loops 2
14:06:16:ST3_smx:INFO: Total # of broken channels: 0
14:06:16:ST3_smx:INFO: List of broken channels: []
14:06:16:ST3_smx:INFO: Total # of broken channels: 0
14:06:16:ST3_smx:INFO: List of broken channels: []
14:06:17:ST3_smx:INFO: chip: 3-2 25.062742 C 1212.728715 mV
14:06:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:17:ST3_smx:INFO: Electrons
14:06:17:ST3_smx:INFO: # loops 0
14:06:19:ST3_smx:INFO: # loops 1
14:06:21:ST3_smx:INFO: # loops 2
14:06:22:ST3_smx:INFO: Total # of broken channels: 0
14:06:22:ST3_smx:INFO: List of broken channels: []
14:06:22:ST3_smx:INFO: Total # of broken channels: 0
14:06:22:ST3_smx:INFO: List of broken channels: []
14:06:24:ST3_smx:INFO: chip: 10-3 31.389742 C 1195.082160 mV
14:06:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:24:ST3_smx:INFO: Electrons
14:06:24:ST3_smx:INFO: # loops 0
14:06:25:ST3_smx:INFO: # loops 1
14:06:27:ST3_smx:INFO: # loops 2
14:06:29:ST3_smx:INFO: Total # of broken channels: 0
14:06:29:ST3_smx:INFO: List of broken channels: []
14:06:29:ST3_smx:INFO: Total # of broken channels: 0
14:06:29:ST3_smx:INFO: List of broken channels: []
14:06:30:ST3_smx:INFO: chip: 5-4 21.902970 C 1236.187875 mV
14:06:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:30:ST3_smx:INFO: Electrons
14:06:30:ST3_smx:INFO: # loops 0
14:06:32:ST3_smx:INFO: # loops 1
14:06:34:ST3_smx:INFO: # loops 2
14:06:36:ST3_smx:INFO: Total # of broken channels: 0
14:06:36:ST3_smx:INFO: List of broken channels: []
14:06:36:ST3_smx:INFO: Total # of broken channels: 2
14:06:36:ST3_smx:INFO: List of broken channels: [7, 17]
14:06:37:ST3_smx:INFO: chip: 12-5 12.438562 C 1259.567515 mV
14:06:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:37:ST3_smx:INFO: Electrons
14:06:37:ST3_smx:INFO: # loops 0
14:06:39:ST3_smx:INFO: # loops 1
14:06:41:ST3_smx:INFO: # loops 2
14:06:42:ST3_smx:INFO: Total # of broken channels: 0
14:06:42:ST3_smx:INFO: List of broken channels: []
14:06:42:ST3_smx:INFO: Total # of broken channels: 0
14:06:42:ST3_smx:INFO: List of broken channels: []
14:06:44:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
14:06:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:44:ST3_smx:INFO: Electrons
14:06:44:ST3_smx:INFO: # loops 0
14:06:46:ST3_smx:INFO: # loops 1
14:06:47:ST3_smx:INFO: # loops 2
14:06:49:ST3_smx:INFO: Total # of broken channels: 0
14:06:49:ST3_smx:INFO: List of broken channels: []
14:06:49:ST3_smx:INFO: Total # of broken channels: 0
14:06:49:ST3_smx:INFO: List of broken channels: []
14:06:50:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV
14:06:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:50:ST3_smx:INFO: Electrons
14:06:50:ST3_smx:INFO: # loops 0
14:06:52:ST3_smx:INFO: # loops 1
14:06:53:ST3_smx:INFO: # loops 2
14:06:55:ST3_smx:INFO: Total # of broken channels: 0
14:06:55:ST3_smx:INFO: List of broken channels: []
14:06:55:ST3_smx:INFO: Total # of broken channels: 2
14:06:55:ST3_smx:INFO: List of broken channels: [36, 42]
14:06:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:56:febtest:INFO: 01-00 | XA-000-09-004-035-003-014-12 | 28.2 | 1218.6
14:06:56:febtest:INFO: 08-01 | XA-000-09-004-035-012-014-08 | 31.4 | 1224.5
14:06:56:febtest:INFO: 03-02 | XA-000-09-004-035-012-015-08 | 28.2 | 1230.3
14:06:56:febtest:INFO: 10-03 | XA-000-09-004-035-009-014-03 | 34.6 | 1218.6
14:06:56:febtest:INFO: 05-04 | XA-000-09-004-035-015-014-06 | 25.1 | 1253.7
14:06:56:febtest:INFO: 12-05 | XA-000-09-004-035-018-015-13 | 12.4 | 1282.9
14:06:57:febtest:INFO: 07-06 | XA-000-09-004-035-006-014-07 | 37.7 | 1195.1
14:06:57:febtest:INFO: 14-07 | XA-000-09-004-035-006-013-07 | 31.4 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_30-14_05_34
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3257| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5110', '1.850', '2.2990', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9690', '1.850', '2.3500', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5207', '0.000', '0.0000', '0.000', '0.0000']