FEB_3261 08.10.25 12:47:38
Info
12:47:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:47:38:ST3_Shared:INFO: FEB-Microcable
12:47:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:47:38:febtest:INFO: Testing FEB with SN 3261
12:47:39:smx_tester:INFO: Scanning setup
12:47:39:elinks:INFO: Disabling clock on downlink 0
12:47:39:elinks:INFO: Disabling clock on downlink 1
12:47:39:elinks:INFO: Disabling clock on downlink 2
12:47:39:elinks:INFO: Disabling clock on downlink 3
12:47:39:elinks:INFO: Disabling clock on downlink 4
12:47:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:47:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:47:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:47:40:elinks:INFO: Disabling clock on downlink 0
12:47:40:elinks:INFO: Disabling clock on downlink 1
12:47:40:elinks:INFO: Disabling clock on downlink 2
12:47:40:elinks:INFO: Disabling clock on downlink 3
12:47:40:elinks:INFO: Disabling clock on downlink 4
12:47:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:47:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:47:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:47:40:elinks:INFO: Disabling clock on downlink 0
12:47:40:elinks:INFO: Disabling clock on downlink 1
12:47:40:elinks:INFO: Disabling clock on downlink 2
12:47:40:elinks:INFO: Disabling clock on downlink 3
12:47:40:elinks:INFO: Disabling clock on downlink 4
12:47:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:47:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:47:40:elinks:INFO: Disabling clock on downlink 0
12:47:40:elinks:INFO: Disabling clock on downlink 1
12:47:40:elinks:INFO: Disabling clock on downlink 2
12:47:40:elinks:INFO: Disabling clock on downlink 3
12:47:40:elinks:INFO: Disabling clock on downlink 4
12:47:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:47:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:47:40:elinks:INFO: Disabling clock on downlink 0
12:47:40:elinks:INFO: Disabling clock on downlink 1
12:47:40:elinks:INFO: Disabling clock on downlink 2
12:47:40:elinks:INFO: Disabling clock on downlink 3
12:47:40:elinks:INFO: Disabling clock on downlink 4
12:47:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:47:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:47:40:setup_element:INFO: Scanning clock phase
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:47:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:40:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:47:40:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXX_XXXXX_____________________________________________________X_XXXXXXX
Clock Delay: 44
12:47:40:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXX_XXXXX_____________________________________________________X_XXXXXXX
Clock Delay: 44
12:47:40:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXX_X_X_______________________________________________________XXXXXXXXX
Clock Delay: 43
12:47:40:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXX_X_X_______________________________________________________XXXXXXXXX
Clock Delay: 43
12:47:40:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXX____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXX____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 8 : XXXX_XX________________________________________________________________XXXXXXXXX
Clock Delay: 38
12:47:40:setup_element:INFO: Eye window for uplink 9 : XXXX_XX________________________________________________________________XXXXXXXXX
Clock Delay: 38
12:47:40:setup_element:INFO: Eye window for uplink 10: XXXXXXX________________________________________________________________XXXXXXXXX
Clock Delay: 38
12:47:40:setup_element:INFO: Eye window for uplink 11: XXXXXXX________________________________________________________________XXXXXXXXX
Clock Delay: 38
12:47:40:setup_element:INFO: Eye window for uplink 12: XXXXX__X_X_____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 13: XXXXX__X_X_____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 14: XXXXXXX__X_____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Eye window for uplink 15: XXXXXXX__X_____________________________________________________________X_XXXXXXX
Clock Delay: 40
12:47:40:setup_element:INFO: Setting the clock phase to 44 for group 0, downlink 1
12:47:40:setup_element:INFO: Scanning data phases
12:47:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:47:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:47:46:setup_element:INFO: Eye window for uplink 0 : XXXXX_______________________________XXXX
Data delay found: 20
12:47:46:setup_element:INFO: Eye window for uplink 1 : XXX________________________________XXXXX
Data delay found: 18
12:47:46:setup_element:INFO: Eye window for uplink 2 : X________________________________XXXXXXX
Data delay found: 16
12:47:46:setup_element:INFO: Eye window for uplink 3 : X_______________________________XXXXXXXX
Data delay found: 16
12:47:46:setup_element:INFO: Eye window for uplink 4 : _____________________________XXXXXXXX___
Data delay found: 12
12:47:46:setup_element:INFO: Eye window for uplink 5 : ___________________________X_XXXXXXX____
Data delay found: 11
12:47:46:setup_element:INFO: Eye window for uplink 6 : ________________________XXXXXXXX________
Data delay found: 7
12:47:46:setup_element:INFO: Eye window for uplink 7 : _____________________XXXXXXXXX__________
Data delay found: 5
12:47:46:setup_element:INFO: Eye window for uplink 8 : _________XXXXXXXXXXXXXX_________________
Data delay found: 35
12:47:46:setup_element:INFO: Eye window for uplink 9 : ________________XXXXXXX_________________
Data delay found: 39
12:47:46:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXXXXX_____________
Data delay found: 1
12:47:46:setup_element:INFO: Eye window for uplink 11: __________________XXXXXXXXX_____________
Data delay found: 2
12:47:46:setup_element:INFO: Eye window for uplink 12: __________________XXXXXXXX______________
Data delay found: 1
12:47:46:setup_element:INFO: Eye window for uplink 13: ___________________XXXXXXX______________
Data delay found: 2
12:47:46:setup_element:INFO: Eye window for uplink 14: _______________XXXXXXXXX________________
Data delay found: 39
12:47:46:setup_element:INFO: Eye window for uplink 15: ________XXXXXXXXXXXXXXXXXX______________
Data delay found: 36
12:47:46:setup_element:INFO: Setting the data phase to 20 for uplink 0
12:47:46:setup_element:INFO: Setting the data phase to 18 for uplink 1
12:47:46:setup_element:INFO: Setting the data phase to 16 for uplink 2
12:47:46:setup_element:INFO: Setting the data phase to 16 for uplink 3
12:47:46:setup_element:INFO: Setting the data phase to 12 for uplink 4
12:47:46:setup_element:INFO: Setting the data phase to 11 for uplink 5
12:47:46:setup_element:INFO: Setting the data phase to 7 for uplink 6
12:47:46:setup_element:INFO: Setting the data phase to 5 for uplink 7
12:47:46:setup_element:INFO: Setting the data phase to 35 for uplink 8
12:47:46:setup_element:INFO: Setting the data phase to 39 for uplink 9
12:47:46:setup_element:INFO: Setting the data phase to 1 for uplink 10
12:47:46:setup_element:INFO: Setting the data phase to 2 for uplink 11
12:47:46:setup_element:INFO: Setting the data phase to 1 for uplink 12
12:47:46:setup_element:INFO: Setting the data phase to 2 for uplink 13
12:47:46:setup_element:INFO: Setting the data phase to 39 for uplink 14
12:47:46:setup_element:INFO: Setting the data phase to 36 for uplink 15
12:47:46:setup_element:INFO: Beginning SMX ASICs map scan
12:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:47:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:47:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:47:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:47:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:47:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:47:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:47:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:47:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:47:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:47:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:47:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:47:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:47:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:47:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:47:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:47:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:47:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:47:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:47:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:47:48:setup_element:INFO: Performing Elink synchronization
12:47:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:47:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:47:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:47:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:47:48:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:47:49:febtest:INFO: Init all SMX (CSA): 30
12:48:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:48:03:febtest:INFO: 01-00 | XA-000-09-004-042-011-016-00 | 37.7 | 1165.6
12:48:03:febtest:INFO: 08-01 | XA-000-09-004-042-005-012-14 | 40.9 | 1147.8
12:48:04:febtest:INFO: 03-02 | XA-000-09-004-042-005-015-14 | 34.6 | 1171.5
12:48:04:febtest:INFO: 10-03 | XA-000-09-004-042-017-013-04 | 25.1 | 1206.9
12:48:04:febtest:INFO: 05-04 | XA-000-09-004-042-008-015-09 | 34.6 | 1177.4
12:48:04:febtest:INFO: 12-05 | XA-000-09-004-042-017-014-04 | 25.1 | 1195.1
12:48:04:febtest:INFO: 07-06 | XA-000-09-004-042-008-016-14 | 34.6 | 1177.4
12:48:05:febtest:INFO: 14-07 | XA-000-09-004-042-002-012-06 | 31.4 | 1171.5
12:48:06:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:48:07:ST3_smx:INFO: chip: 1-0 40.898880 C 1177.390875 mV
12:48:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:08:ST3_smx:INFO: Electrons
12:48:08:ST3_smx:INFO: # loops 0
12:48:09:ST3_smx:INFO: # loops 1
12:48:11:ST3_smx:INFO: # loops 2
12:48:12:ST3_smx:INFO: Total # of broken channels: 0
12:48:12:ST3_smx:INFO: List of broken channels: []
12:48:12:ST3_smx:INFO: Total # of broken channels: 0
12:48:12:ST3_smx:INFO: List of broken channels: []
12:48:14:ST3_smx:INFO: chip: 8-1 40.898880 C 1165.571835 mV
12:48:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:14:ST3_smx:INFO: Electrons
12:48:14:ST3_smx:INFO: # loops 0
12:48:16:ST3_smx:INFO: # loops 1
12:48:17:ST3_smx:INFO: # loops 2
12:48:19:ST3_smx:INFO: Total # of broken channels: 0
12:48:19:ST3_smx:INFO: List of broken channels: []
12:48:19:ST3_smx:INFO: Total # of broken channels: 0
12:48:19:ST3_smx:INFO: List of broken channels: []
12:48:20:ST3_smx:INFO: chip: 3-2 37.726682 C 1183.292940 mV
12:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:20:ST3_smx:INFO: Electrons
12:48:20:ST3_smx:INFO: # loops 0
12:48:22:ST3_smx:INFO: # loops 1
12:48:23:ST3_smx:INFO: # loops 2
12:48:25:ST3_smx:INFO: Total # of broken channels: 0
12:48:25:ST3_smx:INFO: List of broken channels: []
12:48:25:ST3_smx:INFO: Total # of broken channels: 0
12:48:25:ST3_smx:INFO: List of broken channels: []
12:48:27:ST3_smx:INFO: chip: 10-3 28.225000 C 1218.600960 mV
12:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:27:ST3_smx:INFO: Electrons
12:48:27:ST3_smx:INFO: # loops 0
12:48:28:ST3_smx:INFO: # loops 1
12:48:30:ST3_smx:INFO: # loops 2
12:48:32:ST3_smx:INFO: Total # of broken channels: 0
12:48:32:ST3_smx:INFO: List of broken channels: []
12:48:32:ST3_smx:INFO: Total # of broken channels: 0
12:48:32:ST3_smx:INFO: List of broken channels: []
12:48:33:ST3_smx:INFO: chip: 5-4 37.726682 C 1189.190035 mV
12:48:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:34:ST3_smx:INFO: Electrons
12:48:34:ST3_smx:INFO: # loops 0
12:48:35:ST3_smx:INFO: # loops 1
12:48:37:ST3_smx:INFO: # loops 2
12:48:39:ST3_smx:INFO: Total # of broken channels: 0
12:48:39:ST3_smx:INFO: List of broken channels: []
12:48:39:ST3_smx:INFO: Total # of broken channels: 0
12:48:39:ST3_smx:INFO: List of broken channels: []
12:48:40:ST3_smx:INFO: chip: 12-5 28.225000 C 1206.851500 mV
12:48:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:40:ST3_smx:INFO: Electrons
12:48:40:ST3_smx:INFO: # loops 0
12:48:42:ST3_smx:INFO: # loops 1
12:48:43:ST3_smx:INFO: # loops 2
12:48:45:ST3_smx:INFO: Total # of broken channels: 0
12:48:45:ST3_smx:INFO: List of broken channels: []
12:48:45:ST3_smx:INFO: Total # of broken channels: 0
12:48:45:ST3_smx:INFO: List of broken channels: []
12:48:47:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
12:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:47:ST3_smx:INFO: Electrons
12:48:47:ST3_smx:INFO: # loops 0
12:48:48:ST3_smx:INFO: # loops 1
12:48:50:ST3_smx:INFO: # loops 2
12:48:51:ST3_smx:INFO: Total # of broken channels: 0
12:48:51:ST3_smx:INFO: List of broken channels: []
12:48:51:ST3_smx:INFO: Total # of broken channels: 0
12:48:51:ST3_smx:INFO: List of broken channels: []
12:48:53:ST3_smx:INFO: chip: 14-7 34.556970 C 1183.292940 mV
12:48:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:48:53:ST3_smx:INFO: Electrons
12:48:53:ST3_smx:INFO: # loops 0
12:48:55:ST3_smx:INFO: # loops 1
12:48:56:ST3_smx:INFO: # loops 2
12:48:58:ST3_smx:INFO: Total # of broken channels: 0
12:48:58:ST3_smx:INFO: List of broken channels: []
12:48:58:ST3_smx:INFO: Total # of broken channels: 0
12:48:58:ST3_smx:INFO: List of broken channels: []
12:48:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:48:58:febtest:INFO: 01-00 | XA-000-09-004-042-011-016-00 | 44.1 | 1201.0
12:48:59:febtest:INFO: 08-01 | XA-000-09-004-042-005-012-14 | 44.1 | 1183.3
12:48:59:febtest:INFO: 03-02 | XA-000-09-004-042-005-015-14 | 40.9 | 1206.9
12:48:59:febtest:INFO: 10-03 | XA-000-09-004-042-017-013-04 | 28.2 | 1242.0
12:48:59:febtest:INFO: 05-04 | XA-000-09-004-042-008-015-09 | 40.9 | 1206.9
12:48:59:febtest:INFO: 12-05 | XA-000-09-004-042-017-014-04 | 28.2 | 1236.2
12:49:00:febtest:INFO: 07-06 | XA-000-09-004-042-008-016-14 | 37.7 | 1206.9
12:49:00:febtest:INFO: 14-07 | XA-000-09-004-042-002-012-06 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_08-12_47_38
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3261| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5480', '1.850', '2.0320', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0230', '1.850', '2.3700', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9850', '1.850', '0.5211', '0.000', '0.0000', '0.000', '0.0000']