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FEB_3262 14.10.25 11:57:50
Info
11:57:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:50:ST3_Shared:INFO: FEB-Microcable
11:57:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:50:febtest:INFO: Testing FEB with SN 3262
11:57:51:smx_tester:INFO: Scanning setup
11:57:51:elinks:INFO: Disabling clock on downlink 0
11:57:51:elinks:INFO: Disabling clock on downlink 1
11:57:51:elinks:INFO: Disabling clock on downlink 2
11:57:51:elinks:INFO: Disabling clock on downlink 3
11:57:51:elinks:INFO: Disabling clock on downlink 4
11:57:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:57:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:51:elinks:INFO: Disabling clock on downlink 0
11:57:51:elinks:INFO: Disabling clock on downlink 1
11:57:51:elinks:INFO: Disabling clock on downlink 2
11:57:51:elinks:INFO: Disabling clock on downlink 3
11:57:51:elinks:INFO: Disabling clock on downlink 4
11:57:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:57:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:57:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:52:elinks:INFO: Disabling clock on downlink 0
11:57:52:elinks:INFO: Disabling clock on downlink 1
11:57:52:elinks:INFO: Disabling clock on downlink 2
11:57:52:elinks:INFO: Disabling clock on downlink 3
11:57:52:elinks:INFO: Disabling clock on downlink 4
11:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:52:elinks:INFO: Disabling clock on downlink 0
11:57:52:elinks:INFO: Disabling clock on downlink 1
11:57:52:elinks:INFO: Disabling clock on downlink 2
11:57:52:elinks:INFO: Disabling clock on downlink 3
11:57:52:elinks:INFO: Disabling clock on downlink 4
11:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:52:elinks:INFO: Disabling clock on downlink 0
11:57:52:elinks:INFO: Disabling clock on downlink 1
11:57:52:elinks:INFO: Disabling clock on downlink 2
11:57:52:elinks:INFO: Disabling clock on downlink 3
11:57:52:elinks:INFO: Disabling clock on downlink 4
11:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:52:setup_element:INFO: Scanning clock phase
11:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:57:52:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:57:52:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXX_X__________________________________________________X_XXXXXXXX
Clock Delay: 44
11:57:52:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXX_X__________________________________________________X_XXXXXXXX
Clock Delay: 44
11:57:52:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXX
Clock Delay: 44
11:57:52:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXX
Clock Delay: 44
11:57:52:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
11:57:52:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
11:57:52:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
11:57:52:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
11:57:52:setup_element:INFO: Eye window for uplink 8 : XXXXXX________________________________________________________________XXXXXXXXXX
Clock Delay: 37
11:57:52:setup_element:INFO: Eye window for uplink 9 : XXXXXX________________________________________________________________XXXXXXXXXX
Clock Delay: 37
11:57:52:setup_element:INFO: Eye window for uplink 10: XXX_X_X_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Eye window for uplink 11: XXX_X_X_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Eye window for uplink 12: XXXXXXX_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Eye window for uplink 13: XXXXXXX_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Eye window for uplink 14: XXXXXXX_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Eye window for uplink 15: XXXXXXX_X_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:57:52:setup_element:INFO: Setting the clock phase to 44 for group 0, downlink 1
11:57:52:setup_element:INFO: Scanning data phases
11:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:57:57:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:57:57:setup_element:INFO: Eye window for uplink 0 : XXX_______________________________X_XXXX
Data delay found: 18
11:57:57:setup_element:INFO: Eye window for uplink 1 : XX_______________________________XXXXXXX
Data delay found: 17
11:57:57:setup_element:INFO: Eye window for uplink 2 : XXX_______________________________XXXXXX
Data delay found: 18
11:57:57:setup_element:INFO: Eye window for uplink 3 : X_X_______________________________XXXXXX
Data delay found: 18
11:57:57:setup_element:INFO: Eye window for uplink 4 : X_______________________________XXXXXXX_
Data delay found: 16
11:57:57:setup_element:INFO: Eye window for uplink 5 : _____________________________X_XXXXXX___
Data delay found: 12
11:57:57:setup_element:INFO: Eye window for uplink 6 : ______________________XXXXXXXXXXX_______
Data delay found: 7
11:57:57:setup_element:INFO: Eye window for uplink 7 : ____________________X_XXXXXXXXX_________
Data delay found: 5
11:57:57:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXXX__________________
Data delay found: 37
11:57:57:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXX_______________
Data delay found: 0
11:57:57:setup_element:INFO: Eye window for uplink 10: ______________XXXXXXXXXX________________
Data delay found: 38
11:57:57:setup_element:INFO: Eye window for uplink 11: ______________X_XXXXXXXX________________
Data delay found: 38
11:57:57:setup_element:INFO: Eye window for uplink 12: _________________XXXXXXXXXX_____________
Data delay found: 1
11:57:57:setup_element:INFO: Eye window for uplink 13: __________________XXXXXXXXX_____________
Data delay found: 2
11:57:57:setup_element:INFO: Eye window for uplink 14: ______________X_XXXXXXXXXX______________
Data delay found: 39
11:57:57:setup_element:INFO: Eye window for uplink 15: __________XXXXXXXXXXXXXXXXXXX___________
Data delay found: 39
11:57:57:setup_element:INFO: Setting the data phase to 18 for uplink 0
11:57:57:setup_element:INFO: Setting the data phase to 17 for uplink 1
11:57:57:setup_element:INFO: Setting the data phase to 18 for uplink 2
11:57:57:setup_element:INFO: Setting the data phase to 18 for uplink 3
11:57:57:setup_element:INFO: Setting the data phase to 16 for uplink 4
11:57:57:setup_element:INFO: Setting the data phase to 12 for uplink 5
11:57:57:setup_element:INFO: Setting the data phase to 7 for uplink 6
11:57:57:setup_element:INFO: Setting the data phase to 5 for uplink 7
11:57:57:setup_element:INFO: Setting the data phase to 37 for uplink 8
11:57:57:setup_element:INFO: Setting the data phase to 0 for uplink 9
11:57:57:setup_element:INFO: Setting the data phase to 38 for uplink 10
11:57:57:setup_element:INFO: Setting the data phase to 38 for uplink 11
11:57:57:setup_element:INFO: Setting the data phase to 1 for uplink 12
11:57:57:setup_element:INFO: Setting the data phase to 2 for uplink 13
11:57:57:setup_element:INFO: Setting the data phase to 39 for uplink 14
11:57:57:setup_element:INFO: Setting the data phase to 39 for uplink 15
11:57:57:setup_element:INFO: Beginning SMX ASICs map scan
11:57:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:57:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:57:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:57:58:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:57:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:57:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:57:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:57:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:57:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:57:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:57:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:57:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:57:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:57:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:57:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:57:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:57:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:57:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:57:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:57:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:58:00:setup_element:INFO: Performing Elink synchronization
11:58:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:58:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:58:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:58:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:58:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:58:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:58:01:febtest:INFO: Init all SMX (CSA): 30
11:58:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:58:15:febtest:INFO: 01-00 | XA-000-09-004-042-009-021-03 | 40.9 | 1141.9
11:58:15:febtest:INFO: 08-01 | XA-000-09-004-042-009-023-03 | 25.1 | 1206.9
11:58:15:febtest:INFO: 03-02 | XA-000-09-004-042-009-022-03 | 21.9 | 1224.5
11:58:15:febtest:INFO: 10-03 | XA-000-09-004-042-003-021-12 | 34.6 | 1177.4
11:58:16:febtest:INFO: 05-04 | XA-000-09-004-042-012-023-08 | 28.2 | 1189.2
11:58:16:febtest:INFO: 12-05 | XA-000-09-004-042-003-022-12 | 40.9 | 1153.7
11:58:16:febtest:INFO: 07-06 | XA-000-09-004-042-006-022-07 | 28.2 | 1189.2
11:58:16:febtest:INFO: 14-07 | XA-000-09-004-042-006-023-07 | 34.6 | 1165.6
11:58:17:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:58:19:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
11:58:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:19:ST3_smx:INFO: Electrons
11:58:19:ST3_smx:INFO: # loops 0
11:58:21:ST3_smx:INFO: # loops 1
11:58:23:ST3_smx:INFO: # loops 2
11:58:24:ST3_smx:INFO: Total # of broken channels: 0
11:58:24:ST3_smx:INFO: List of broken channels: []
11:58:24:ST3_smx:INFO: Total # of broken channels: 0
11:58:24:ST3_smx:INFO: List of broken channels: []
11:58:26:ST3_smx:INFO: chip: 8-1 25.062742 C 1224.468235 mV
11:58:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:26:ST3_smx:INFO: Electrons
11:58:26:ST3_smx:INFO: # loops 0
11:58:27:ST3_smx:INFO: # loops 1
11:58:29:ST3_smx:INFO: # loops 2
11:58:31:ST3_smx:INFO: Total # of broken channels: 0
11:58:31:ST3_smx:INFO: List of broken channels: []
11:58:31:ST3_smx:INFO: Total # of broken channels: 0
11:58:31:ST3_smx:INFO: List of broken channels: []
11:58:32:ST3_smx:INFO: chip: 3-2 21.902970 C 1236.187875 mV
11:58:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:32:ST3_smx:INFO: Electrons
11:58:32:ST3_smx:INFO: # loops 0
11:58:34:ST3_smx:INFO: # loops 1
11:58:35:ST3_smx:INFO: # loops 2
11:58:37:ST3_smx:INFO: Total # of broken channels: 0
11:58:37:ST3_smx:INFO: List of broken channels: []
11:58:37:ST3_smx:INFO: Total # of broken channels: 0
11:58:37:ST3_smx:INFO: List of broken channels: []
11:58:39:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV
11:58:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:39:ST3_smx:INFO: Electrons
11:58:39:ST3_smx:INFO: # loops 0
11:58:40:ST3_smx:INFO: # loops 1
11:58:42:ST3_smx:INFO: # loops 2
11:58:43:ST3_smx:INFO: Total # of broken channels: 0
11:58:43:ST3_smx:INFO: List of broken channels: []
11:58:43:ST3_smx:INFO: Total # of broken channels: 0
11:58:43:ST3_smx:INFO: List of broken channels: []
11:58:45:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
11:58:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:45:ST3_smx:INFO: Electrons
11:58:45:ST3_smx:INFO: # loops 0
11:58:46:ST3_smx:INFO: # loops 1
11:58:48:ST3_smx:INFO: # loops 2
11:58:49:ST3_smx:INFO: Total # of broken channels: 0
11:58:49:ST3_smx:INFO: List of broken channels: []
11:58:49:ST3_smx:INFO: Total # of broken channels: 0
11:58:49:ST3_smx:INFO: List of broken channels: []
11:58:51:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
11:58:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:51:ST3_smx:INFO: Electrons
11:58:51:ST3_smx:INFO: # loops 0
11:58:53:ST3_smx:INFO: # loops 1
11:58:55:ST3_smx:INFO: # loops 2
11:58:56:ST3_smx:INFO: Total # of broken channels: 0
11:58:56:ST3_smx:INFO: List of broken channels: []
11:58:56:ST3_smx:INFO: Total # of broken channels: 0
11:58:56:ST3_smx:INFO: List of broken channels: []
11:58:58:ST3_smx:INFO: chip: 7-6 28.225000 C 1195.082160 mV
11:58:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:58:ST3_smx:INFO: Electrons
11:58:58:ST3_smx:INFO: # loops 0
11:58:59:ST3_smx:INFO: # loops 1
11:59:01:ST3_smx:INFO: # loops 2
11:59:02:ST3_smx:INFO: Total # of broken channels: 0
11:59:02:ST3_smx:INFO: List of broken channels: []
11:59:02:ST3_smx:INFO: Total # of broken channels: 0
11:59:02:ST3_smx:INFO: List of broken channels: []
11:59:04:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
11:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:59:04:ST3_smx:INFO: Electrons
11:59:04:ST3_smx:INFO: # loops 0
11:59:06:ST3_smx:INFO: # loops 1
11:59:07:ST3_smx:INFO: # loops 2
11:59:09:ST3_smx:INFO: Total # of broken channels: 0
11:59:09:ST3_smx:INFO: List of broken channels: []
11:59:09:ST3_smx:INFO: Total # of broken channels: 0
11:59:09:ST3_smx:INFO: List of broken channels: []
11:59:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:59:09:febtest:INFO: 01-00 | XA-000-09-004-042-009-021-03 | 44.1 | 1171.5
11:59:09:febtest:INFO: 08-01 | XA-000-09-004-042-009-023-03 | 25.1 | 1247.9
11:59:09:febtest:INFO: 03-02 | XA-000-09-004-042-009-022-03 | 21.9 | 1253.7
11:59:10:febtest:INFO: 10-03 | XA-000-09-004-042-003-021-12 | 34.6 | 1212.7
11:59:10:febtest:INFO: 05-04 | XA-000-09-004-042-012-023-08 | 31.4 | 1224.5
11:59:10:febtest:INFO: 12-05 | XA-000-09-004-042-003-022-12 | 40.9 | 1189.2
11:59:10:febtest:INFO: 07-06 | XA-000-09-004-042-006-022-07 | 31.4 | 1218.6
11:59:11:febtest:INFO: 14-07 | XA-000-09-004-042-006-023-07 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_14-11_57_50
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3262| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '2.0360', '1.850', '2.9750', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0230', '1.850', '2.3440', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5216', '0.000', '0.0000', '0.000', '0.0000']