12:46:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:46:32:ST3_Shared:INFO:	                         FEB-Sensor                         
12:46:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:46:55:ST3_ModuleSelector:INFO:	L2DL400113 M2DL4T0001130A2 42 C

12:46:55:ST3_ModuleSelector:INFO:	03412

12:46:55:febtest:INFO:	Testing FEB with SN 3263
12:46:56:smx_tester:INFO:	Scanning setup
12:46:56:elinks:INFO:	Disabling clock on downlink 0
12:46:56:elinks:INFO:	Disabling clock on downlink 1
12:46:56:elinks:INFO:	Disabling clock on downlink 2
12:46:56:elinks:INFO:	Disabling clock on downlink 3
12:46:56:elinks:INFO:	Disabling clock on downlink 4
12:46:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:46:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:46:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:46:56:elinks:INFO:	Disabling clock on downlink 0
12:46:56:elinks:INFO:	Disabling clock on downlink 1
12:46:56:elinks:INFO:	Disabling clock on downlink 2
12:46:56:elinks:INFO:	Disabling clock on downlink 3
12:46:56:elinks:INFO:	Disabling clock on downlink 4
12:46:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:46:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
12:46:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
12:46:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:46:57:elinks:INFO:	Disabling clock on downlink 0
12:46:57:elinks:INFO:	Disabling clock on downlink 1
12:46:57:elinks:INFO:	Disabling clock on downlink 2
12:46:57:elinks:INFO:	Disabling clock on downlink 3
12:46:57:elinks:INFO:	Disabling clock on downlink 4
12:46:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:46:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:46:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:46:57:elinks:INFO:	Disabling clock on downlink 0
12:46:57:elinks:INFO:	Disabling clock on downlink 1
12:46:57:elinks:INFO:	Disabling clock on downlink 2
12:46:57:elinks:INFO:	Disabling clock on downlink 3
12:46:57:elinks:INFO:	Disabling clock on downlink 4
12:46:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:46:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:46:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:46:57:elinks:INFO:	Disabling clock on downlink 0
12:46:57:elinks:INFO:	Disabling clock on downlink 1
12:46:57:elinks:INFO:	Disabling clock on downlink 2
12:46:57:elinks:INFO:	Disabling clock on downlink 3
12:46:57:elinks:INFO:	Disabling clock on downlink 4
12:46:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:46:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:46:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:46:57:setup_element:INFO:	Scanning clock phase
12:46:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:46:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:46:57:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
12:46:57:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________________________XXXXX_________
Clock Delay: 28
12:46:57:setup_element:INFO:	Eye window for uplink 1 : __________________________________________________________________XXXXX_________
Clock Delay: 28
12:46:57:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:46:57:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
12:46:57:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
12:46:57:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
12:46:57:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
12:46:57:setup_element:INFO:	Setting the clock phase to 26 for group 0, downlink 1
12:46:57:setup_element:INFO:	Scanning data phases
12:46:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:46:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:02:setup_element:INFO:	Data phase scan results for group 0, downlink 1
12:47:02:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXXXXXXXXXX___________
Data delay found: 2
12:47:02:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXXXXXX____________________
Data delay found: 35
12:47:02:setup_element:INFO:	Eye window for uplink 2 : _________XXXXXXXX_______________________
Data delay found: 32
12:47:02:setup_element:INFO:	Eye window for uplink 3 : _________XXXXXXX________________________
Data delay found: 32
12:47:02:setup_element:INFO:	Eye window for uplink 4 : ____X_XXXXXXXX__________________________
Data delay found: 28
12:47:02:setup_element:INFO:	Eye window for uplink 5 : ____XXXXXXXXX___________________________
Data delay found: 28
12:47:02:setup_element:INFO:	Eye window for uplink 6 : ___XXXXXXX______________________________
Data delay found: 26
12:47:02:setup_element:INFO:	Eye window for uplink 7 : __XXXXXXXX______________________________
Data delay found: 25
12:47:02:setup_element:INFO:	Eye window for uplink 8 : ____________________________XXXXXXXX____
Data delay found: 11
12:47:02:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXXX__
Data delay found: 14
12:47:02:setup_element:INFO:	Eye window for uplink 10: X_______________________________XXXXXXXX
Data delay found: 16
12:47:02:setup_element:INFO:	Eye window for uplink 11: XX________________________________XXXXXX
Data delay found: 17
12:47:02:setup_element:INFO:	Eye window for uplink 12: ______________________________XXXXXXX___
Data delay found: 13
12:47:03:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXXX___
Data delay found: 13
12:47:03:setup_element:INFO:	Eye window for uplink 14: X______________________________XXXXXXXX_
Data delay found: 15
12:47:03:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXXXXX
Data delay found: 15
12:47:03:setup_element:INFO:	Setting the data phase to 2 for uplink 0
12:47:03:setup_element:INFO:	Setting the data phase to 35 for uplink 1
12:47:03:setup_element:INFO:	Setting the data phase to 32 for uplink 2
12:47:03:setup_element:INFO:	Setting the data phase to 32 for uplink 3
12:47:03:setup_element:INFO:	Setting the data phase to 28 for uplink 4
12:47:03:setup_element:INFO:	Setting the data phase to 28 for uplink 5
12:47:03:setup_element:INFO:	Setting the data phase to 26 for uplink 6
12:47:03:setup_element:INFO:	Setting the data phase to 25 for uplink 7
12:47:03:setup_element:INFO:	Setting the data phase to 11 for uplink 8
12:47:03:setup_element:INFO:	Setting the data phase to 14 for uplink 9
12:47:03:setup_element:INFO:	Setting the data phase to 16 for uplink 10
12:47:03:setup_element:INFO:	Setting the data phase to 17 for uplink 11
12:47:03:setup_element:INFO:	Setting the data phase to 13 for uplink 12
12:47:03:setup_element:INFO:	Setting the data phase to 13 for uplink 13
12:47:03:setup_element:INFO:	Setting the data phase to 15 for uplink 14
12:47:03:setup_element:INFO:	Setting the data phase to 15 for uplink 15
12:47:03:setup_element:INFO:	Beginning SMX ASICs map scan
12:47:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:47:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:47:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:47:03:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:47:03:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:47:03:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:47:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:47:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:47:03:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:47:03:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:47:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:47:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:47:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:47:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:47:04:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:47:04:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:47:04:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:47:04:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:47:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:47:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:47:05:setup_element:INFO:	Performing Elink synchronization
12:47:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:47:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:47:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:47:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:47:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
12:47:05:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:47:06:febtest:INFO:	Init all SMX (CSA): 30
12:47:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:47:21:febtest:INFO:	01-00 | XA-000-09-004-042-013-017-05 |  31.4 | 1165.6
12:47:21:febtest:INFO:	08-01 | XA-000-09-004-042-013-016-05 |  31.4 | 1177.4
12:47:22:febtest:INFO:	03-02 | XA-000-09-004-042-007-016-10 |  31.4 | 1171.5
12:47:22:febtest:INFO:	10-03 | XA-000-09-004-042-016-016-14 |  25.1 | 1195.1
12:47:22:febtest:INFO:	05-04 | XA-000-09-004-042-010-016-13 |  25.1 | 1183.3
12:47:22:febtest:INFO:	12-05 | XA-000-09-004-042-007-018-10 |  44.1 | 1130.0
12:47:22:febtest:INFO:	07-06 | XA-000-09-004-042-016-017-14 |  25.1 | 1189.2
12:47:23:febtest:INFO:	14-07 | XA-000-09-004-042-013-008-02 |  28.2 | 1183.3
12:47:24:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:47:26:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1171.483840 mV
12:47:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:26:ST3_smx:INFO:		Electrons
12:47:26:ST3_smx:INFO:	# loops 0
12:47:27:ST3_smx:INFO:	# loops 1
12:47:29:ST3_smx:INFO:	# loops 2
12:47:30:ST3_smx:INFO:	Total # of broken channels: 0
12:47:30:ST3_smx:INFO:	List of broken channels: []
12:47:30:ST3_smx:INFO:	Total # of broken channels: 0
12:47:30:ST3_smx:INFO:	List of broken channels: []
12:47:32:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1195.082160 mV
12:47:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:32:ST3_smx:INFO:		Electrons
12:47:32:ST3_smx:INFO:	# loops 0
12:47:34:ST3_smx:INFO:	# loops 1
12:47:35:ST3_smx:INFO:	# loops 2
12:47:37:ST3_smx:INFO:	Total # of broken channels: 0
12:47:37:ST3_smx:INFO:	List of broken channels: []
12:47:37:ST3_smx:INFO:	Total # of broken channels: 0
12:47:37:ST3_smx:INFO:	List of broken channels: []
12:47:38:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1183.292940 mV
12:47:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:38:ST3_smx:INFO:		Electrons
12:47:38:ST3_smx:INFO:	# loops 0
12:47:40:ST3_smx:INFO:	# loops 1
12:47:42:ST3_smx:INFO:	# loops 2
12:47:44:ST3_smx:INFO:	Total # of broken channels: 0
12:47:44:ST3_smx:INFO:	List of broken channels: []
12:47:44:ST3_smx:INFO:	Total # of broken channels: 0
12:47:44:ST3_smx:INFO:	List of broken channels: []
12:47:46:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1212.728715 mV
12:47:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:46:ST3_smx:INFO:		Electrons
12:47:46:ST3_smx:INFO:	# loops 0
12:47:47:ST3_smx:INFO:	# loops 1
12:47:49:ST3_smx:INFO:	# loops 2
12:47:50:ST3_smx:INFO:	Total # of broken channels: 0
12:47:50:ST3_smx:INFO:	List of broken channels: []
12:47:50:ST3_smx:INFO:	Total # of broken channels: 0
12:47:50:ST3_smx:INFO:	List of broken channels: []
12:47:52:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1195.082160 mV
12:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:52:ST3_smx:INFO:		Electrons
12:47:52:ST3_smx:INFO:	# loops 0
12:47:54:ST3_smx:INFO:	# loops 1
12:47:55:ST3_smx:INFO:	# loops 2
12:47:57:ST3_smx:INFO:	Total # of broken channels: 0
12:47:57:ST3_smx:INFO:	List of broken channels: []
12:47:57:ST3_smx:INFO:	Total # of broken channels: 0
12:47:57:ST3_smx:INFO:	List of broken channels: []
12:47:58:ST3_smx:INFO:	chip: 12-5 	 44.073563 C 	 1147.806000 mV
12:47:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:47:58:ST3_smx:INFO:		Electrons
12:47:58:ST3_smx:INFO:	# loops 0
12:48:00:ST3_smx:INFO:	# loops 1
12:48:01:ST3_smx:INFO:	# loops 2
12:48:03:ST3_smx:INFO:	Total # of broken channels: 0
12:48:03:ST3_smx:INFO:	List of broken channels: []
12:48:03:ST3_smx:INFO:	Total # of broken channels: 0
12:48:03:ST3_smx:INFO:	List of broken channels: []
12:48:04:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1206.851500 mV
12:48:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:48:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:48:04:ST3_smx:INFO:		Electrons
12:48:04:ST3_smx:INFO:	# loops 0
12:48:06:ST3_smx:INFO:	# loops 1
12:48:08:ST3_smx:INFO:	# loops 2
12:48:09:ST3_smx:INFO:	Total # of broken channels: 0
12:48:09:ST3_smx:INFO:	List of broken channels: []
12:48:09:ST3_smx:INFO:	Total # of broken channels: 0
12:48:09:ST3_smx:INFO:	List of broken channels: []
12:48:11:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1195.082160 mV
12:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:48:11:ST3_smx:INFO:		Electrons
12:48:11:ST3_smx:INFO:	# loops 0
12:48:12:ST3_smx:INFO:	# loops 1
12:48:14:ST3_smx:INFO:	# loops 2
12:48:15:ST3_smx:INFO:	Total # of broken channels: 0
12:48:15:ST3_smx:INFO:	List of broken channels: []
12:48:15:ST3_smx:INFO:	Total # of broken channels: 0
12:48:15:ST3_smx:INFO:	List of broken channels: []
12:48:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:48:16:febtest:INFO:	01-00 | XA-000-09-004-042-013-017-05 |  34.6 | 1195.1
12:48:16:febtest:INFO:	08-01 | XA-000-09-004-042-013-016-05 |  31.4 | 1212.7
12:48:16:febtest:INFO:	03-02 | XA-000-09-004-042-007-016-10 |  34.6 | 1206.9
12:48:17:febtest:INFO:	10-03 | XA-000-09-004-042-016-016-14 |  25.1 | 1236.2
12:48:17:febtest:INFO:	05-04 | XA-000-09-004-042-010-016-13 |  28.2 | 1212.7
12:48:17:febtest:INFO:	12-05 | XA-000-09-004-042-007-018-10 |  47.3 | 1165.6
12:48:17:febtest:INFO:	07-06 | XA-000-09-004-042-016-017-14 |  28.2 | 1218.6
12:48:17:febtest:INFO:	14-07 | XA-000-09-004-042-013-008-02 |  31.4 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_10_20-12_46_32
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3263| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	03412

MODULE_NAME:	L2DL400113 M2DL4T0001130A2 42 C

MODULE_TYPE:	
MODULE_LADDER:	L2DL400113
MODULE_MODULE:	M2DL4T0001130A2
MODULE_SIZE:	42
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['2.449', '1.8740', '1.850', '2.6830', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0060', '1.850', '2.3520', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9850', '1.850', '0.5247', '0.000', '0.0000', '0.000', '0.0000']