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FEB_3264 14.10.25 11:21:29
Info
11:21:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:29:ST3_Shared:INFO: FEB-Microcable
11:21:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:29:febtest:INFO: Testing FEB with SN 3264
11:21:30:smx_tester:INFO: Scanning setup
11:21:31:elinks:INFO: Disabling clock on downlink 0
11:21:31:elinks:INFO: Disabling clock on downlink 1
11:21:31:elinks:INFO: Disabling clock on downlink 2
11:21:31:elinks:INFO: Disabling clock on downlink 3
11:21:31:elinks:INFO: Disabling clock on downlink 4
11:21:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:21:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:31:elinks:INFO: Disabling clock on downlink 0
11:21:31:elinks:INFO: Disabling clock on downlink 1
11:21:31:elinks:INFO: Disabling clock on downlink 2
11:21:31:elinks:INFO: Disabling clock on downlink 3
11:21:31:elinks:INFO: Disabling clock on downlink 4
11:21:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:21:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:21:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:31:elinks:INFO: Disabling clock on downlink 0
11:21:31:elinks:INFO: Disabling clock on downlink 1
11:21:31:elinks:INFO: Disabling clock on downlink 2
11:21:31:elinks:INFO: Disabling clock on downlink 3
11:21:31:elinks:INFO: Disabling clock on downlink 4
11:21:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:31:elinks:INFO: Disabling clock on downlink 0
11:21:31:elinks:INFO: Disabling clock on downlink 1
11:21:31:elinks:INFO: Disabling clock on downlink 2
11:21:31:elinks:INFO: Disabling clock on downlink 3
11:21:31:elinks:INFO: Disabling clock on downlink 4
11:21:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:21:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:31:elinks:INFO: Disabling clock on downlink 0
11:21:31:elinks:INFO: Disabling clock on downlink 1
11:21:31:elinks:INFO: Disabling clock on downlink 2
11:21:31:elinks:INFO: Disabling clock on downlink 3
11:21:31:elinks:INFO: Disabling clock on downlink 4
11:21:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:21:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:31:setup_element:INFO: Scanning clock phase
11:21:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:31:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:21:31:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXX_XX_X__________________________________________________XXXXXXXXX
Clock Delay: 45
11:21:31:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXX_XX_X__________________________________________________XXXXXXXXX
Clock Delay: 45
11:21:31:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXXX
Clock Delay: 41
11:21:31:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXXXX
Clock Delay: 41
11:21:31:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
11:21:31:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
11:21:31:setup_element:INFO: Eye window for uplink 6 : XXXXXXXX_X__________________________________________________________XXXXXXXXXXXX
Clock Delay: 38
11:21:31:setup_element:INFO: Eye window for uplink 7 : XXXXXXXX_X__________________________________________________________XXXXXXXXXXXX
Clock Delay: 38
11:21:31:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
11:21:31:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXXXX
Clock Delay: 34
11:21:32:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
11:21:32:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
11:21:32:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
11:21:32:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
11:21:32:setup_element:INFO: Eye window for uplink 14: XXXXX_X_____________________________________________________________X_XXXXXXXXXX
Clock Delay: 37
11:21:32:setup_element:INFO: Eye window for uplink 15: XXXXX_X_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
11:21:32:setup_element:INFO: Setting the clock phase to 44 for group 0, downlink 1
11:21:32:setup_element:INFO: Scanning data phases
11:21:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:37:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:21:37:setup_element:INFO: Eye window for uplink 0 : XXXXXX_______________________________XXX
Data delay found: 21
11:21:37:setup_element:INFO: Eye window for uplink 1 : XXXXX______________________________X_XXX
Data delay found: 19
11:21:37:setup_element:INFO: Eye window for uplink 2 : ______________________________XXXXXXXXX_
Data delay found: 14
11:21:37:setup_element:INFO: Eye window for uplink 3 : _______________________________XXXXXXX__
Data delay found: 14
11:21:37:setup_element:INFO: Eye window for uplink 4 : X_______________________________XXXXXXXX
Data delay found: 16
11:21:37:setup_element:INFO: Eye window for uplink 5 : _______________________________XXXXXXX__
Data delay found: 14
11:21:37:setup_element:INFO: Eye window for uplink 6 : _____________________X_XXXXXXXXXX_______
Data delay found: 6
11:21:37:setup_element:INFO: Eye window for uplink 7 : ____________________XXXXXXXXXX__________
Data delay found: 4
11:21:37:setup_element:INFO: Eye window for uplink 8 : ___________XXXXXXXXX____________________
Data delay found: 35
11:21:37:setup_element:INFO: Eye window for uplink 9 : ______________XXXXXXX_X_________________
Data delay found: 38
11:21:37:setup_element:INFO: Eye window for uplink 10: ________________XXXXXXXXX_______________
Data delay found: 0
11:21:37:setup_element:INFO: Eye window for uplink 11: _________________XXXXXXXX_______________
Data delay found: 0
11:21:37:setup_element:INFO: Eye window for uplink 12: _______________XXXXXXXXXX_______________
Data delay found: 39
11:21:37:setup_element:INFO: Eye window for uplink 13: ________________XXXXXXXX________________
Data delay found: 39
11:21:37:setup_element:INFO: Eye window for uplink 14: ________________XXXXXXXXX_______________
Data delay found: 0
11:21:37:setup_element:INFO: Eye window for uplink 15: _________XXXXXXXXXXXXXXXXXX_____________
Data delay found: 37
11:21:37:setup_element:INFO: Setting the data phase to 21 for uplink 0
11:21:37:setup_element:INFO: Setting the data phase to 19 for uplink 1
11:21:37:setup_element:INFO: Setting the data phase to 14 for uplink 2
11:21:37:setup_element:INFO: Setting the data phase to 14 for uplink 3
11:21:37:setup_element:INFO: Setting the data phase to 16 for uplink 4
11:21:37:setup_element:INFO: Setting the data phase to 14 for uplink 5
11:21:37:setup_element:INFO: Setting the data phase to 6 for uplink 6
11:21:37:setup_element:INFO: Setting the data phase to 4 for uplink 7
11:21:37:setup_element:INFO: Setting the data phase to 35 for uplink 8
11:21:37:setup_element:INFO: Setting the data phase to 38 for uplink 9
11:21:37:setup_element:INFO: Setting the data phase to 0 for uplink 10
11:21:37:setup_element:INFO: Setting the data phase to 0 for uplink 11
11:21:37:setup_element:INFO: Setting the data phase to 39 for uplink 12
11:21:37:setup_element:INFO: Setting the data phase to 39 for uplink 13
11:21:37:setup_element:INFO: Setting the data phase to 0 for uplink 14
11:21:37:setup_element:INFO: Setting the data phase to 37 for uplink 15
11:21:37:setup_element:INFO: Beginning SMX ASICs map scan
11:21:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:21:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:21:37:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:21:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:21:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:21:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:21:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:21:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:21:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:21:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:21:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:21:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:21:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:21:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:21:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:21:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:21:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:21:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:21:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:21:39:setup_element:INFO: Performing Elink synchronization
11:21:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:21:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:21:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:21:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:21:40:febtest:INFO: Init all SMX (CSA): 30
11:21:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:21:56:febtest:INFO: 01-00 | XA-000-09-004-042-013-023-05 | 31.4 | 1189.2
11:21:56:febtest:INFO: 08-01 | XA-000-09-004-042-016-018-14 | 15.6 | 1247.9
11:21:57:febtest:INFO: 03-02 | XA-000-09-004-042-010-018-13 | 40.9 | 1165.6
11:21:57:febtest:INFO: 10-03 | XA-000-09-004-042-004-019-04 | 37.7 | 1171.5
11:21:57:febtest:INFO: 05-04 | XA-000-09-004-042-004-020-04 | 47.3 | 1141.9
11:21:57:febtest:INFO: 12-05 | XA-000-09-004-042-010-020-13 | 37.7 | 1177.4
11:21:58:febtest:INFO: 07-06 | XA-000-09-004-042-007-020-10 | 37.7 | 1177.4
11:21:58:febtest:INFO: 14-07 | XA-000-09-004-042-016-019-14 | 21.9 | 1236.2
11:21:59:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:22:01:ST3_smx:INFO: chip: 1-0 31.389742 C 1206.851500 mV
11:22:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:01:ST3_smx:INFO: Electrons
11:22:01:ST3_smx:INFO: # loops 0
11:22:02:ST3_smx:INFO: # loops 1
11:22:04:ST3_smx:INFO: # loops 2
11:22:05:ST3_smx:INFO: Total # of broken channels: 0
11:22:05:ST3_smx:INFO: List of broken channels: []
11:22:05:ST3_smx:INFO: Total # of broken channels: 0
11:22:05:ST3_smx:INFO: List of broken channels: []
11:22:07:ST3_smx:INFO: chip: 8-1 15.590880 C 1265.400000 mV
11:22:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:07:ST3_smx:INFO: Electrons
11:22:07:ST3_smx:INFO: # loops 0
11:22:08:ST3_smx:INFO: # loops 1
11:22:10:ST3_smx:INFO: # loops 2
11:22:11:ST3_smx:INFO: Total # of broken channels: 0
11:22:11:ST3_smx:INFO: List of broken channels: []
11:22:11:ST3_smx:INFO: Total # of broken channels: 0
11:22:11:ST3_smx:INFO: List of broken channels: []
11:22:13:ST3_smx:INFO: chip: 3-2 40.898880 C 1177.390875 mV
11:22:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:13:ST3_smx:INFO: Electrons
11:22:13:ST3_smx:INFO: # loops 0
11:22:15:ST3_smx:INFO: # loops 1
11:22:16:ST3_smx:INFO: # loops 2
11:22:18:ST3_smx:INFO: Total # of broken channels: 0
11:22:18:ST3_smx:INFO: List of broken channels: []
11:22:18:ST3_smx:INFO: Total # of broken channels: 0
11:22:18:ST3_smx:INFO: List of broken channels: []
11:22:19:ST3_smx:INFO: chip: 10-3 37.726682 C 1189.190035 mV
11:22:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:19:ST3_smx:INFO: Electrons
11:22:19:ST3_smx:INFO: # loops 0
11:22:21:ST3_smx:INFO: # loops 1
11:22:23:ST3_smx:INFO: # loops 2
11:22:25:ST3_smx:INFO: Total # of broken channels: 0
11:22:25:ST3_smx:INFO: List of broken channels: []
11:22:25:ST3_smx:INFO: Total # of broken channels: 0
11:22:25:ST3_smx:INFO: List of broken channels: []
11:22:26:ST3_smx:INFO: chip: 5-4 47.250730 C 1153.732915 mV
11:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:26:ST3_smx:INFO: Electrons
11:22:26:ST3_smx:INFO: # loops 0
11:22:28:ST3_smx:INFO: # loops 1
11:22:29:ST3_smx:INFO: # loops 2
11:22:31:ST3_smx:INFO: Total # of broken channels: 0
11:22:31:ST3_smx:INFO: List of broken channels: []
11:22:31:ST3_smx:INFO: Total # of broken channels: 0
11:22:31:ST3_smx:INFO: List of broken channels: []
11:22:32:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
11:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:32:ST3_smx:INFO: Electrons
11:22:32:ST3_smx:INFO: # loops 0
11:22:34:ST3_smx:INFO: # loops 1
11:22:36:ST3_smx:INFO: # loops 2
11:22:37:ST3_smx:INFO: Total # of broken channels: 0
11:22:37:ST3_smx:INFO: List of broken channels: []
11:22:37:ST3_smx:INFO: Total # of broken channels: 0
11:22:37:ST3_smx:INFO: List of broken channels: []
11:22:39:ST3_smx:INFO: chip: 7-6 37.726682 C 1189.190035 mV
11:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:39:ST3_smx:INFO: Electrons
11:22:39:ST3_smx:INFO: # loops 0
11:22:40:ST3_smx:INFO: # loops 1
11:22:42:ST3_smx:INFO: # loops 2
11:22:43:ST3_smx:INFO: Total # of broken channels: 0
11:22:43:ST3_smx:INFO: List of broken channels: []
11:22:43:ST3_smx:INFO: Total # of broken channels: 0
11:22:43:ST3_smx:INFO: List of broken channels: []
11:22:45:ST3_smx:INFO: chip: 14-7 21.902970 C 1247.887635 mV
11:22:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:45:ST3_smx:INFO: Electrons
11:22:45:ST3_smx:INFO: # loops 0
11:22:47:ST3_smx:INFO: # loops 1
11:22:48:ST3_smx:INFO: # loops 2
11:22:50:ST3_smx:INFO: Total # of broken channels: 0
11:22:50:ST3_smx:INFO: List of broken channels: []
11:22:50:ST3_smx:INFO: Total # of broken channels: 0
11:22:50:ST3_smx:INFO: List of broken channels: []
11:22:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:50:febtest:INFO: 01-00 | XA-000-09-004-042-013-023-05 | 31.4 | 1230.3
11:22:50:febtest:INFO: 08-01 | XA-000-09-004-042-016-018-14 | 15.6 | 1288.7
11:22:51:febtest:INFO: 03-02 | XA-000-09-004-042-010-018-13 | 40.9 | 1206.9
11:22:51:febtest:INFO: 10-03 | XA-000-09-004-042-004-019-04 | 37.7 | 1206.9
11:22:51:febtest:INFO: 05-04 | XA-000-09-004-042-004-020-04 | 47.3 | 1177.4
11:22:51:febtest:INFO: 12-05 | XA-000-09-004-042-010-020-13 | 40.9 | 1212.7
11:22:51:febtest:INFO: 07-06 | XA-000-09-004-042-007-020-10 | 37.7 | 1206.9
11:22:52:febtest:INFO: 14-07 | XA-000-09-004-042-016-019-14 | 25.1 | 1265.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_14-11_21_29
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3264| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9820', '1.850', '2.6680', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0170', '1.850', '2.3390', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5140', '0.000', '0.0000', '0.000', '0.0000']