14:47:43:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:47:43:ST3_Shared:INFO:	                         FEB-Sensor                         
14:47:43:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:47:45:ST3_ModuleSelector:INFO:	L2DL400113 M2DL4B2001132B2 62 C

14:47:45:ST3_ModuleSelector:INFO:	22303

14:47:45:febtest:INFO:	Testing FEB with SN 3265
14:47:47:smx_tester:INFO:	Scanning setup
14:47:47:elinks:INFO:	Disabling clock on downlink 0
14:47:47:elinks:INFO:	Disabling clock on downlink 1
14:47:47:elinks:INFO:	Disabling clock on downlink 2
14:47:47:elinks:INFO:	Disabling clock on downlink 3
14:47:47:elinks:INFO:	Disabling clock on downlink 4
14:47:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:47:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:47:47:elinks:INFO:	Disabling clock on downlink 0
14:47:47:elinks:INFO:	Disabling clock on downlink 1
14:47:47:elinks:INFO:	Disabling clock on downlink 2
14:47:47:elinks:INFO:	Disabling clock on downlink 3
14:47:47:elinks:INFO:	Disabling clock on downlink 4
14:47:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:47:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:47:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:47:47:elinks:INFO:	Disabling clock on downlink 0
14:47:47:elinks:INFO:	Disabling clock on downlink 1
14:47:47:elinks:INFO:	Disabling clock on downlink 2
14:47:47:elinks:INFO:	Disabling clock on downlink 3
14:47:47:elinks:INFO:	Disabling clock on downlink 4
14:47:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:47:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:47:47:elinks:INFO:	Disabling clock on downlink 0
14:47:47:elinks:INFO:	Disabling clock on downlink 1
14:47:47:elinks:INFO:	Disabling clock on downlink 2
14:47:47:elinks:INFO:	Disabling clock on downlink 3
14:47:47:elinks:INFO:	Disabling clock on downlink 4
14:47:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:47:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:47:47:elinks:INFO:	Disabling clock on downlink 0
14:47:47:elinks:INFO:	Disabling clock on downlink 1
14:47:47:elinks:INFO:	Disabling clock on downlink 2
14:47:47:elinks:INFO:	Disabling clock on downlink 3
14:47:47:elinks:INFO:	Disabling clock on downlink 4
14:47:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:47:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:47:47:setup_element:INFO:	Scanning clock phase
14:47:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:47:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:48:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:47:48:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
14:47:48:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
14:47:48:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:47:48:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________XXXXXXX____________
Clock Delay: 24
14:47:48:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________XXXXXXX____________
Clock Delay: 24
14:47:48:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
14:47:48:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
14:47:48:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
14:47:48:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
14:47:48:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
14:47:48:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
14:47:48:setup_element:INFO:	Setting the clock phase to 25 for group 0, downlink 1
14:47:48:setup_element:INFO:	Scanning data phases
14:47:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:47:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:53:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:47:53:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXXXXXXXXXX___________
Data delay found: 2
14:47:53:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXXXXXX____________________
Data delay found: 35
14:47:53:setup_element:INFO:	Eye window for uplink 2 : _______XXXXXXXXXX_______________________
Data delay found: 31
14:47:53:setup_element:INFO:	Eye window for uplink 3 : ________XXXXXXXX________________________
Data delay found: 31
14:47:53:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXXXXX_________________________
Data delay found: 30
14:47:53:setup_element:INFO:	Eye window for uplink 5 : _____XXXXXXXXXX_________________________
Data delay found: 29
14:47:53:setup_element:INFO:	Eye window for uplink 6 : ___XXXXXXXXXX___________________________
Data delay found: 27
14:47:53:setup_element:INFO:	Eye window for uplink 7 : __XXXXXXXXXX____________________________
Data delay found: 26
14:47:53:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXXXXX_______
Data delay found: 9
14:47:53:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXXX____
Data delay found: 12
14:47:53:setup_element:INFO:	Eye window for uplink 10: _____________________________XXXXXXX____
Data delay found: 12
14:47:53:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
14:47:53:setup_element:INFO:	Eye window for uplink 12: _______________________________XXXXXXX__
Data delay found: 14
14:47:53:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
14:47:53:setup_element:INFO:	Eye window for uplink 14: ________________________________XXXXXXX_
Data delay found: 15
14:47:53:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXXXXX
Data delay found: 15
14:47:53:setup_element:INFO:	Setting the data phase to 2 for uplink 0
14:47:53:setup_element:INFO:	Setting the data phase to 35 for uplink 1
14:47:53:setup_element:INFO:	Setting the data phase to 31 for uplink 2
14:47:53:setup_element:INFO:	Setting the data phase to 31 for uplink 3
14:47:53:setup_element:INFO:	Setting the data phase to 30 for uplink 4
14:47:53:setup_element:INFO:	Setting the data phase to 29 for uplink 5
14:47:53:setup_element:INFO:	Setting the data phase to 27 for uplink 6
14:47:53:setup_element:INFO:	Setting the data phase to 26 for uplink 7
14:47:53:setup_element:INFO:	Setting the data phase to 9 for uplink 8
14:47:53:setup_element:INFO:	Setting the data phase to 12 for uplink 9
14:47:53:setup_element:INFO:	Setting the data phase to 12 for uplink 10
14:47:53:setup_element:INFO:	Setting the data phase to 14 for uplink 11
14:47:53:setup_element:INFO:	Setting the data phase to 14 for uplink 12
14:47:53:setup_element:INFO:	Setting the data phase to 14 for uplink 13
14:47:53:setup_element:INFO:	Setting the data phase to 15 for uplink 14
14:47:53:setup_element:INFO:	Setting the data phase to 15 for uplink 15
14:47:53:setup_element:INFO:	Beginning SMX ASICs map scan
14:47:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:47:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:53:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:47:53:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:47:53:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:47:53:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:47:53:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:47:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:47:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:47:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:47:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:47:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:47:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:47:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:47:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:47:54:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:47:54:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:47:54:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:47:54:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:47:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:47:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:47:56:setup_element:INFO:	Performing Elink synchronization
14:47:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:47:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:47:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:47:56:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:47:56:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:47:57:febtest:INFO:	Init all SMX (CSA): 30
14:48:13:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:48:13:febtest:INFO:	01-00 | XA-000-09-004-042-009-010-04 |  37.7 | 1177.4
14:48:14:febtest:INFO:	08-01 | XA-000-09-004-042-006-018-07 |  44.1 | 1153.7
14:48:14:febtest:INFO:	03-02 | XA-000-09-004-042-012-010-15 |  40.9 | 1159.7
14:48:14:febtest:INFO:	10-03 | XA-000-09-004-042-009-018-03 |  47.3 | 1135.9
14:48:14:febtest:INFO:	05-04 | XA-000-09-004-042-015-010-01 |  25.1 | 1218.6
14:48:14:febtest:INFO:	12-05 | XA-000-09-004-042-015-018-06 |  34.6 | 1177.4
14:48:15:febtest:INFO:	07-06 | XA-000-09-004-042-018-010-10 |  28.2 | 1206.9
14:48:15:febtest:INFO:	14-07 | XA-000-09-004-042-018-018-13 |  15.6 | 1242.0
14:48:16:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:48:18:ST3_smx:INFO:	chip: 1-0 	 37.726682 C 	 1189.190035 mV
14:48:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:18:ST3_smx:INFO:		Electrons
14:48:18:ST3_smx:INFO:	# loops 0
14:48:20:ST3_smx:INFO:	# loops 1
14:48:22:ST3_smx:INFO:	# loops 2
14:48:24:ST3_smx:INFO:	Total # of broken channels: 0
14:48:24:ST3_smx:INFO:	List of broken channels: []
14:48:24:ST3_smx:INFO:	Total # of broken channels: 0
14:48:24:ST3_smx:INFO:	List of broken channels: []
14:48:26:ST3_smx:INFO:	chip: 8-1 	 44.073563 C 	 1171.483840 mV
14:48:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:26:ST3_smx:INFO:		Electrons
14:48:26:ST3_smx:INFO:	# loops 0
14:48:28:ST3_smx:INFO:	# loops 1
14:48:30:ST3_smx:INFO:	# loops 2
14:48:31:ST3_smx:INFO:	Total # of broken channels: 0
14:48:31:ST3_smx:INFO:	List of broken channels: []
14:48:31:ST3_smx:INFO:	Total # of broken channels: 0
14:48:31:ST3_smx:INFO:	List of broken channels: []
14:48:33:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1171.483840 mV
14:48:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:33:ST3_smx:INFO:		Electrons
14:48:33:ST3_smx:INFO:	# loops 0
14:48:35:ST3_smx:INFO:	# loops 1
14:48:37:ST3_smx:INFO:	# loops 2
14:48:40:ST3_smx:INFO:	Total # of broken channels: 0
14:48:40:ST3_smx:INFO:	List of broken channels: []
14:48:40:ST3_smx:INFO:	Total # of broken channels: 0
14:48:40:ST3_smx:INFO:	List of broken channels: []
14:48:41:ST3_smx:INFO:	chip: 10-3 	 50.430383 C 	 1147.806000 mV
14:48:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:41:ST3_smx:INFO:		Electrons
14:48:41:ST3_smx:INFO:	# loops 0
14:48:43:ST3_smx:INFO:	# loops 1
14:48:45:ST3_smx:INFO:	# loops 2
14:48:47:ST3_smx:INFO:	Total # of broken channels: 0
14:48:47:ST3_smx:INFO:	List of broken channels: []
14:48:47:ST3_smx:INFO:	Total # of broken channels: 0
14:48:47:ST3_smx:INFO:	List of broken channels: []
14:48:49:ST3_smx:INFO:	chip: 5-4 	 25.062742 C 	 1224.468235 mV
14:48:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:49:ST3_smx:INFO:		Electrons
14:48:49:ST3_smx:INFO:	# loops 0
14:48:51:ST3_smx:INFO:	# loops 1
14:48:52:ST3_smx:INFO:	# loops 2
14:48:54:ST3_smx:INFO:	Total # of broken channels: 0
14:48:54:ST3_smx:INFO:	List of broken channels: []
14:48:54:ST3_smx:INFO:	Total # of broken channels: 0
14:48:54:ST3_smx:INFO:	List of broken channels: []
14:48:56:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1195.082160 mV
14:48:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:48:56:ST3_smx:INFO:		Electrons
14:48:56:ST3_smx:INFO:	# loops 0
14:48:58:ST3_smx:INFO:	# loops 1
14:49:00:ST3_smx:INFO:	# loops 2
14:49:02:ST3_smx:INFO:	Total # of broken channels: 0
14:49:02:ST3_smx:INFO:	List of broken channels: []
14:49:02:ST3_smx:INFO:	Total # of broken channels: 1
14:49:02:ST3_smx:INFO:	List of broken channels: [55]
14:49:04:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1218.600960 mV
14:49:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:49:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:49:04:ST3_smx:INFO:		Electrons
14:49:04:ST3_smx:INFO:	# loops 0
14:49:05:ST3_smx:INFO:	# loops 1
14:49:07:ST3_smx:INFO:	# loops 2
14:49:09:ST3_smx:INFO:	Total # of broken channels: 0
14:49:09:ST3_smx:INFO:	List of broken channels: []
14:49:09:ST3_smx:INFO:	Total # of broken channels: 0
14:49:09:ST3_smx:INFO:	List of broken channels: []
14:49:11:ST3_smx:INFO:	chip: 14-7 	 15.590880 C 	 1259.567515 mV
14:49:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:49:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:49:11:ST3_smx:INFO:		Electrons
14:49:11:ST3_smx:INFO:	# loops 0
14:49:13:ST3_smx:INFO:	# loops 1
14:49:15:ST3_smx:INFO:	# loops 2
14:49:17:ST3_smx:INFO:	Total # of broken channels: 0
14:49:17:ST3_smx:INFO:	List of broken channels: []
14:49:17:ST3_smx:INFO:	Total # of broken channels: 0
14:49:17:ST3_smx:INFO:	List of broken channels: []
14:49:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:49:17:febtest:INFO:	01-00 | XA-000-09-004-042-009-010-04 |  40.9 | 1206.9
14:49:18:febtest:INFO:	08-01 | XA-000-09-004-042-006-018-07 |  44.1 | 1189.2
14:49:18:febtest:INFO:	03-02 | XA-000-09-004-042-012-010-15 |  40.9 | 1195.1
14:49:18:febtest:INFO:	10-03 | XA-000-09-004-042-009-018-03 |  50.4 | 1165.6
14:49:18:febtest:INFO:	05-04 | XA-000-09-004-042-015-010-01 |  28.2 | 1247.9
14:49:18:febtest:INFO:	12-05 | XA-000-09-004-042-015-018-06 |  37.7 | 1212.7
14:49:19:febtest:INFO:	07-06 | XA-000-09-004-042-018-010-10 |  31.4 | 1242.0
14:49:19:febtest:INFO:	14-07 | XA-000-09-004-042-018-018-13 |  18.7 | 1294.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_10_17-14_47_43
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3265| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	22303

MODULE_NAME:	L2DL400113 M2DL4B2001132B2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L2DL400113
MODULE_MODULE:	M2DL4B2001132B2
MODULE_SIZE:	62
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4160', '1.850', '2.2610', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9810', '1.850', '2.4540', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9830', '1.850', '0.5231', '0.000', '0.0000', '0.000', '0.0000']