FEB_3268    22.10.25 07:46:29

Info
            07:46:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:46:29:ST3_Shared:INFO:	                         FEB-Sensor                         
07:46:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:46:51:ST3_ModuleSelector:INFO:	L2DL200112 M2DL2B1001121B2 42 A

07:46:51:ST3_ModuleSelector:INFO:	21272

07:46:51:febtest:INFO:	Testing FEB with SN 3268
07:46:53:smx_tester:INFO:	Scanning setup
07:46:53:elinks:INFO:	Disabling clock on downlink 0
07:46:53:elinks:INFO:	Disabling clock on downlink 1
07:46:53:elinks:INFO:	Disabling clock on downlink 2
07:46:53:elinks:INFO:	Disabling clock on downlink 3
07:46:53:elinks:INFO:	Disabling clock on downlink 4
07:46:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:46:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:46:53:elinks:INFO:	Disabling clock on downlink 0
07:46:53:elinks:INFO:	Disabling clock on downlink 1
07:46:53:elinks:INFO:	Disabling clock on downlink 2
07:46:53:elinks:INFO:	Disabling clock on downlink 3
07:46:53:elinks:INFO:	Disabling clock on downlink 4
07:46:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:46:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:46:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:46:53:elinks:INFO:	Disabling clock on downlink 0
07:46:53:elinks:INFO:	Disabling clock on downlink 1
07:46:53:elinks:INFO:	Disabling clock on downlink 2
07:46:53:elinks:INFO:	Disabling clock on downlink 3
07:46:53:elinks:INFO:	Disabling clock on downlink 4
07:46:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:46:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:46:53:elinks:INFO:	Disabling clock on downlink 0
07:46:53:elinks:INFO:	Disabling clock on downlink 1
07:46:53:elinks:INFO:	Disabling clock on downlink 2
07:46:53:elinks:INFO:	Disabling clock on downlink 3
07:46:53:elinks:INFO:	Disabling clock on downlink 4
07:46:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:46:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:46:53:elinks:INFO:	Disabling clock on downlink 0
07:46:53:elinks:INFO:	Disabling clock on downlink 1
07:46:53:elinks:INFO:	Disabling clock on downlink 2
07:46:53:elinks:INFO:	Disabling clock on downlink 3
07:46:53:elinks:INFO:	Disabling clock on downlink 4
07:46:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:46:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:46:53:setup_element:INFO:	Scanning clock phase
07:46:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:46:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:46:54:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:46:54:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
07:46:54:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
07:46:54:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
07:46:54:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:46:54:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:46:54:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
07:46:54:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
07:46:54:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
07:46:54:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
07:46:54:setup_element:INFO:	Setting the clock phase to 26 for group 0, downlink 1
07:46:54:setup_element:INFO:	Scanning data phases
07:46:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:46:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:46:59:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:46:59:setup_element:INFO:	Eye window for uplink 0 : ___________________XXXXXXXXXX___________
Data delay found: 3
07:46:59:setup_element:INFO:	Eye window for uplink 1 : _______________XXXXXXXXXXX______________
Data delay found: 0
07:46:59:setup_element:INFO:	Eye window for uplink 2 : __________XXXXXX_X______________________
Data delay found: 33
07:46:59:setup_element:INFO:	Eye window for uplink 3 : _________XXXXXXX________________________
Data delay found: 32
07:46:59:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXXXX___________________________
Data delay found: 28
07:46:59:setup_element:INFO:	Eye window for uplink 5 : ____XXXXXXXX____________________________
Data delay found: 27
07:46:59:setup_element:INFO:	Eye window for uplink 6 : __XXXXXXXX______________________________
Data delay found: 25
07:46:59:setup_element:INFO:	Eye window for uplink 7 : _XXXXXXXXX______________________________
Data delay found: 25
07:46:59:setup_element:INFO:	Eye window for uplink 8 : ___________________________XXXXXXXX_____
Data delay found: 10
07:46:59:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
07:46:59:setup_element:INFO:	Eye window for uplink 10: _____________________________XXXXXXXX___
Data delay found: 12
07:46:59:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXXXXX_
Data delay found: 14
07:46:59:setup_element:INFO:	Eye window for uplink 12: XX_______________________________XXXXXXX
Data delay found: 17
07:46:59:setup_element:INFO:	Eye window for uplink 13: XX________________________________XXXXXX
Data delay found: 17
07:46:59:setup_element:INFO:	Setting the data phase to 3 for uplink 0
07:46:59:setup_element:INFO:	Setting the data phase to 0 for uplink 1
07:46:59:setup_element:INFO:	Setting the data phase to 33 for uplink 2
07:46:59:setup_element:INFO:	Setting the data phase to 32 for uplink 3
07:46:59:setup_element:INFO:	Setting the data phase to 28 for uplink 4
07:46:59:setup_element:INFO:	Setting the data phase to 27 for uplink 5
07:46:59:setup_element:INFO:	Setting the data phase to 25 for uplink 6
07:46:59:setup_element:INFO:	Setting the data phase to 25 for uplink 7
07:46:59:setup_element:INFO:	Setting the data phase to 10 for uplink 8
07:46:59:setup_element:INFO:	Setting the data phase to 13 for uplink 9
07:46:59:setup_element:INFO:	Setting the data phase to 12 for uplink 10
07:46:59:setup_element:INFO:	Setting the data phase to 14 for uplink 11
07:46:59:setup_element:INFO:	Setting the data phase to 17 for uplink 12
07:46:59:setup_element:INFO:	Setting the data phase to 17 for uplink 13
07:46:59:setup_element:INFO:	Beginning SMX ASICs map scan
07:46:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:46:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:46:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:46:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:46:59:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13]
07:46:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:46:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:46:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:46:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:46:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:46:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:47:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:47:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:47:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:47:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:47:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:47:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:47:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:47:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:47:02:setup_element:INFO:	Performing Elink synchronization
07:47:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:47:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:47:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:47:02:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:47:02:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
|_________________________________________________________________________|
07:47:02:febtest:INFO:	Init all SMX (CSA): 30
07:47:19:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:47:19:febtest:INFO:	01-00 | XA-000-09-004-042-013-004-02 |  31.4 | 1171.5
07:47:19:febtest:INFO:	08-01 | XA-000-09-004-042-004-006-03 |  34.6 | 1159.7
07:47:19:febtest:INFO:	03-02 | XA-000-09-004-042-007-005-13 |  34.6 | 1165.6
07:47:19:febtest:INFO:	10-03 | XA-000-09-004-042-007-003-13 |  40.9 | 1141.9
07:47:20:febtest:INFO:	05-04 | XA-000-09-004-042-010-003-10 |  31.4 | 1183.3
07:47:20:febtest:INFO:	12-05 | XA-000-09-004-042-007-004-13 |  15.6 | 1224.5
07:47:20:febtest:INFO:	07-06 | XA-000-09-004-042-010-004-10 |  28.2 | 1177.4
07:47:21:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:47:23:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1183.292940 mV
07:47:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:23:ST3_smx:INFO:		Electrons
07:47:23:ST3_smx:INFO:	# loops 0
07:47:25:ST3_smx:INFO:	# loops 1
07:47:27:ST3_smx:INFO:	# loops 2
07:47:29:ST3_smx:INFO:	Total # of broken channels: 0
07:47:29:ST3_smx:INFO:	List of broken channels: []
07:47:29:ST3_smx:INFO:	Total # of broken channels: 0
07:47:29:ST3_smx:INFO:	List of broken channels: []
07:47:30:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1177.390875 mV
07:47:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:30:ST3_smx:INFO:		Electrons
07:47:30:ST3_smx:INFO:	# loops 0
07:47:32:ST3_smx:INFO:	# loops 1
07:47:34:ST3_smx:INFO:	# loops 2
07:47:36:ST3_smx:INFO:	Total # of broken channels: 0
07:47:36:ST3_smx:INFO:	List of broken channels: []
07:47:36:ST3_smx:INFO:	Total # of broken channels: 0
07:47:36:ST3_smx:INFO:	List of broken channels: []
07:47:38:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1177.390875 mV
07:47:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:38:ST3_smx:INFO:		Electrons
07:47:38:ST3_smx:INFO:	# loops 0
07:47:39:ST3_smx:INFO:	# loops 1
07:47:41:ST3_smx:INFO:	# loops 2
07:47:43:ST3_smx:INFO:	Total # of broken channels: 0
07:47:43:ST3_smx:INFO:	List of broken channels: []
07:47:43:ST3_smx:INFO:	Total # of broken channels: 1
07:47:43:ST3_smx:INFO:	List of broken channels: [67]
07:47:45:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1153.732915 mV
07:47:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:45:ST3_smx:INFO:		Electrons
07:47:45:ST3_smx:INFO:	# loops 0
07:47:47:ST3_smx:INFO:	# loops 1
07:47:48:ST3_smx:INFO:	# loops 2
07:47:50:ST3_smx:INFO:	Total # of broken channels: 0
07:47:50:ST3_smx:INFO:	List of broken channels: []
07:47:50:ST3_smx:INFO:	Total # of broken channels: 0
07:47:50:ST3_smx:INFO:	List of broken channels: []
07:47:52:ST3_smx:INFO:	chip: 5-4 	 31.389742 C 	 1189.190035 mV
07:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:52:ST3_smx:INFO:		Electrons
07:47:52:ST3_smx:INFO:	# loops 0
07:47:54:ST3_smx:INFO:	# loops 1
07:47:55:ST3_smx:INFO:	# loops 2
07:47:57:ST3_smx:INFO:	Total # of broken channels: 0
07:47:57:ST3_smx:INFO:	List of broken channels: []
07:47:57:ST3_smx:INFO:	Total # of broken channels: 0
07:47:57:ST3_smx:INFO:	List of broken channels: []
07:47:59:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1236.187875 mV
07:47:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:59:ST3_smx:INFO:		Electrons
07:47:59:ST3_smx:INFO:	# loops 0
07:48:01:ST3_smx:INFO:	# loops 1
07:48:03:ST3_smx:INFO:	# loops 2
07:48:04:ST3_smx:INFO:	Total # of broken channels: 0
07:48:04:ST3_smx:INFO:	List of broken channels: []
07:48:04:ST3_smx:INFO:	Total # of broken channels: 0
07:48:04:ST3_smx:INFO:	List of broken channels: []
07:48:06:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1189.190035 mV
07:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:06:ST3_smx:INFO:		Electrons
07:48:06:ST3_smx:INFO:	# loops 0
07:48:08:ST3_smx:INFO:	# loops 1
07:48:10:ST3_smx:INFO:	# loops 2
07:48:12:ST3_smx:INFO:	Total # of broken channels: 0
07:48:12:ST3_smx:INFO:	List of broken channels: []
07:48:12:ST3_smx:INFO:	Total # of broken channels: 0
07:48:12:ST3_smx:INFO:	List of broken channels: []
07:48:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:48:12:febtest:INFO:	01-00 | XA-000-09-004-042-013-004-02 |  34.6 | 1212.7
07:48:12:febtest:INFO:	08-01 | XA-000-09-004-042-004-006-03 |  37.7 | 1195.1
07:48:13:febtest:INFO:	03-02 | XA-000-09-004-042-007-005-13 |  37.7 | 1201.0
07:48:13:febtest:INFO:	10-03 | XA-000-09-004-042-007-003-13 |  47.3 | 1177.4
07:48:13:febtest:INFO:	05-04 | XA-000-09-004-042-010-003-10 |  34.6 | 1212.7
07:48:13:febtest:INFO:	12-05 | XA-000-09-004-042-007-004-13 |  21.9 | 1259.6
07:48:13:febtest:INFO:	07-06 | XA-000-09-004-042-010-004-10 |  34.6 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_10_22-07_46_29
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3268| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	21272

MODULE_NAME:	L2DL200112 M2DL2B1001121B2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L2DL200112
MODULE_MODULE:	M2DL2B1001121B2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5520', '1.849', '2.0640', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9650', '1.850', '2.4960', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9540', '1.850', '0.7922', '0.000', '0.0000', '0.000', '0.0000']
07:48:21:febtest:WARNING:	No report has been created! Please test first and Save...
07:48:32:febtest:WARNING:	No report has been created! Please test first and Save...