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FEB_3275 28.10.25 10:50:02
Info
10:50:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:02:ST3_Shared:INFO: FEB-Microcable
10:50:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:02:febtest:INFO: Testing FEB with SN 3275
10:50:03:smx_tester:INFO: Scanning setup
10:50:03:elinks:INFO: Disabling clock on downlink 0
10:50:03:elinks:INFO: Disabling clock on downlink 1
10:50:03:elinks:INFO: Disabling clock on downlink 2
10:50:03:elinks:INFO: Disabling clock on downlink 3
10:50:03:elinks:INFO: Disabling clock on downlink 4
10:50:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:50:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:03:elinks:INFO: Disabling clock on downlink 0
10:50:03:elinks:INFO: Disabling clock on downlink 1
10:50:03:elinks:INFO: Disabling clock on downlink 2
10:50:03:elinks:INFO: Disabling clock on downlink 3
10:50:03:elinks:INFO: Disabling clock on downlink 4
10:50:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:50:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:50:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:04:elinks:INFO: Disabling clock on downlink 0
10:50:04:elinks:INFO: Disabling clock on downlink 1
10:50:04:elinks:INFO: Disabling clock on downlink 2
10:50:04:elinks:INFO: Disabling clock on downlink 3
10:50:04:elinks:INFO: Disabling clock on downlink 4
10:50:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:50:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:04:elinks:INFO: Disabling clock on downlink 0
10:50:04:elinks:INFO: Disabling clock on downlink 1
10:50:04:elinks:INFO: Disabling clock on downlink 2
10:50:04:elinks:INFO: Disabling clock on downlink 3
10:50:04:elinks:INFO: Disabling clock on downlink 4
10:50:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:04:elinks:INFO: Disabling clock on downlink 0
10:50:04:elinks:INFO: Disabling clock on downlink 1
10:50:04:elinks:INFO: Disabling clock on downlink 2
10:50:04:elinks:INFO: Disabling clock on downlink 3
10:50:04:elinks:INFO: Disabling clock on downlink 4
10:50:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:50:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:04:setup_element:INFO: Scanning clock phase
10:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:04:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:50:04:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________XXXXX_________
Clock Delay: 28
10:50:04:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________XXXXX_________
Clock Delay: 28
10:50:04:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
10:50:04:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
10:50:04:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:50:04:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:50:04:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:50:04:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:50:04:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
10:50:04:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
10:50:04:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:50:04:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:50:04:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________XXXXXXX______________
Clock Delay: 22
10:50:04:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________XXXXXXX______________
Clock Delay: 22
10:50:04:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXX_X___________
Clock Delay: 24
10:50:04:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXX_X___________
Clock Delay: 24
10:50:04:setup_element:INFO: Setting the clock phase to 24 for group 0, downlink 1
10:50:04:setup_element:INFO: Scanning data phases
10:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:09:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:50:09:setup_element:INFO: Eye window for uplink 0 : ___________________XXXXXXXXXXXXX________
Data delay found: 5
10:50:09:setup_element:INFO: Eye window for uplink 1 : ________________XXXXXXXXXXXXXX__________
Data delay found: 2
10:50:09:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXXXX____________________
Data delay found: 35
10:50:09:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXXXXX____________________
Data delay found: 34
10:50:09:setup_element:INFO: Eye window for uplink 4 : ________XXXXXXXXXXXXX___________________
Data delay found: 34
10:50:09:setup_element:INFO: Eye window for uplink 5 : __________XXXXXXXXX_____________________
Data delay found: 34
10:50:09:setup_element:INFO: Eye window for uplink 6 : ___XXXXXXXXX____________________________
Data delay found: 27
10:50:09:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXX___________________________XX
Data delay found: 24
10:50:09:setup_element:INFO: Eye window for uplink 8 : X________________________________XXXXXXX
Data delay found: 16
10:50:09:setup_element:INFO: Eye window for uplink 9 : XXXX_______________________________XXXXX
Data delay found: 19
10:50:09:setup_element:INFO: Eye window for uplink 10: XXXX_______________________________XXXXX
Data delay found: 19
10:50:09:setup_element:INFO: Eye window for uplink 11: XXXX________________________________XXXX
Data delay found: 19
10:50:09:setup_element:INFO: Eye window for uplink 12: XX_______________________________XXXXXXX
Data delay found: 17
10:50:09:setup_element:INFO: Eye window for uplink 13: XX________________________________XXXXXX
Data delay found: 17
10:50:09:setup_element:INFO: Eye window for uplink 14: XXX________________________________XXXXX
Data delay found: 18
10:50:09:setup_element:INFO: Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
10:50:09:setup_element:INFO: Setting the data phase to 5 for uplink 0
10:50:09:setup_element:INFO: Setting the data phase to 2 for uplink 1
10:50:09:setup_element:INFO: Setting the data phase to 35 for uplink 2
10:50:09:setup_element:INFO: Setting the data phase to 34 for uplink 3
10:50:09:setup_element:INFO: Setting the data phase to 34 for uplink 4
10:50:09:setup_element:INFO: Setting the data phase to 34 for uplink 5
10:50:09:setup_element:INFO: Setting the data phase to 27 for uplink 6
10:50:09:setup_element:INFO: Setting the data phase to 24 for uplink 7
10:50:09:setup_element:INFO: Setting the data phase to 16 for uplink 8
10:50:09:setup_element:INFO: Setting the data phase to 19 for uplink 9
10:50:09:setup_element:INFO: Setting the data phase to 19 for uplink 10
10:50:09:setup_element:INFO: Setting the data phase to 19 for uplink 11
10:50:09:setup_element:INFO: Setting the data phase to 17 for uplink 12
10:50:09:setup_element:INFO: Setting the data phase to 17 for uplink 13
10:50:09:setup_element:INFO: Setting the data phase to 18 for uplink 14
10:50:09:setup_element:INFO: Setting the data phase to 19 for uplink 15
10:50:09:setup_element:INFO: Beginning SMX ASICs map scan
10:50:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:50:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:50:10:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:50:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:50:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:50:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:50:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:50:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:50:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:50:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:50:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:50:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:50:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:50:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:50:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:50:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:50:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:50:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:50:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:50:12:setup_element:INFO: Performing Elink synchronization
10:50:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:50:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:50:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:50:12:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:50:13:febtest:INFO: Init all SMX (CSA): 30
10:50:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:50:26:febtest:INFO: 01-00 | XA-000-09-004-042-011-005-07 | 25.1 | 1195.1
10:50:27:febtest:INFO: 08-01 | XA-000-09-004-042-002-010-06 | 34.6 | 1165.6
10:50:27:febtest:INFO: 03-02 | XA-000-09-004-042-005-010-14 | 18.7 | 1218.6
10:50:27:febtest:INFO: 10-03 | XA-000-09-004-042-014-011-12 | 25.1 | 1201.0
10:50:27:febtest:INFO: 05-04 | XA-000-09-004-042-017-011-04 | 28.2 | 1189.2
10:50:27:febtest:INFO: 12-05 | XA-000-09-004-042-014-012-12 | 31.4 | 1171.5
10:50:28:febtest:INFO: 07-06 | XA-000-09-004-042-017-012-04 | 21.9 | 1206.9
10:50:28:febtest:INFO: 14-07 | XA-000-09-004-042-002-011-06 | 25.1 | 1195.1
10:50:29:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:50:31:ST3_smx:INFO: chip: 1-0 25.062742 C 1212.728715 mV
10:50:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:31:ST3_smx:INFO: Electrons
10:50:31:ST3_smx:INFO: # loops 0
10:50:32:ST3_smx:INFO: # loops 1
10:50:34:ST3_smx:INFO: # loops 2
10:50:36:ST3_smx:INFO: Total # of broken channels: 0
10:50:36:ST3_smx:INFO: List of broken channels: []
10:50:36:ST3_smx:INFO: Total # of broken channels: 0
10:50:36:ST3_smx:INFO: List of broken channels: []
10:50:38:ST3_smx:INFO: chip: 8-1 34.556970 C 1177.390875 mV
10:50:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:38:ST3_smx:INFO: Electrons
10:50:38:ST3_smx:INFO: # loops 0
10:50:39:ST3_smx:INFO: # loops 1
10:50:41:ST3_smx:INFO: # loops 2
10:50:42:ST3_smx:INFO: Total # of broken channels: 0
10:50:42:ST3_smx:INFO: List of broken channels: []
10:50:42:ST3_smx:INFO: Total # of broken channels: 0
10:50:42:ST3_smx:INFO: List of broken channels: []
10:50:44:ST3_smx:INFO: chip: 3-2 21.902970 C 1230.330540 mV
10:50:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:44:ST3_smx:INFO: Electrons
10:50:44:ST3_smx:INFO: # loops 0
10:50:45:ST3_smx:INFO: # loops 1
10:50:47:ST3_smx:INFO: # loops 2
10:50:49:ST3_smx:INFO: Total # of broken channels: 0
10:50:49:ST3_smx:INFO: List of broken channels: []
10:50:49:ST3_smx:INFO: Total # of broken channels: 0
10:50:49:ST3_smx:INFO: List of broken channels: []
10:50:50:ST3_smx:INFO: chip: 10-3 25.062742 C 1212.728715 mV
10:50:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:50:ST3_smx:INFO: Electrons
10:50:50:ST3_smx:INFO: # loops 0
10:50:52:ST3_smx:INFO: # loops 1
10:50:53:ST3_smx:INFO: # loops 2
10:50:55:ST3_smx:INFO: Total # of broken channels: 0
10:50:55:ST3_smx:INFO: List of broken channels: []
10:50:55:ST3_smx:INFO: Total # of broken channels: 0
10:50:55:ST3_smx:INFO: List of broken channels: []
10:50:56:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
10:50:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:56:ST3_smx:INFO: Electrons
10:50:56:ST3_smx:INFO: # loops 0
10:50:58:ST3_smx:INFO: # loops 1
10:50:59:ST3_smx:INFO: # loops 2
10:51:01:ST3_smx:INFO: Total # of broken channels: 0
10:51:01:ST3_smx:INFO: List of broken channels: []
10:51:01:ST3_smx:INFO: Total # of broken channels: 0
10:51:01:ST3_smx:INFO: List of broken channels: []
10:51:03:ST3_smx:INFO: chip: 12-5 34.556970 C 1183.292940 mV
10:51:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:03:ST3_smx:INFO: Electrons
10:51:03:ST3_smx:INFO: # loops 0
10:51:04:ST3_smx:INFO: # loops 1
10:51:06:ST3_smx:INFO: # loops 2
10:51:07:ST3_smx:INFO: Total # of broken channels: 0
10:51:07:ST3_smx:INFO: List of broken channels: []
10:51:07:ST3_smx:INFO: Total # of broken channels: 0
10:51:07:ST3_smx:INFO: List of broken channels: []
10:51:09:ST3_smx:INFO: chip: 7-6 21.902970 C 1218.600960 mV
10:51:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:09:ST3_smx:INFO: Electrons
10:51:09:ST3_smx:INFO: # loops 0
10:51:10:ST3_smx:INFO: # loops 1
10:51:12:ST3_smx:INFO: # loops 2
10:51:14:ST3_smx:INFO: Total # of broken channels: 0
10:51:14:ST3_smx:INFO: List of broken channels: []
10:51:14:ST3_smx:INFO: Total # of broken channels: 0
10:51:14:ST3_smx:INFO: List of broken channels: []
10:51:15:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV
10:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:15:ST3_smx:INFO: Electrons
10:51:15:ST3_smx:INFO: # loops 0
10:51:17:ST3_smx:INFO: # loops 1
10:51:18:ST3_smx:INFO: # loops 2
10:51:20:ST3_smx:INFO: Total # of broken channels: 0
10:51:20:ST3_smx:INFO: List of broken channels: []
10:51:20:ST3_smx:INFO: Total # of broken channels: 0
10:51:20:ST3_smx:INFO: List of broken channels: []
10:51:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:51:20:febtest:INFO: 01-00 | XA-000-09-004-042-011-005-07 | 31.4 | 1230.3
10:51:21:febtest:INFO: 08-01 | XA-000-09-004-042-002-010-06 | 37.7 | 1201.0
10:51:21:febtest:INFO: 03-02 | XA-000-09-004-042-005-010-14 | 25.1 | 1253.7
10:51:21:febtest:INFO: 10-03 | XA-000-09-004-042-014-011-12 | 28.2 | 1236.2
10:51:21:febtest:INFO: 05-04 | XA-000-09-004-042-017-011-04 | 31.4 | 1218.6
10:51:21:febtest:INFO: 12-05 | XA-000-09-004-042-014-012-12 | 37.7 | 1206.9
10:51:22:febtest:INFO: 07-06 | XA-000-09-004-042-017-012-04 | 25.1 | 1236.2
10:51:22:febtest:INFO: 14-07 | XA-000-09-004-042-002-011-06 | 28.2 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_28-10_50_02
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3275| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6520', '1.850', '2.4410', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9560', '1.850', '2.3600', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5116', '0.000', '0.0000', '0.000', '0.0000']