FEB_3278 31.10.25 13:52:09
Info
13:52:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:52:09:ST3_Shared:INFO: FEB-Microcable
13:52:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:52:09:febtest:INFO: Testing FEB with SN 3278
13:52:11:smx_tester:INFO: Scanning setup
13:52:11:elinks:INFO: Disabling clock on downlink 0
13:52:11:elinks:INFO: Disabling clock on downlink 1
13:52:11:elinks:INFO: Disabling clock on downlink 2
13:52:11:elinks:INFO: Disabling clock on downlink 3
13:52:11:elinks:INFO: Disabling clock on downlink 4
13:52:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:52:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:52:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:52:11:elinks:INFO: Disabling clock on downlink 0
13:52:11:elinks:INFO: Disabling clock on downlink 1
13:52:11:elinks:INFO: Disabling clock on downlink 2
13:52:11:elinks:INFO: Disabling clock on downlink 3
13:52:11:elinks:INFO: Disabling clock on downlink 4
13:52:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:52:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:52:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:52:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:52:11:elinks:INFO: Disabling clock on downlink 0
13:52:11:elinks:INFO: Disabling clock on downlink 1
13:52:11:elinks:INFO: Disabling clock on downlink 2
13:52:11:elinks:INFO: Disabling clock on downlink 3
13:52:11:elinks:INFO: Disabling clock on downlink 4
13:52:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:52:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:52:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:52:11:elinks:INFO: Disabling clock on downlink 0
13:52:11:elinks:INFO: Disabling clock on downlink 1
13:52:11:elinks:INFO: Disabling clock on downlink 2
13:52:11:elinks:INFO: Disabling clock on downlink 3
13:52:11:elinks:INFO: Disabling clock on downlink 4
13:52:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:52:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:52:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:52:11:elinks:INFO: Disabling clock on downlink 0
13:52:11:elinks:INFO: Disabling clock on downlink 1
13:52:11:elinks:INFO: Disabling clock on downlink 2
13:52:11:elinks:INFO: Disabling clock on downlink 3
13:52:11:elinks:INFO: Disabling clock on downlink 4
13:52:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:52:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:52:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:52:12:setup_element:INFO: Scanning clock phase
13:52:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:52:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:52:12:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:52:12:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________XXXXX_X_____________
Clock Delay: 23
13:52:12:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________XXXXX_X_____________
Clock Delay: 23
13:52:12:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:52:12:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXX____________
Clock Delay: 24
13:52:12:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXX____________
Clock Delay: 24
13:52:12:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________XXXXXXXX___________
Clock Delay: 24
13:52:12:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________XXXXXXXX___________
Clock Delay: 24
13:52:12:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
13:52:12:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
13:52:12:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
13:52:12:setup_element:INFO: Scanning data phases
13:52:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:52:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:52:17:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:52:17:setup_element:INFO: Eye window for uplink 0 : _______________X_XXXXXXXXXX_____________
Data delay found: 0
13:52:17:setup_element:INFO: Eye window for uplink 1 : ____________XXXXXXXXXXX_________________
Data delay found: 37
13:52:17:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXXX_____________________
Data delay found: 35
13:52:17:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXX_______________________
Data delay found: 33
13:52:17:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXX_X______________________
Data delay found: 33
13:52:17:setup_element:INFO: Eye window for uplink 5 : ______X__XXXXXXX________________________
Data delay found: 30
13:52:17:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXX_______________________________
Data delay found: 24
13:52:17:setup_element:INFO: Eye window for uplink 7 : XXXXXX_______________________________XXX
Data delay found: 21
13:52:17:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXXXXXX___
Data delay found: 12
13:52:17:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXXXX_
Data delay found: 14
13:52:17:setup_element:INFO: Eye window for uplink 10: X_______________________________XXXXXXXX
Data delay found: 16
13:52:17:setup_element:INFO: Eye window for uplink 11: XX________________________________XXXXXX
Data delay found: 17
13:52:17:setup_element:INFO: Eye window for uplink 12: XXXX_______________________________XXXXX
Data delay found: 19
13:52:17:setup_element:INFO: Eye window for uplink 13: XXXX________________________________XXXX
Data delay found: 19
13:52:17:setup_element:INFO: Eye window for uplink 14: XXX________________________________XXXXX
Data delay found: 18
13:52:17:setup_element:INFO: Eye window for uplink 15: XX________________________________XXXXXX
Data delay found: 17
13:52:17:setup_element:INFO: Setting the data phase to 0 for uplink 0
13:52:17:setup_element:INFO: Setting the data phase to 37 for uplink 1
13:52:17:setup_element:INFO: Setting the data phase to 35 for uplink 2
13:52:17:setup_element:INFO: Setting the data phase to 33 for uplink 3
13:52:17:setup_element:INFO: Setting the data phase to 33 for uplink 4
13:52:17:setup_element:INFO: Setting the data phase to 30 for uplink 5
13:52:17:setup_element:INFO: Setting the data phase to 24 for uplink 6
13:52:17:setup_element:INFO: Setting the data phase to 21 for uplink 7
13:52:17:setup_element:INFO: Setting the data phase to 12 for uplink 8
13:52:17:setup_element:INFO: Setting the data phase to 14 for uplink 9
13:52:17:setup_element:INFO: Setting the data phase to 16 for uplink 10
13:52:17:setup_element:INFO: Setting the data phase to 17 for uplink 11
13:52:17:setup_element:INFO: Setting the data phase to 19 for uplink 12
13:52:17:setup_element:INFO: Setting the data phase to 19 for uplink 13
13:52:17:setup_element:INFO: Setting the data phase to 18 for uplink 14
13:52:17:setup_element:INFO: Setting the data phase to 17 for uplink 15
13:52:17:setup_element:INFO: Beginning SMX ASICs map scan
13:52:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:52:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:52:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:52:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:52:17:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:52:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:52:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:52:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:52:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:52:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:52:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:52:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:52:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:52:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:52:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:52:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:52:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:52:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:52:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:52:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:52:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:52:20:setup_element:INFO: Performing Elink synchronization
13:52:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:52:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:52:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:52:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:52:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:52:20:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:52:21:febtest:INFO: Init all SMX (CSA): 30
13:52:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:52:34:febtest:INFO: 01-00 | XA-000-09-004-042-009-006-04 | 37.7 | 1159.7
13:52:34:febtest:INFO: 08-01 | XA-000-09-004-042-011-022-00 | 44.1 | 1141.9
13:52:35:febtest:INFO: 03-02 | XA-000-09-004-042-009-005-04 | 37.7 | 1165.6
13:52:35:febtest:INFO: 10-03 | XA-000-09-004-042-008-022-14 | 40.9 | 1159.7
13:52:35:febtest:INFO: 05-04 | XA-000-09-004-042-006-005-00 | 44.1 | 1147.8
13:52:35:febtest:INFO: 12-05 | XA-000-09-004-042-005-022-09 | 47.3 | 1135.9
13:52:35:febtest:INFO: 07-06 | XA-000-09-004-042-006-006-00 | 47.3 | 1135.9
13:52:36:febtest:INFO: 14-07 | XA-000-09-004-042-005-023-09 | 37.7 | 1165.6
13:52:37:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:52:39:ST3_smx:INFO: chip: 1-0 37.726682 C 1171.483840 mV
13:52:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:39:ST3_smx:INFO: Electrons
13:52:39:ST3_smx:INFO: # loops 0
13:52:40:ST3_smx:INFO: # loops 1
13:52:42:ST3_smx:INFO: # loops 2
13:52:44:ST3_smx:INFO: Total # of broken channels: 0
13:52:44:ST3_smx:INFO: List of broken channels: []
13:52:44:ST3_smx:INFO: Total # of broken channels: 0
13:52:44:ST3_smx:INFO: List of broken channels: []
13:52:45:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
13:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:45:ST3_smx:INFO: Electrons
13:52:45:ST3_smx:INFO: # loops 0
13:52:47:ST3_smx:INFO: # loops 1
13:52:48:ST3_smx:INFO: # loops 2
13:52:50:ST3_smx:INFO: Total # of broken channels: 0
13:52:50:ST3_smx:INFO: List of broken channels: []
13:52:50:ST3_smx:INFO: Total # of broken channels: 0
13:52:50:ST3_smx:INFO: List of broken channels: []
13:52:52:ST3_smx:INFO: chip: 3-2 37.726682 C 1177.390875 mV
13:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:52:ST3_smx:INFO: Electrons
13:52:52:ST3_smx:INFO: # loops 0
13:52:53:ST3_smx:INFO: # loops 1
13:52:55:ST3_smx:INFO: # loops 2
13:52:56:ST3_smx:INFO: Total # of broken channels: 0
13:52:56:ST3_smx:INFO: List of broken channels: []
13:52:56:ST3_smx:INFO: Total # of broken channels: 0
13:52:56:ST3_smx:INFO: List of broken channels: []
13:52:58:ST3_smx:INFO: chip: 10-3 40.898880 C 1177.390875 mV
13:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:58:ST3_smx:INFO: Electrons
13:52:58:ST3_smx:INFO: # loops 0
13:52:59:ST3_smx:INFO: # loops 1
13:53:01:ST3_smx:INFO: # loops 2
13:53:03:ST3_smx:INFO: Total # of broken channels: 0
13:53:03:ST3_smx:INFO: List of broken channels: []
13:53:03:ST3_smx:INFO: Total # of broken channels: 0
13:53:03:ST3_smx:INFO: List of broken channels: []
13:53:04:ST3_smx:INFO: chip: 5-4 44.073563 C 1159.654860 mV
13:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:04:ST3_smx:INFO: Electrons
13:53:04:ST3_smx:INFO: # loops 0
13:53:06:ST3_smx:INFO: # loops 1
13:53:08:ST3_smx:INFO: # loops 2
13:53:10:ST3_smx:INFO: Total # of broken channels: 0
13:53:10:ST3_smx:INFO: List of broken channels: []
13:53:10:ST3_smx:INFO: Total # of broken channels: 0
13:53:10:ST3_smx:INFO: List of broken channels: []
13:53:11:ST3_smx:INFO: chip: 12-5 47.250730 C 1147.806000 mV
13:53:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:11:ST3_smx:INFO: Electrons
13:53:11:ST3_smx:INFO: # loops 0
13:53:13:ST3_smx:INFO: # loops 1
13:53:15:ST3_smx:INFO: # loops 2
13:53:17:ST3_smx:INFO: Total # of broken channels: 0
13:53:17:ST3_smx:INFO: List of broken channels: []
13:53:17:ST3_smx:INFO: Total # of broken channels: 0
13:53:17:ST3_smx:INFO: List of broken channels: []
13:53:18:ST3_smx:INFO: chip: 7-6 47.250730 C 1147.806000 mV
13:53:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:18:ST3_smx:INFO: Electrons
13:53:18:ST3_smx:INFO: # loops 0
13:53:20:ST3_smx:INFO: # loops 1
13:53:21:ST3_smx:INFO: # loops 2
13:53:23:ST3_smx:INFO: Total # of broken channels: 0
13:53:23:ST3_smx:INFO: List of broken channels: []
13:53:23:ST3_smx:INFO: Total # of broken channels: 0
13:53:23:ST3_smx:INFO: List of broken channels: []
13:53:24:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
13:53:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:53:24:ST3_smx:INFO: Electrons
13:53:24:ST3_smx:INFO: # loops 0
13:53:26:ST3_smx:INFO: # loops 1
13:53:27:ST3_smx:INFO: # loops 2
13:53:29:ST3_smx:INFO: Total # of broken channels: 0
13:53:29:ST3_smx:INFO: List of broken channels: []
13:53:29:ST3_smx:INFO: Total # of broken channels: 0
13:53:29:ST3_smx:INFO: List of broken channels: []
13:53:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:53:30:febtest:INFO: 01-00 | XA-000-09-004-042-009-006-04 | 40.9 | 1195.1
13:53:30:febtest:INFO: 08-01 | XA-000-09-004-042-011-022-00 | 47.3 | 1171.5
13:53:30:febtest:INFO: 03-02 | XA-000-09-004-042-009-005-04 | 40.9 | 1201.0
13:53:30:febtest:INFO: 10-03 | XA-000-09-004-042-008-022-14 | 40.9 | 1195.1
13:53:30:febtest:INFO: 05-04 | XA-000-09-004-042-006-005-00 | 47.3 | 1183.3
13:53:31:febtest:INFO: 12-05 | XA-000-09-004-042-005-022-09 | 47.3 | 1171.5
13:53:31:febtest:INFO: 07-06 | XA-000-09-004-042-006-006-00 | 50.4 | 1165.6
13:53:31:febtest:INFO: 14-07 | XA-000-09-004-042-005-023-09 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_31-13_52_09
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3278| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5920', '1.850', '2.5650', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0610', '1.850', '2.4530', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0120', '1.850', '0.5284', '0.000', '0.0000', '0.000', '0.0000']