Go Back
FEB_3279 31.10.25 11:53:50
Info
11:53:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:53:50:ST3_Shared:INFO: FEB-Microcable
11:53:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:53:50:febtest:INFO: Testing FEB with SN 3279
11:53:52:smx_tester:INFO: Scanning setup
11:53:52:elinks:INFO: Disabling clock on downlink 0
11:53:52:elinks:INFO: Disabling clock on downlink 1
11:53:52:elinks:INFO: Disabling clock on downlink 2
11:53:52:elinks:INFO: Disabling clock on downlink 3
11:53:52:elinks:INFO: Disabling clock on downlink 4
11:53:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:53:52:elinks:INFO: Disabling clock on downlink 0
11:53:52:elinks:INFO: Disabling clock on downlink 1
11:53:52:elinks:INFO: Disabling clock on downlink 2
11:53:52:elinks:INFO: Disabling clock on downlink 3
11:53:52:elinks:INFO: Disabling clock on downlink 4
11:53:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:53:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:53:52:elinks:INFO: Disabling clock on downlink 0
11:53:52:elinks:INFO: Disabling clock on downlink 1
11:53:52:elinks:INFO: Disabling clock on downlink 2
11:53:52:elinks:INFO: Disabling clock on downlink 3
11:53:52:elinks:INFO: Disabling clock on downlink 4
11:53:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:53:52:elinks:INFO: Disabling clock on downlink 0
11:53:52:elinks:INFO: Disabling clock on downlink 1
11:53:52:elinks:INFO: Disabling clock on downlink 2
11:53:52:elinks:INFO: Disabling clock on downlink 3
11:53:52:elinks:INFO: Disabling clock on downlink 4
11:53:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:53:52:elinks:INFO: Disabling clock on downlink 0
11:53:52:elinks:INFO: Disabling clock on downlink 1
11:53:52:elinks:INFO: Disabling clock on downlink 2
11:53:52:elinks:INFO: Disabling clock on downlink 3
11:53:52:elinks:INFO: Disabling clock on downlink 4
11:53:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:53:53:setup_element:INFO: Scanning clock phase
11:53:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:53:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:53:53:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:53:53:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
11:53:53:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
11:53:53:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
11:53:53:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:53:53:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:53:53:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:53:53:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:53:53:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
11:53:53:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
11:53:53:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
11:53:53:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
11:53:53:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
11:53:53:setup_element:INFO: Scanning data phases
11:53:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:53:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:53:58:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:53:58:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXXXXXXXXX___________
Data delay found: 2
11:53:58:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXXXXXXXXX______________
Data delay found: 39
11:53:58:setup_element:INFO: Eye window for uplink 2 : ___________XXXXXXXXX____________________
Data delay found: 35
11:53:58:setup_element:INFO: Eye window for uplink 3 : ___XXXXXXXXXXXXX_XX_____________________
Data delay found: 30
11:53:58:setup_element:INFO: Eye window for uplink 4 : _____XXXXXXXXXXX________________________
Data delay found: 30
11:53:58:setup_element:INFO: Eye window for uplink 5 : ____XXXXXXXXXXXXX_______________________
Data delay found: 30
11:53:58:setup_element:INFO: Eye window for uplink 6 : __X_XXXXXXXX____________________________
Data delay found: 26
11:53:58:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXX_____________________________X
Data delay found: 24
11:53:58:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXXXXX_
Data delay found: 14
11:53:58:setup_element:INFO: Eye window for uplink 9 : XX_______________________________XXXXXXX
Data delay found: 17
11:53:58:setup_element:INFO: Eye window for uplink 10: XXX______________________________XXXXXXX
Data delay found: 17
11:53:58:setup_element:INFO: Eye window for uplink 11: XXXXX_____________________________XXXXXX
Data delay found: 19
11:53:58:setup_element:INFO: Eye window for uplink 12: XX_______________________________XXXXXX_
Data delay found: 17
11:53:58:setup_element:INFO: Eye window for uplink 13: X_________________________________XXXXXX
Data delay found: 17
11:53:58:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXXXXX
Data delay found: 15
11:53:58:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXXXX_
Data delay found: 14
11:53:58:setup_element:INFO: Setting the data phase to 2 for uplink 0
11:53:58:setup_element:INFO: Setting the data phase to 39 for uplink 1
11:53:58:setup_element:INFO: Setting the data phase to 35 for uplink 2
11:53:58:setup_element:INFO: Setting the data phase to 30 for uplink 3
11:53:58:setup_element:INFO: Setting the data phase to 30 for uplink 4
11:53:58:setup_element:INFO: Setting the data phase to 30 for uplink 5
11:53:58:setup_element:INFO: Setting the data phase to 26 for uplink 6
11:53:58:setup_element:INFO: Setting the data phase to 24 for uplink 7
11:53:58:setup_element:INFO: Setting the data phase to 14 for uplink 8
11:53:58:setup_element:INFO: Setting the data phase to 17 for uplink 9
11:53:58:setup_element:INFO: Setting the data phase to 17 for uplink 10
11:53:58:setup_element:INFO: Setting the data phase to 19 for uplink 11
11:53:58:setup_element:INFO: Setting the data phase to 17 for uplink 12
11:53:58:setup_element:INFO: Setting the data phase to 17 for uplink 13
11:53:58:setup_element:INFO: Setting the data phase to 15 for uplink 14
11:53:58:setup_element:INFO: Setting the data phase to 14 for uplink 15
11:53:58:setup_element:INFO: Beginning SMX ASICs map scan
11:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:53:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:53:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:53:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:53:58:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:53:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:53:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:53:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:53:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:53:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:53:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:53:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:53:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:53:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:53:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:53:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:53:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:53:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:53:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:53:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:53:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:54:01:setup_element:INFO: Performing Elink synchronization
11:54:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:54:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:54:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:54:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:54:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:54:01:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:54:02:febtest:INFO: Init all SMX (CSA): 30
11:54:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:54:16:febtest:INFO: 01-00 | XA-000-09-004-042-014-024-11 | 15.6 | 1242.0
11:54:16:febtest:INFO: 08-01 | XA-000-09-004-042-003-008-11 | 47.3 | 1130.0
11:54:16:febtest:INFO: 03-02 | XA-000-09-004-042-012-007-15 | 37.7 | 1165.6
11:54:16:febtest:INFO: 10-03 | XA-000-09-004-042-015-007-01 | 18.7 | 1230.3
11:54:16:febtest:INFO: 05-04 | XA-000-09-004-042-009-007-04 | 40.9 | 1165.6
11:54:17:febtest:INFO: 12-05 | XA-000-09-004-042-015-006-01 | 47.3 | 1124.0
11:54:17:febtest:INFO: 07-06 | XA-000-09-004-042-006-007-00 | 31.4 | 1183.3
11:54:17:febtest:INFO: 14-07 | XA-000-09-004-042-012-006-15 | 28.2 | 1189.2
11:54:18:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:54:20:ST3_smx:INFO: chip: 1-0 18.745682 C 1253.730060 mV
11:54:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:20:ST3_smx:INFO: Electrons
11:54:20:ST3_smx:INFO: # loops 0
11:54:22:ST3_smx:INFO: # loops 1
11:54:24:ST3_smx:INFO: # loops 2
11:54:26:ST3_smx:INFO: Total # of broken channels: 0
11:54:26:ST3_smx:INFO: List of broken channels: []
11:54:26:ST3_smx:INFO: Total # of broken channels: 0
11:54:26:ST3_smx:INFO: List of broken channels: []
11:54:27:ST3_smx:INFO: chip: 8-1 47.250730 C 1141.874115 mV
11:54:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:27:ST3_smx:INFO: Electrons
11:54:27:ST3_smx:INFO: # loops 0
11:54:29:ST3_smx:INFO: # loops 1
11:54:30:ST3_smx:INFO: # loops 2
11:54:32:ST3_smx:INFO: Total # of broken channels: 0
11:54:32:ST3_smx:INFO: List of broken channels: []
11:54:32:ST3_smx:INFO: Total # of broken channels: 0
11:54:32:ST3_smx:INFO: List of broken channels: []
11:54:33:ST3_smx:INFO: chip: 3-2 37.726682 C 1177.390875 mV
11:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:34:ST3_smx:INFO: Electrons
11:54:34:ST3_smx:INFO: # loops 0
11:54:35:ST3_smx:INFO: # loops 1
11:54:37:ST3_smx:INFO: # loops 2
11:54:38:ST3_smx:INFO: Total # of broken channels: 0
11:54:38:ST3_smx:INFO: List of broken channels: []
11:54:38:ST3_smx:INFO: Total # of broken channels: 0
11:54:38:ST3_smx:INFO: List of broken channels: []
11:54:40:ST3_smx:INFO: chip: 10-3 18.745682 C 1242.040240 mV
11:54:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:40:ST3_smx:INFO: Electrons
11:54:40:ST3_smx:INFO: # loops 0
11:54:41:ST3_smx:INFO: # loops 1
11:54:43:ST3_smx:INFO: # loops 2
11:54:45:ST3_smx:INFO: Total # of broken channels: 0
11:54:45:ST3_smx:INFO: List of broken channels: []
11:54:45:ST3_smx:INFO: Total # of broken channels: 0
11:54:45:ST3_smx:INFO: List of broken channels: []
11:54:46:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV
11:54:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:46:ST3_smx:INFO: Electrons
11:54:46:ST3_smx:INFO: # loops 0
11:54:48:ST3_smx:INFO: # loops 1
11:54:50:ST3_smx:INFO: # loops 2
11:54:51:ST3_smx:INFO: Total # of broken channels: 0
11:54:51:ST3_smx:INFO: List of broken channels: []
11:54:51:ST3_smx:INFO: Total # of broken channels: 0
11:54:51:ST3_smx:INFO: List of broken channels: []
11:54:53:ST3_smx:INFO: chip: 12-5 47.250730 C 1135.937260 mV
11:54:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:53:ST3_smx:INFO: Electrons
11:54:53:ST3_smx:INFO: # loops 0
11:54:54:ST3_smx:INFO: # loops 1
11:54:56:ST3_smx:INFO: # loops 2
11:54:57:ST3_smx:INFO: Total # of broken channels: 0
11:54:57:ST3_smx:INFO: List of broken channels: []
11:54:57:ST3_smx:INFO: Total # of broken channels: 0
11:54:57:ST3_smx:INFO: List of broken channels: []
11:54:59:ST3_smx:INFO: chip: 7-6 34.556970 C 1195.082160 mV
11:54:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:54:59:ST3_smx:INFO: Electrons
11:54:59:ST3_smx:INFO: # loops 0
11:55:00:ST3_smx:INFO: # loops 1
11:55:02:ST3_smx:INFO: # loops 2
11:55:04:ST3_smx:INFO: Total # of broken channels: 0
11:55:04:ST3_smx:INFO: List of broken channels: []
11:55:04:ST3_smx:INFO: Total # of broken channels: 0
11:55:04:ST3_smx:INFO: List of broken channels: []
11:55:05:ST3_smx:INFO: chip: 14-7 28.225000 C 1200.969315 mV
11:55:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:05:ST3_smx:INFO: Electrons
11:55:05:ST3_smx:INFO: # loops 0
11:55:07:ST3_smx:INFO: # loops 1
11:55:08:ST3_smx:INFO: # loops 2
11:55:10:ST3_smx:INFO: Total # of broken channels: 0
11:55:10:ST3_smx:INFO: List of broken channels: []
11:55:10:ST3_smx:INFO: Total # of broken channels: 0
11:55:10:ST3_smx:INFO: List of broken channels: []
11:55:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:55:10:febtest:INFO: 01-00 | XA-000-09-004-042-014-024-11 | 18.7 | 1294.5
11:55:11:febtest:INFO: 08-01 | XA-000-09-004-042-003-008-11 | 47.3 | 1165.6
11:55:11:febtest:INFO: 03-02 | XA-000-09-004-042-012-007-15 | 37.7 | 1201.0
11:55:11:febtest:INFO: 10-03 | XA-000-09-004-042-015-007-01 | 21.9 | 1265.4
11:55:11:febtest:INFO: 05-04 | XA-000-09-004-042-009-007-04 | 44.1 | 1201.0
11:55:11:febtest:INFO: 12-05 | XA-000-09-004-042-015-006-01 | 47.3 | 1159.7
11:55:12:febtest:INFO: 07-06 | XA-000-09-004-042-006-007-00 | 34.6 | 1212.7
11:55:12:febtest:INFO: 14-07 | XA-000-09-004-042-012-006-15 | 31.4 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_31-11_53_50
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3279| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5170', '1.850', '2.5170', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9900', '1.850', '2.4880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5161', '0.000', '0.0000', '0.000', '0.0000']