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FEB_3281 03.11.25 10:45:28
Info
10:45:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:45:28:ST3_Shared:INFO: FEB-Microcable
10:45:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:45:28:febtest:INFO: Testing FEB with SN 3281
10:45:29:smx_tester:INFO: Scanning setup
10:45:29:elinks:INFO: Disabling clock on downlink 0
10:45:29:elinks:INFO: Disabling clock on downlink 1
10:45:29:elinks:INFO: Disabling clock on downlink 2
10:45:29:elinks:INFO: Disabling clock on downlink 3
10:45:29:elinks:INFO: Disabling clock on downlink 4
10:45:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:45:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:29:elinks:INFO: Disabling clock on downlink 0
10:45:29:elinks:INFO: Disabling clock on downlink 1
10:45:29:elinks:INFO: Disabling clock on downlink 2
10:45:29:elinks:INFO: Disabling clock on downlink 3
10:45:29:elinks:INFO: Disabling clock on downlink 4
10:45:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:45:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:45:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:29:elinks:INFO: Disabling clock on downlink 0
10:45:29:elinks:INFO: Disabling clock on downlink 1
10:45:29:elinks:INFO: Disabling clock on downlink 2
10:45:29:elinks:INFO: Disabling clock on downlink 3
10:45:29:elinks:INFO: Disabling clock on downlink 4
10:45:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:30:elinks:INFO: Disabling clock on downlink 0
10:45:30:elinks:INFO: Disabling clock on downlink 1
10:45:30:elinks:INFO: Disabling clock on downlink 2
10:45:30:elinks:INFO: Disabling clock on downlink 3
10:45:30:elinks:INFO: Disabling clock on downlink 4
10:45:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:45:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:30:elinks:INFO: Disabling clock on downlink 0
10:45:30:elinks:INFO: Disabling clock on downlink 1
10:45:30:elinks:INFO: Disabling clock on downlink 2
10:45:30:elinks:INFO: Disabling clock on downlink 3
10:45:30:elinks:INFO: Disabling clock on downlink 4
10:45:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:45:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:30:setup_element:INFO: Scanning clock phase
10:45:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:45:30:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:45:30:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
10:45:30:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
10:45:30:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:45:30:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:45:30:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:45:30:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:45:30:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:45:30:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:45:30:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 1
10:45:30:setup_element:INFO: Scanning data phases
10:45:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:45:35:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:45:35:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXXXX_
Data delay found: 15
10:45:35:setup_element:INFO: Eye window for uplink 9 : XX________________________________XXXXXX
Data delay found: 17
10:45:35:setup_element:INFO: Eye window for uplink 10: XXX________________________________XXXXX
Data delay found: 18
10:45:35:setup_element:INFO: Eye window for uplink 11: XXXXX_______________________________XXXX
Data delay found: 20
10:45:35:setup_element:INFO: Eye window for uplink 12: XX________________________________XXXXXX
Data delay found: 17
10:45:35:setup_element:INFO: Eye window for uplink 13: XX________________________________XXXXXX
Data delay found: 17
10:45:35:setup_element:INFO: Eye window for uplink 14: XXX_______________________________XXXXXX
Data delay found: 18
10:45:35:setup_element:INFO: Eye window for uplink 15: XXX_______________________________XXXXXX
Data delay found: 18
10:45:35:setup_element:INFO: Setting the data phase to 15 for uplink 8
10:45:35:setup_element:INFO: Setting the data phase to 17 for uplink 9
10:45:35:setup_element:INFO: Setting the data phase to 18 for uplink 10
10:45:35:setup_element:INFO: Setting the data phase to 20 for uplink 11
10:45:35:setup_element:INFO: Setting the data phase to 17 for uplink 12
10:45:35:setup_element:INFO: Setting the data phase to 17 for uplink 13
10:45:35:setup_element:INFO: Setting the data phase to 18 for uplink 14
10:45:35:setup_element:INFO: Setting the data phase to 18 for uplink 15
10:45:35:setup_element:INFO: Beginning SMX ASICs map scan
10:45:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:45:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:45:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:45:35:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:45:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:45:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:45:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:45:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:45:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:45:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:45:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:45:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:45:38:setup_element:INFO: Performing Elink synchronization
10:45:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:45:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:45:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:45:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:45:38:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:45:38:febtest:INFO: Init all SMX (CSA): 30
10:45:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:45:46:febtest:INFO: 08-01 | XA-000-09-004-036-013-022-08 | 31.4 | 1171.5
10:45:46:febtest:INFO: 10-03 | XA-000-09-004-036-013-023-08 | 34.6 | 1177.4
10:45:46:febtest:INFO: 12-05 | XA-000-09-004-036-004-021-09 | 21.9 | 1218.6
10:45:46:febtest:INFO: 14-07 | XA-000-09-004-036-010-022-00 | 25.1 | 1189.2
10:45:47:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:45:49:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV
10:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:45:49:ST3_smx:INFO: Electrons
10:45:49:ST3_smx:INFO: # loops 0
10:45:51:ST3_smx:INFO: # loops 1
10:45:52:ST3_smx:INFO: # loops 2
10:45:54:ST3_smx:INFO: Total # of broken channels: 0
10:45:54:ST3_smx:INFO: List of broken channels: []
10:45:54:ST3_smx:INFO: Total # of broken channels: 0
10:45:54:ST3_smx:INFO: List of broken channels: []
10:45:56:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV
10:45:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:45:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:45:56:ST3_smx:INFO: Electrons
10:45:56:ST3_smx:INFO: # loops 0
10:45:57:ST3_smx:INFO: # loops 1
10:45:59:ST3_smx:INFO: # loops 2
10:46:01:ST3_smx:INFO: Total # of broken channels: 0
10:46:01:ST3_smx:INFO: List of broken channels: []
10:46:01:ST3_smx:INFO: Total # of broken channels: 0
10:46:01:ST3_smx:INFO: List of broken channels: []
10:46:02:ST3_smx:INFO: chip: 12-5 21.902970 C 1230.330540 mV
10:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:02:ST3_smx:INFO: Electrons
10:46:02:ST3_smx:INFO: # loops 0
10:46:04:ST3_smx:INFO: # loops 1
10:46:05:ST3_smx:INFO: # loops 2
10:46:07:ST3_smx:INFO: Total # of broken channels: 0
10:46:07:ST3_smx:INFO: List of broken channels: []
10:46:07:ST3_smx:INFO: Total # of broken channels: 0
10:46:07:ST3_smx:INFO: List of broken channels: []
10:46:09:ST3_smx:INFO: chip: 14-7 28.225000 C 1200.969315 mV
10:46:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:09:ST3_smx:INFO: Electrons
10:46:09:ST3_smx:INFO: # loops 0
10:46:11:ST3_smx:INFO: # loops 1
10:46:13:ST3_smx:INFO: # loops 2
10:46:14:ST3_smx:INFO: Total # of broken channels: 0
10:46:14:ST3_smx:INFO: List of broken channels: []
10:46:14:ST3_smx:INFO: Total # of broken channels: 0
10:46:14:ST3_smx:INFO: List of broken channels: []
10:46:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:46:15:febtest:INFO: 08-01 | XA-000-09-004-036-013-022-08 | 34.6 | 1206.9
10:46:15:febtest:INFO: 10-03 | XA-000-09-004-036-013-023-08 | 34.6 | 1212.7
10:46:15:febtest:INFO: 12-05 | XA-000-09-004-036-004-021-09 | 21.9 | 1253.7
10:46:15:febtest:INFO: 14-07 | XA-000-09-004-036-010-022-00 | 28.2 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_03-10_45_28
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3281| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7316', '1.850', '1.2090', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9659', '1.850', '1.0660', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9907', '1.850', '0.2614', '0.000', '0.0000', '0.000', '0.0000']