12:52:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:52:42:ST3_Shared:INFO:	                         FEB-Sensor                         
12:52:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:52:58:ST3_ModuleSelector:INFO:	L2DL400113 M2DL4T2001132A2 62 C

12:52:58:ST3_ModuleSelector:INFO:	17313

12:52:58:febtest:INFO:	Testing FEB with SN 3282
12:52:59:smx_tester:INFO:	Scanning setup
12:52:59:elinks:INFO:	Disabling clock on downlink 0
12:52:59:elinks:INFO:	Disabling clock on downlink 1
12:52:59:elinks:INFO:	Disabling clock on downlink 2
12:52:59:elinks:INFO:	Disabling clock on downlink 3
12:52:59:elinks:INFO:	Disabling clock on downlink 4
12:52:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:52:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:52:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:52:59:elinks:INFO:	Disabling clock on downlink 0
12:52:59:elinks:INFO:	Disabling clock on downlink 1
12:52:59:elinks:INFO:	Disabling clock on downlink 2
12:52:59:elinks:INFO:	Disabling clock on downlink 3
12:52:59:elinks:INFO:	Disabling clock on downlink 4
12:52:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:52:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
12:52:59:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
12:52:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:52:59:elinks:INFO:	Disabling clock on downlink 0
12:52:59:elinks:INFO:	Disabling clock on downlink 1
12:52:59:elinks:INFO:	Disabling clock on downlink 2
12:52:59:elinks:INFO:	Disabling clock on downlink 3
12:52:59:elinks:INFO:	Disabling clock on downlink 4
12:52:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:52:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:00:elinks:INFO:	Disabling clock on downlink 0
12:53:00:elinks:INFO:	Disabling clock on downlink 1
12:53:00:elinks:INFO:	Disabling clock on downlink 2
12:53:00:elinks:INFO:	Disabling clock on downlink 3
12:53:00:elinks:INFO:	Disabling clock on downlink 4
12:53:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:53:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:00:elinks:INFO:	Disabling clock on downlink 0
12:53:00:elinks:INFO:	Disabling clock on downlink 1
12:53:00:elinks:INFO:	Disabling clock on downlink 2
12:53:00:elinks:INFO:	Disabling clock on downlink 3
12:53:00:elinks:INFO:	Disabling clock on downlink 4
12:53:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:53:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:00:setup_element:INFO:	Scanning clock phase
12:53:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:53:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:53:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
12:53:00:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
12:53:00:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
12:53:00:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
12:53:00:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
12:53:00:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:53:00:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:53:00:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:53:00:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
12:53:00:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
12:53:00:setup_element:INFO:	Setting the clock phase to 25 for group 0, downlink 1
12:53:00:setup_element:INFO:	Scanning data phases
12:53:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:53:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:53:05:setup_element:INFO:	Data phase scan results for group 0, downlink 1
12:53:05:setup_element:INFO:	Eye window for uplink 0 : _________________XXXXXXXXXXX____________
Data delay found: 2
12:53:05:setup_element:INFO:	Eye window for uplink 1 : _____________XXXXXXXXXXXX_______________
Data delay found: 38
12:53:05:setup_element:INFO:	Eye window for uplink 2 : __________X_XXXXXX______________________
Data delay found: 33
12:53:05:setup_element:INFO:	Eye window for uplink 3 : _________X_XXXXXX_______________________
Data delay found: 32
12:53:05:setup_element:INFO:	Eye window for uplink 4 : ________XXXXXXXX________________________
Data delay found: 31
12:53:05:setup_element:INFO:	Eye window for uplink 5 : _______XXXXXXXX_________________________
Data delay found: 30
12:53:05:setup_element:INFO:	Eye window for uplink 6 : ____XXXXXXXX____________________________
Data delay found: 27
12:53:05:setup_element:INFO:	Eye window for uplink 7 : __XXXXXXXXXX____________________________
Data delay found: 26
12:53:06:setup_element:INFO:	Eye window for uplink 8 : ______________________________XXXXXXXX__
Data delay found: 13
12:53:06:setup_element:INFO:	Eye window for uplink 9 : X_________________________________XXXXXX
Data delay found: 17
12:53:06:setup_element:INFO:	Eye window for uplink 10: XXX________________________________XXXXX
Data delay found: 18
12:53:06:setup_element:INFO:	Eye window for uplink 11: XXXXX_______________________________XXXX
Data delay found: 20
12:53:06:setup_element:INFO:	Eye window for uplink 12: XXX______________________________XXXXXXX
Data delay found: 17
12:53:06:setup_element:INFO:	Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
12:53:06:setup_element:INFO:	Eye window for uplink 14: X________________________________XXXXXXX
Data delay found: 16
12:53:06:setup_element:INFO:	Eye window for uplink 15: X________________________________XXXXXXX
Data delay found: 16
12:53:06:setup_element:INFO:	Setting the data phase to 2 for uplink 0
12:53:06:setup_element:INFO:	Setting the data phase to 38 for uplink 1
12:53:06:setup_element:INFO:	Setting the data phase to 33 for uplink 2
12:53:06:setup_element:INFO:	Setting the data phase to 32 for uplink 3
12:53:06:setup_element:INFO:	Setting the data phase to 31 for uplink 4
12:53:06:setup_element:INFO:	Setting the data phase to 30 for uplink 5
12:53:06:setup_element:INFO:	Setting the data phase to 27 for uplink 6
12:53:06:setup_element:INFO:	Setting the data phase to 26 for uplink 7
12:53:06:setup_element:INFO:	Setting the data phase to 13 for uplink 8
12:53:06:setup_element:INFO:	Setting the data phase to 17 for uplink 9
12:53:06:setup_element:INFO:	Setting the data phase to 18 for uplink 10
12:53:06:setup_element:INFO:	Setting the data phase to 20 for uplink 11
12:53:06:setup_element:INFO:	Setting the data phase to 17 for uplink 12
12:53:06:setup_element:INFO:	Setting the data phase to 18 for uplink 13
12:53:06:setup_element:INFO:	Setting the data phase to 16 for uplink 14
12:53:06:setup_element:INFO:	Setting the data phase to 16 for uplink 15
12:53:06:setup_element:INFO:	Beginning SMX ASICs map scan
12:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:53:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:53:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:53:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:53:06:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:53:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:53:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:53:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:53:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:53:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:53:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:53:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:53:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:53:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:53:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:53:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:53:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:53:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:53:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:53:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:53:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:53:08:setup_element:INFO:	Performing Elink synchronization
12:53:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:53:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:53:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:53:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:53:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
12:53:08:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:53:09:febtest:INFO:	Init all SMX (CSA): 30
12:53:27:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:53:28:febtest:INFO:	01-00 | XA-000-09-004-036-013-021-08 |  21.9 | 1218.6
12:53:28:febtest:INFO:	08-01 | XA-000-09-004-036-004-019-09 |  44.1 | 1147.8
12:53:28:febtest:INFO:	03-02 | XA-000-09-004-036-010-020-00 |  44.1 | 1147.8
12:53:28:febtest:INFO:	10-03 | XA-000-09-004-036-016-019-03 |  34.6 | 1189.2
12:53:29:febtest:INFO:	05-04 | XA-000-09-004-036-007-020-07 |  44.1 | 1153.7
12:53:29:febtest:INFO:	12-05 | XA-000-09-004-036-013-019-08 |  34.6 | 1189.2
12:53:29:febtest:INFO:	07-06 | XA-000-09-004-036-004-020-09 |  40.9 | 1159.7
12:53:29:febtest:INFO:	14-07 | XA-000-09-004-036-010-019-00 |  37.7 | 1171.5
12:53:30:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:53:32:ST3_smx:INFO:	chip: 1-0 	 21.902970 C 	 1236.187875 mV
12:53:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:32:ST3_smx:INFO:		Electrons
12:53:32:ST3_smx:INFO:	# loops 0
12:53:34:ST3_smx:INFO:	# loops 1
12:53:36:ST3_smx:INFO:	# loops 2
12:53:38:ST3_smx:INFO:	Total # of broken channels: 0
12:53:38:ST3_smx:INFO:	List of broken channels: []
12:53:38:ST3_smx:INFO:	Total # of broken channels: 0
12:53:38:ST3_smx:INFO:	List of broken channels: []
12:53:40:ST3_smx:INFO:	chip: 8-1 	 44.073563 C 	 1159.654860 mV
12:53:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:40:ST3_smx:INFO:		Electrons
12:53:40:ST3_smx:INFO:	# loops 0
12:53:42:ST3_smx:INFO:	# loops 1
12:53:44:ST3_smx:INFO:	# loops 2
12:53:46:ST3_smx:INFO:	Total # of broken channels: 0
12:53:46:ST3_smx:INFO:	List of broken channels: []
12:53:46:ST3_smx:INFO:	Total # of broken channels: 0
12:53:46:ST3_smx:INFO:	List of broken channels: []
12:53:48:ST3_smx:INFO:	chip: 3-2 	 47.250730 C 	 1159.654860 mV
12:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:48:ST3_smx:INFO:		Electrons
12:53:48:ST3_smx:INFO:	# loops 0
12:53:50:ST3_smx:INFO:	# loops 1
12:53:51:ST3_smx:INFO:	# loops 2
12:53:53:ST3_smx:INFO:	Total # of broken channels: 0
12:53:53:ST3_smx:INFO:	List of broken channels: []
12:53:53:ST3_smx:INFO:	Total # of broken channels: 0
12:53:53:ST3_smx:INFO:	List of broken channels: []
12:53:55:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1206.851500 mV
12:53:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:55:ST3_smx:INFO:		Electrons
12:53:55:ST3_smx:INFO:	# loops 0
12:53:57:ST3_smx:INFO:	# loops 1
12:53:59:ST3_smx:INFO:	# loops 2
12:54:01:ST3_smx:INFO:	Total # of broken channels: 0
12:54:01:ST3_smx:INFO:	List of broken channels: []
12:54:01:ST3_smx:INFO:	Total # of broken channels: 0
12:54:01:ST3_smx:INFO:	List of broken channels: []
12:54:02:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1165.571835 mV
12:54:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:02:ST3_smx:INFO:		Electrons
12:54:02:ST3_smx:INFO:	# loops 0
12:54:04:ST3_smx:INFO:	# loops 1
12:54:06:ST3_smx:INFO:	# loops 2
12:54:08:ST3_smx:INFO:	Total # of broken channels: 0
12:54:08:ST3_smx:INFO:	List of broken channels: []
12:54:08:ST3_smx:INFO:	Total # of broken channels: 0
12:54:08:ST3_smx:INFO:	List of broken channels: []
12:54:10:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1206.851500 mV
12:54:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:10:ST3_smx:INFO:		Electrons
12:54:10:ST3_smx:INFO:	# loops 0
12:54:12:ST3_smx:INFO:	# loops 1
12:54:14:ST3_smx:INFO:	# loops 2
12:54:16:ST3_smx:INFO:	Total # of broken channels: 0
12:54:16:ST3_smx:INFO:	List of broken channels: []
12:54:16:ST3_smx:INFO:	Total # of broken channels: 0
12:54:16:ST3_smx:INFO:	List of broken channels: []
12:54:17:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1171.483840 mV
12:54:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:17:ST3_smx:INFO:		Electrons
12:54:17:ST3_smx:INFO:	# loops 0
12:54:19:ST3_smx:INFO:	# loops 1
12:54:21:ST3_smx:INFO:	# loops 2
12:54:23:ST3_smx:INFO:	Total # of broken channels: 0
12:54:23:ST3_smx:INFO:	List of broken channels: []
12:54:23:ST3_smx:INFO:	Total # of broken channels: 0
12:54:23:ST3_smx:INFO:	List of broken channels: []
12:54:25:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1183.292940 mV
12:54:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:54:25:ST3_smx:INFO:		Electrons
12:54:25:ST3_smx:INFO:	# loops 0
12:54:27:ST3_smx:INFO:	# loops 1
12:54:29:ST3_smx:INFO:	# loops 2
12:54:31:ST3_smx:INFO:	Total # of broken channels: 0
12:54:31:ST3_smx:INFO:	List of broken channels: []
12:54:31:ST3_smx:INFO:	Total # of broken channels: 0
12:54:31:ST3_smx:INFO:	List of broken channels: []
12:54:31:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:54:31:febtest:INFO:	01-00 | XA-000-09-004-036-013-021-08 |  25.1 | 1253.7
12:54:32:febtest:INFO:	08-01 | XA-000-09-004-036-004-019-09 |  47.3 | 1183.3
12:54:32:febtest:INFO:	03-02 | XA-000-09-004-036-010-020-00 |  47.3 | 1183.3
12:54:32:febtest:INFO:	10-03 | XA-000-09-004-036-016-019-03 |  37.7 | 1230.3
12:54:32:febtest:INFO:	05-04 | XA-000-09-004-036-007-020-07 |  47.3 | 1189.2
12:54:33:febtest:INFO:	12-05 | XA-000-09-004-036-013-019-08 |  37.7 | 1224.5
12:54:33:febtest:INFO:	07-06 | XA-000-09-004-036-004-020-09 |  44.1 | 1195.1
12:54:33:febtest:INFO:	14-07 | XA-000-09-004-036-010-019-00 |  40.9 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_11_06-12_52_42
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	17313

MODULE_NAME:	L2DL400113 M2DL4T2001132A2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L2DL400113
MODULE_MODULE:	M2DL4T2001132A2
MODULE_SIZE:	62
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4780', '1.850', '2.0560', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '2.3450', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9740', '1.850', '0.5159', '0.000', '0.0000', '0.000', '0.0000']