FEB_3282 05.11.25 09:28:44
Info
09:28:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:44:ST3_Shared:INFO: FEB-Microcable
09:28:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:44:febtest:INFO: Testing FEB with SN 3282
09:28:46:smx_tester:INFO: Scanning setup
09:28:46:elinks:INFO: Disabling clock on downlink 0
09:28:46:elinks:INFO: Disabling clock on downlink 1
09:28:46:elinks:INFO: Disabling clock on downlink 2
09:28:46:elinks:INFO: Disabling clock on downlink 3
09:28:46:elinks:INFO: Disabling clock on downlink 4
09:28:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:28:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:28:46:elinks:INFO: Disabling clock on downlink 0
09:28:46:elinks:INFO: Disabling clock on downlink 1
09:28:46:elinks:INFO: Disabling clock on downlink 2
09:28:46:elinks:INFO: Disabling clock on downlink 3
09:28:46:elinks:INFO: Disabling clock on downlink 4
09:28:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:28:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:28:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:28:46:elinks:INFO: Disabling clock on downlink 0
09:28:46:elinks:INFO: Disabling clock on downlink 1
09:28:46:elinks:INFO: Disabling clock on downlink 2
09:28:46:elinks:INFO: Disabling clock on downlink 3
09:28:46:elinks:INFO: Disabling clock on downlink 4
09:28:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:28:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:28:46:elinks:INFO: Disabling clock on downlink 0
09:28:46:elinks:INFO: Disabling clock on downlink 1
09:28:46:elinks:INFO: Disabling clock on downlink 2
09:28:46:elinks:INFO: Disabling clock on downlink 3
09:28:46:elinks:INFO: Disabling clock on downlink 4
09:28:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:28:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:28:46:elinks:INFO: Disabling clock on downlink 0
09:28:46:elinks:INFO: Disabling clock on downlink 1
09:28:46:elinks:INFO: Disabling clock on downlink 2
09:28:46:elinks:INFO: Disabling clock on downlink 3
09:28:46:elinks:INFO: Disabling clock on downlink 4
09:28:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:28:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:28:46:setup_element:INFO: Scanning clock phase
09:28:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:28:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:28:46:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________XXXXX___________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________XXXXX___________
Clock Delay: 26
09:28:47:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
09:28:47:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:28:47:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:28:47:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
09:28:47:setup_element:INFO: Scanning data phases
09:28:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:28:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:28:52:setup_element:INFO: Eye window for uplink 0 : _________________XXXXXXXXXXX____________
Data delay found: 2
09:28:52:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXXXXXXXX_______________
Data delay found: 38
09:28:52:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXXX_____________________
Data delay found: 35
09:28:52:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
09:28:52:setup_element:INFO: Eye window for uplink 4 : _______XXXXXXXXXX_______________________
Data delay found: 31
09:28:52:setup_element:INFO: Eye window for uplink 5 : ________XXXXXXX_________________________
Data delay found: 31
09:28:52:setup_element:INFO: Eye window for uplink 6 : __XXXXXXXXXX____________________________
Data delay found: 26
09:28:52:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXX_______________________________
Data delay found: 24
09:28:52:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXXXX__
Data delay found: 14
09:28:52:setup_element:INFO: Eye window for uplink 9 : X_________________________________XXXXXX
Data delay found: 17
09:28:52:setup_element:INFO: Eye window for uplink 10: XXX________________________________XXXXX
Data delay found: 18
09:28:52:setup_element:INFO: Eye window for uplink 11: XXXXX________________________________XXX
Data delay found: 20
09:28:52:setup_element:INFO: Eye window for uplink 12: XX_______________________________XXXXXXX
Data delay found: 17
09:28:52:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
09:28:52:setup_element:INFO: Eye window for uplink 14: X________________________________XXXXXXX
Data delay found: 16
09:28:52:setup_element:INFO: Eye window for uplink 15: X_X______________________________XXXXXXX
Data delay found: 17
09:28:52:setup_element:INFO: Setting the data phase to 2 for uplink 0
09:28:52:setup_element:INFO: Setting the data phase to 38 for uplink 1
09:28:52:setup_element:INFO: Setting the data phase to 35 for uplink 2
09:28:52:setup_element:INFO: Setting the data phase to 34 for uplink 3
09:28:52:setup_element:INFO: Setting the data phase to 31 for uplink 4
09:28:52:setup_element:INFO: Setting the data phase to 31 for uplink 5
09:28:52:setup_element:INFO: Setting the data phase to 26 for uplink 6
09:28:52:setup_element:INFO: Setting the data phase to 24 for uplink 7
09:28:52:setup_element:INFO: Setting the data phase to 14 for uplink 8
09:28:52:setup_element:INFO: Setting the data phase to 17 for uplink 9
09:28:52:setup_element:INFO: Setting the data phase to 18 for uplink 10
09:28:52:setup_element:INFO: Setting the data phase to 20 for uplink 11
09:28:52:setup_element:INFO: Setting the data phase to 17 for uplink 12
09:28:52:setup_element:INFO: Setting the data phase to 18 for uplink 13
09:28:52:setup_element:INFO: Setting the data phase to 16 for uplink 14
09:28:52:setup_element:INFO: Setting the data phase to 17 for uplink 15
09:28:52:setup_element:INFO: Beginning SMX ASICs map scan
09:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:28:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:28:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:28:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:28:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:28:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:28:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:28:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:28:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:28:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:28:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:28:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:28:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:28:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:28:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:28:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:28:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:28:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:28:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:28:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:28:54:setup_element:INFO: Performing Elink synchronization
09:28:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:28:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:28:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:28:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:28:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:28:55:febtest:INFO: Init all SMX (CSA): 30
09:29:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:29:09:febtest:INFO: 01-00 | XA-000-09-004-036-013-021-08 | 18.7 | 1218.6
09:29:09:febtest:INFO: 08-01 | XA-000-09-004-036-004-019-09 | 37.7 | 1147.8
09:29:10:febtest:INFO: 03-02 | XA-000-09-004-036-010-020-00 | 40.9 | 1147.8
09:29:10:febtest:INFO: 10-03 | XA-000-09-004-036-016-019-03 | 28.2 | 1189.2
09:29:10:febtest:INFO: 05-04 | XA-000-09-004-036-007-020-07 | 40.9 | 1153.7
09:29:10:febtest:INFO: 12-05 | XA-000-09-004-036-013-019-08 | 28.2 | 1189.2
09:29:11:febtest:INFO: 07-06 | XA-000-09-004-036-004-020-09 | 34.6 | 1159.7
09:29:11:febtest:INFO: 14-07 | XA-000-09-004-036-010-019-00 | 31.4 | 1171.5
09:29:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:29:14:ST3_smx:INFO: chip: 1-0 18.745682 C 1230.330540 mV
09:29:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:14:ST3_smx:INFO: Electrons
09:29:14:ST3_smx:INFO: # loops 0
09:29:15:ST3_smx:INFO: # loops 1
09:29:17:ST3_smx:INFO: # loops 2
09:29:18:ST3_smx:INFO: Total # of broken channels: 0
09:29:18:ST3_smx:INFO: List of broken channels: []
09:29:18:ST3_smx:INFO: Total # of broken channels: 0
09:29:18:ST3_smx:INFO: List of broken channels: []
09:29:20:ST3_smx:INFO: chip: 8-1 37.726682 C 1159.654860 mV
09:29:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:20:ST3_smx:INFO: Electrons
09:29:20:ST3_smx:INFO: # loops 0
09:29:22:ST3_smx:INFO: # loops 1
09:29:24:ST3_smx:INFO: # loops 2
09:29:25:ST3_smx:INFO: Total # of broken channels: 0
09:29:25:ST3_smx:INFO: List of broken channels: []
09:29:25:ST3_smx:INFO: Total # of broken channels: 0
09:29:25:ST3_smx:INFO: List of broken channels: []
09:29:27:ST3_smx:INFO: chip: 3-2 40.898880 C 1165.571835 mV
09:29:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:27:ST3_smx:INFO: Electrons
09:29:27:ST3_smx:INFO: # loops 0
09:29:28:ST3_smx:INFO: # loops 1
09:29:30:ST3_smx:INFO: # loops 2
09:29:31:ST3_smx:INFO: Total # of broken channels: 0
09:29:31:ST3_smx:INFO: List of broken channels: []
09:29:31:ST3_smx:INFO: Total # of broken channels: 0
09:29:31:ST3_smx:INFO: List of broken channels: []
09:29:33:ST3_smx:INFO: chip: 10-3 28.225000 C 1206.851500 mV
09:29:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:33:ST3_smx:INFO: Electrons
09:29:33:ST3_smx:INFO: # loops 0
09:29:35:ST3_smx:INFO: # loops 1
09:29:36:ST3_smx:INFO: # loops 2
09:29:38:ST3_smx:INFO: Total # of broken channels: 0
09:29:38:ST3_smx:INFO: List of broken channels: []
09:29:38:ST3_smx:INFO: Total # of broken channels: 0
09:29:38:ST3_smx:INFO: List of broken channels: []
09:29:39:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
09:29:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:39:ST3_smx:INFO: Electrons
09:29:39:ST3_smx:INFO: # loops 0
09:29:41:ST3_smx:INFO: # loops 1
09:29:43:ST3_smx:INFO: # loops 2
09:29:45:ST3_smx:INFO: Total # of broken channels: 0
09:29:45:ST3_smx:INFO: List of broken channels: []
09:29:45:ST3_smx:INFO: Total # of broken channels: 0
09:29:45:ST3_smx:INFO: List of broken channels: []
09:29:46:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
09:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:46:ST3_smx:INFO: Electrons
09:29:46:ST3_smx:INFO: # loops 0
09:29:48:ST3_smx:INFO: # loops 1
09:29:50:ST3_smx:INFO: # loops 2
09:29:51:ST3_smx:INFO: Total # of broken channels: 0
09:29:51:ST3_smx:INFO: List of broken channels: []
09:29:51:ST3_smx:INFO: Total # of broken channels: 0
09:29:51:ST3_smx:INFO: List of broken channels: []
09:29:53:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
09:29:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:53:ST3_smx:INFO: Electrons
09:29:53:ST3_smx:INFO: # loops 0
09:29:54:ST3_smx:INFO: # loops 1
09:29:56:ST3_smx:INFO: # loops 2
09:29:57:ST3_smx:INFO: Total # of broken channels: 0
09:29:57:ST3_smx:INFO: List of broken channels: []
09:29:57:ST3_smx:INFO: Total # of broken channels: 0
09:29:57:ST3_smx:INFO: List of broken channels: []
09:29:59:ST3_smx:INFO: chip: 14-7 34.556970 C 1183.292940 mV
09:29:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:59:ST3_smx:INFO: Electrons
09:29:59:ST3_smx:INFO: # loops 0
09:30:01:ST3_smx:INFO: # loops 1
09:30:02:ST3_smx:INFO: # loops 2
09:30:04:ST3_smx:INFO: Total # of broken channels: 0
09:30:04:ST3_smx:INFO: List of broken channels: []
09:30:04:ST3_smx:INFO: Total # of broken channels: 0
09:30:04:ST3_smx:INFO: List of broken channels: []
09:30:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:30:04:febtest:INFO: 01-00 | XA-000-09-004-036-013-021-08 | 21.9 | 1253.7
09:30:05:febtest:INFO: 08-01 | XA-000-09-004-036-004-019-09 | 40.9 | 1183.3
09:30:05:febtest:INFO: 03-02 | XA-000-09-004-036-010-020-00 | 40.9 | 1183.3
09:30:05:febtest:INFO: 10-03 | XA-000-09-004-036-016-019-03 | 31.4 | 1230.3
09:30:05:febtest:INFO: 05-04 | XA-000-09-004-036-007-020-07 | 40.9 | 1189.2
09:30:05:febtest:INFO: 12-05 | XA-000-09-004-036-013-019-08 | 31.4 | 1224.5
09:30:06:febtest:INFO: 07-06 | XA-000-09-004-036-004-020-09 | 40.9 | 1195.1
09:30:06:febtest:INFO: 14-07 | XA-000-09-004-036-010-019-00 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_05-09_28_44
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '1.4580', '1.850', '2.0450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9870', '1.850', '2.2940', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9680', '1.850', '0.5140', '0.000', '0.0000', '0.000', '0.0000']