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FEB_3283 05.11.25 14:06:24
Info
14:06:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:06:24:ST3_Shared:INFO: FEB-Microcable
14:06:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:06:24:febtest:INFO: Testing FEB with SN 3283
14:06:25:smx_tester:INFO: Scanning setup
14:06:25:elinks:INFO: Disabling clock on downlink 0
14:06:25:elinks:INFO: Disabling clock on downlink 1
14:06:25:elinks:INFO: Disabling clock on downlink 2
14:06:25:elinks:INFO: Disabling clock on downlink 3
14:06:25:elinks:INFO: Disabling clock on downlink 4
14:06:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:06:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:06:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:06:25:elinks:INFO: Disabling clock on downlink 0
14:06:25:elinks:INFO: Disabling clock on downlink 1
14:06:25:elinks:INFO: Disabling clock on downlink 2
14:06:25:elinks:INFO: Disabling clock on downlink 3
14:06:25:elinks:INFO: Disabling clock on downlink 4
14:06:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:06:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:06:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:06:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:06:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:06:26:elinks:INFO: Disabling clock on downlink 0
14:06:26:elinks:INFO: Disabling clock on downlink 1
14:06:26:elinks:INFO: Disabling clock on downlink 2
14:06:26:elinks:INFO: Disabling clock on downlink 3
14:06:26:elinks:INFO: Disabling clock on downlink 4
14:06:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:06:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:06:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:06:26:elinks:INFO: Disabling clock on downlink 0
14:06:26:elinks:INFO: Disabling clock on downlink 1
14:06:26:elinks:INFO: Disabling clock on downlink 2
14:06:26:elinks:INFO: Disabling clock on downlink 3
14:06:26:elinks:INFO: Disabling clock on downlink 4
14:06:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:06:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:06:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:06:26:elinks:INFO: Disabling clock on downlink 0
14:06:26:elinks:INFO: Disabling clock on downlink 1
14:06:26:elinks:INFO: Disabling clock on downlink 2
14:06:26:elinks:INFO: Disabling clock on downlink 3
14:06:26:elinks:INFO: Disabling clock on downlink 4
14:06:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:06:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:06:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:06:26:setup_element:INFO: Scanning clock phase
14:06:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:06:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:06:26:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:06:26:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
14:06:26:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
14:06:26:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:06:26:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:06:26:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:06:26:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:06:26:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________XXXXXXXXXX_________
Clock Delay: 25
14:06:26:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________XXXXXXXXXX_________
Clock Delay: 25
14:06:26:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:06:26:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:06:26:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXX____________
Clock Delay: 24
14:06:26:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXX____________
Clock Delay: 24
14:06:26:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
14:06:26:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
14:06:26:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
14:06:26:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
14:06:26:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
14:06:26:setup_element:INFO: Scanning data phases
14:06:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:06:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:06:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:06:31:setup_element:INFO: Eye window for uplink 0 : ___________________XXXXXXXXX_X__________
Data delay found: 4
14:06:31:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXXXXXXX______________
Data delay found: 0
14:06:31:setup_element:INFO: Eye window for uplink 2 : __________XXXXXXXX______________________
Data delay found: 33
14:06:31:setup_element:INFO: Eye window for uplink 3 : ________XXXXXXXXX_______________________
Data delay found: 32
14:06:31:setup_element:INFO: Eye window for uplink 4 : ________XXXXXXX_________________________
Data delay found: 31
14:06:31:setup_element:INFO: Eye window for uplink 5 : _______XXXXXXX__________________________
Data delay found: 30
14:06:31:setup_element:INFO: Eye window for uplink 6 : _____XXXXXX_____________________________
Data delay found: 27
14:06:31:setup_element:INFO: Eye window for uplink 7 : __XXXXXXXXXX____________________________
Data delay found: 26
14:06:31:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXXX___
Data delay found: 13
14:06:31:setup_element:INFO: Eye window for uplink 9 : X_______________________________XXXXXXXX
Data delay found: 16
14:06:31:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXXXX_
Data delay found: 14
14:06:31:setup_element:INFO: Eye window for uplink 11: X________________________________XXXXXXX
Data delay found: 16
14:06:31:setup_element:INFO: Eye window for uplink 12: __________________________________XXXXX_
Data delay found: 16
14:06:32:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
14:06:32:setup_element:INFO: Eye window for uplink 14: X_________________________________XXXXXX
Data delay found: 17
14:06:32:setup_element:INFO: Eye window for uplink 15: XXX______________________________XXXXXXX
Data delay found: 17
14:06:32:setup_element:INFO: Setting the data phase to 4 for uplink 0
14:06:32:setup_element:INFO: Setting the data phase to 0 for uplink 1
14:06:32:setup_element:INFO: Setting the data phase to 33 for uplink 2
14:06:32:setup_element:INFO: Setting the data phase to 32 for uplink 3
14:06:32:setup_element:INFO: Setting the data phase to 31 for uplink 4
14:06:32:setup_element:INFO: Setting the data phase to 30 for uplink 5
14:06:32:setup_element:INFO: Setting the data phase to 27 for uplink 6
14:06:32:setup_element:INFO: Setting the data phase to 26 for uplink 7
14:06:32:setup_element:INFO: Setting the data phase to 13 for uplink 8
14:06:32:setup_element:INFO: Setting the data phase to 16 for uplink 9
14:06:32:setup_element:INFO: Setting the data phase to 14 for uplink 10
14:06:32:setup_element:INFO: Setting the data phase to 16 for uplink 11
14:06:32:setup_element:INFO: Setting the data phase to 16 for uplink 12
14:06:32:setup_element:INFO: Setting the data phase to 16 for uplink 13
14:06:32:setup_element:INFO: Setting the data phase to 17 for uplink 14
14:06:32:setup_element:INFO: Setting the data phase to 17 for uplink 15
14:06:32:setup_element:INFO: Beginning SMX ASICs map scan
14:06:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:06:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:06:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:06:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:06:32:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:06:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:06:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:06:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:06:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:06:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:06:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:06:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:06:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:06:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:06:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:06:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:06:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:06:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:06:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:06:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:06:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:06:34:setup_element:INFO: Performing Elink synchronization
14:06:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:06:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:06:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:06:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:06:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:06:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:06:35:febtest:INFO: Init all SMX (CSA): 30
14:06:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:50:febtest:INFO: 01-00 | XA-000-09-004-036-011-019-13 | 31.4 | 1195.1
14:06:50:febtest:INFO: 08-01 | XA-000-09-004-036-002-014-11 | 37.7 | 1159.7
14:06:50:febtest:INFO: 03-02 | XA-000-09-004-036-008-013-04 | 40.9 | 1153.7
14:06:50:febtest:INFO: 10-03 | XA-000-09-004-036-011-013-10 | 34.6 | 1171.5
14:06:50:febtest:INFO: 05-04 | XA-000-09-004-036-005-013-03 | 47.3 | 1135.9
14:06:51:febtest:INFO: 12-05 | XA-000-09-004-036-014-013-01 | 18.7 | 1230.3
14:06:51:febtest:INFO: 07-06 | XA-000-09-004-036-002-013-11 | 31.4 | 1195.1
14:06:51:febtest:INFO: 14-07 | XA-000-09-004-036-017-013-09 | 25.1 | 1206.9
14:06:52:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:06:54:ST3_smx:INFO: chip: 1-0 31.389742 C 1206.851500 mV
14:06:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:54:ST3_smx:INFO: Electrons
14:06:54:ST3_smx:INFO: # loops 0
14:06:56:ST3_smx:INFO: # loops 1
14:06:57:ST3_smx:INFO: # loops 2
14:06:59:ST3_smx:INFO: Total # of broken channels: 0
14:06:59:ST3_smx:INFO: List of broken channels: []
14:06:59:ST3_smx:INFO: Total # of broken channels: 0
14:06:59:ST3_smx:INFO: List of broken channels: []
14:07:00:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
14:07:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:00:ST3_smx:INFO: Electrons
14:07:00:ST3_smx:INFO: # loops 0
14:07:02:ST3_smx:INFO: # loops 1
14:07:03:ST3_smx:INFO: # loops 2
14:07:05:ST3_smx:INFO: Total # of broken channels: 0
14:07:05:ST3_smx:INFO: List of broken channels: []
14:07:05:ST3_smx:INFO: Total # of broken channels: 0
14:07:05:ST3_smx:INFO: List of broken channels: []
14:07:07:ST3_smx:INFO: chip: 3-2 44.073563 C 1165.571835 mV
14:07:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:07:ST3_smx:INFO: Electrons
14:07:07:ST3_smx:INFO: # loops 0
14:07:09:ST3_smx:INFO: # loops 1
14:07:10:ST3_smx:INFO: # loops 2
14:07:12:ST3_smx:INFO: Total # of broken channels: 0
14:07:12:ST3_smx:INFO: List of broken channels: []
14:07:12:ST3_smx:INFO: Total # of broken channels: 0
14:07:12:ST3_smx:INFO: List of broken channels: []
14:07:14:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV
14:07:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:14:ST3_smx:INFO: Electrons
14:07:14:ST3_smx:INFO: # loops 0
14:07:15:ST3_smx:INFO: # loops 1
14:07:17:ST3_smx:INFO: # loops 2
14:07:18:ST3_smx:INFO: Total # of broken channels: 0
14:07:18:ST3_smx:INFO: List of broken channels: []
14:07:18:ST3_smx:INFO: Total # of broken channels: 0
14:07:18:ST3_smx:INFO: List of broken channels: []
14:07:20:ST3_smx:INFO: chip: 5-4 47.250730 C 1147.806000 mV
14:07:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:20:ST3_smx:INFO: Electrons
14:07:20:ST3_smx:INFO: # loops 0
14:07:21:ST3_smx:INFO: # loops 1
14:07:23:ST3_smx:INFO: # loops 2
14:07:25:ST3_smx:INFO: Total # of broken channels: 0
14:07:25:ST3_smx:INFO: List of broken channels: []
14:07:25:ST3_smx:INFO: Total # of broken channels: 0
14:07:25:ST3_smx:INFO: List of broken channels: []
14:07:26:ST3_smx:INFO: chip: 12-5 21.902970 C 1242.040240 mV
14:07:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:26:ST3_smx:INFO: Electrons
14:07:26:ST3_smx:INFO: # loops 0
14:07:28:ST3_smx:INFO: # loops 1
14:07:30:ST3_smx:INFO: # loops 2
14:07:31:ST3_smx:INFO: Total # of broken channels: 0
14:07:31:ST3_smx:INFO: List of broken channels: []
14:07:31:ST3_smx:INFO: Total # of broken channels: 0
14:07:31:ST3_smx:INFO: List of broken channels: []
14:07:33:ST3_smx:INFO: chip: 7-6 34.556970 C 1206.851500 mV
14:07:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:33:ST3_smx:INFO: Electrons
14:07:33:ST3_smx:INFO: # loops 0
14:07:34:ST3_smx:INFO: # loops 1
14:07:36:ST3_smx:INFO: # loops 2
14:07:38:ST3_smx:INFO: Total # of broken channels: 0
14:07:38:ST3_smx:INFO: List of broken channels: []
14:07:38:ST3_smx:INFO: Total # of broken channels: 0
14:07:38:ST3_smx:INFO: List of broken channels: []
14:07:40:ST3_smx:INFO: chip: 14-7 28.225000 C 1218.600960 mV
14:07:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:40:ST3_smx:INFO: Electrons
14:07:40:ST3_smx:INFO: # loops 0
14:07:41:ST3_smx:INFO: # loops 1
14:07:43:ST3_smx:INFO: # loops 2
14:07:44:ST3_smx:INFO: Total # of broken channels: 0
14:07:44:ST3_smx:INFO: List of broken channels: []
14:07:44:ST3_smx:INFO: Total # of broken channels: 0
14:07:44:ST3_smx:INFO: List of broken channels: []
14:07:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:07:45:febtest:INFO: 01-00 | XA-000-09-004-036-011-019-13 | 34.6 | 1230.3
14:07:45:febtest:INFO: 08-01 | XA-000-09-004-036-002-014-11 | 40.9 | 1195.1
14:07:45:febtest:INFO: 03-02 | XA-000-09-004-036-008-013-04 | 44.1 | 1183.3
14:07:46:febtest:INFO: 10-03 | XA-000-09-004-036-011-013-10 | 37.7 | 1212.7
14:07:46:febtest:INFO: 05-04 | XA-000-09-004-036-005-013-03 | 47.3 | 1171.5
14:07:46:febtest:INFO: 12-05 | XA-000-09-004-036-014-013-01 | 21.9 | 1259.6
14:07:46:febtest:INFO: 07-06 | XA-000-09-004-036-002-013-11 | 34.6 | 1230.3
14:07:46:febtest:INFO: 14-07 | XA-000-09-004-036-017-013-09 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_05-14_06_24
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3283| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.3940', '1.850', '2.2180', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9520', '1.850', '2.3530', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9480', '1.850', '0.5137', '0.000', '0.0000', '0.000', '0.0000']