FEB_3284 04.11.25 07:56:27
Info
07:56:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:27:ST3_Shared:INFO: FEB-Microcable
07:56:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:27:febtest:INFO: Testing FEB with SN 3284
07:56:28:smx_tester:INFO: Scanning setup
07:56:28:elinks:INFO: Disabling clock on downlink 0
07:56:28:elinks:INFO: Disabling clock on downlink 1
07:56:28:elinks:INFO: Disabling clock on downlink 2
07:56:28:elinks:INFO: Disabling clock on downlink 3
07:56:28:elinks:INFO: Disabling clock on downlink 4
07:56:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:28:elinks:INFO: Disabling clock on downlink 0
07:56:28:elinks:INFO: Disabling clock on downlink 1
07:56:28:elinks:INFO: Disabling clock on downlink 2
07:56:28:elinks:INFO: Disabling clock on downlink 3
07:56:28:elinks:INFO: Disabling clock on downlink 4
07:56:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:56:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:56:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:29:elinks:INFO: Disabling clock on downlink 0
07:56:29:elinks:INFO: Disabling clock on downlink 1
07:56:29:elinks:INFO: Disabling clock on downlink 2
07:56:29:elinks:INFO: Disabling clock on downlink 3
07:56:29:elinks:INFO: Disabling clock on downlink 4
07:56:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:56:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:29:elinks:INFO: Disabling clock on downlink 0
07:56:29:elinks:INFO: Disabling clock on downlink 1
07:56:29:elinks:INFO: Disabling clock on downlink 2
07:56:29:elinks:INFO: Disabling clock on downlink 3
07:56:29:elinks:INFO: Disabling clock on downlink 4
07:56:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:56:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:29:elinks:INFO: Disabling clock on downlink 0
07:56:29:elinks:INFO: Disabling clock on downlink 1
07:56:29:elinks:INFO: Disabling clock on downlink 2
07:56:29:elinks:INFO: Disabling clock on downlink 3
07:56:29:elinks:INFO: Disabling clock on downlink 4
07:56:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:56:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:29:setup_element:INFO: Scanning clock phase
07:56:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:56:29:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:56:29:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:56:29:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
07:56:29:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
07:56:29:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
07:56:29:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
07:56:29:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXX______________
Clock Delay: 23
07:56:29:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXX______________
Clock Delay: 23
07:56:29:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
07:56:29:setup_element:INFO: Scanning data phases
07:56:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:34:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:56:35:setup_element:INFO: Eye window for uplink 8 : XX_______________________________XXXXXXX
Data delay found: 17
07:56:35:setup_element:INFO: Eye window for uplink 9 : XXXXX_______________________________XXXX
Data delay found: 20
07:56:35:setup_element:INFO: Eye window for uplink 10: XXXX_______________________________XXXXX
Data delay found: 19
07:56:35:setup_element:INFO: Eye window for uplink 11: XXXXX_______________________________XXXX
Data delay found: 20
07:56:35:setup_element:INFO: Eye window for uplink 12: XXX_______________________________XXXXXX
Data delay found: 18
07:56:35:setup_element:INFO: Eye window for uplink 13: XXX_______________________________XXXXXX
Data delay found: 18
07:56:35:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXXXXX
Data delay found: 15
07:56:35:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXXXXX
Data delay found: 15
07:56:35:setup_element:INFO: Setting the data phase to 17 for uplink 8
07:56:35:setup_element:INFO: Setting the data phase to 20 for uplink 9
07:56:35:setup_element:INFO: Setting the data phase to 19 for uplink 10
07:56:35:setup_element:INFO: Setting the data phase to 20 for uplink 11
07:56:35:setup_element:INFO: Setting the data phase to 18 for uplink 12
07:56:35:setup_element:INFO: Setting the data phase to 18 for uplink 13
07:56:35:setup_element:INFO: Setting the data phase to 15 for uplink 14
07:56:35:setup_element:INFO: Setting the data phase to 15 for uplink 15
07:56:35:setup_element:INFO: Beginning SMX ASICs map scan
07:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:56:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:56:35:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
07:56:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:56:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:56:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:56:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:56:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:56:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:56:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:56:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:56:37:setup_element:INFO: Performing Elink synchronization
07:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:56:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:56:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:56:37:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:56:38:febtest:INFO: Init all SMX (CSA): 30
07:56:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:56:47:febtest:INFO: 08-01 | XA-000-09-004-036-010-025-00 | 31.4 | 1165.6
07:56:47:febtest:INFO: 10-03 | XA-000-09-004-036-017-009-09 | 18.7 | 1206.9
07:56:47:febtest:INFO: 12-05 | XA-000-09-004-036-014-009-01 | 31.4 | 1165.6
07:56:48:febtest:INFO: 14-07 | XA-000-09-004-036-011-009-10 | 37.7 | 1153.7
07:56:49:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:56:51:ST3_smx:INFO: chip: 8-1 34.556970 C 1177.390875 mV
07:56:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:51:ST3_smx:INFO: Electrons
07:56:51:ST3_smx:INFO: # loops 0
07:56:53:ST3_smx:INFO: # loops 1
07:56:55:ST3_smx:INFO: # loops 2
07:56:57:ST3_smx:INFO: Total # of broken channels: 0
07:56:57:ST3_smx:INFO: List of broken channels: []
07:56:57:ST3_smx:INFO: Total # of broken channels: 0
07:56:57:ST3_smx:INFO: List of broken channels: []
07:56:58:ST3_smx:INFO: chip: 10-3 18.745682 C 1218.600960 mV
07:56:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:58:ST3_smx:INFO: Electrons
07:56:58:ST3_smx:INFO: # loops 0
07:57:00:ST3_smx:INFO: # loops 1
07:57:03:ST3_smx:INFO: # loops 2
07:57:05:ST3_smx:INFO: Total # of broken channels: 0
07:57:05:ST3_smx:INFO: List of broken channels: []
07:57:05:ST3_smx:INFO: Total # of broken channels: 0
07:57:05:ST3_smx:INFO: List of broken channels: []
07:57:06:ST3_smx:INFO: chip: 12-5 31.389742 C 1177.390875 mV
07:57:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:07:ST3_smx:INFO: Electrons
07:57:07:ST3_smx:INFO: # loops 0
07:57:08:ST3_smx:INFO: # loops 1
07:57:10:ST3_smx:INFO: # loops 2
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:14:ST3_smx:INFO: chip: 14-7 37.726682 C 1165.571835 mV
07:57:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:14:ST3_smx:INFO: Electrons
07:57:14:ST3_smx:INFO: # loops 0
07:57:16:ST3_smx:INFO: # loops 1
07:57:18:ST3_smx:INFO: # loops 2
07:57:20:ST3_smx:INFO: Total # of broken channels: 0
07:57:20:ST3_smx:INFO: List of broken channels: []
07:57:20:ST3_smx:INFO: Total # of broken channels: 0
07:57:20:ST3_smx:INFO: List of broken channels: []
07:57:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:21:febtest:INFO: 08-01 | XA-000-09-004-036-010-025-00 | 34.6 | 1201.0
07:57:21:febtest:INFO: 10-03 | XA-000-09-004-036-017-009-09 | 21.9 | 1242.0
07:57:21:febtest:INFO: 12-05 | XA-000-09-004-036-014-009-01 | 31.4 | 1201.0
07:57:21:febtest:INFO: 14-07 | XA-000-09-004-036-011-009-10 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_04-07_56_27
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3284| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.8238', '1.850', '1.3550', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9994', '1.850', '1.0760', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9909', '1.850', '0.2609', '0.000', '0.0000', '0.000', '0.0000']