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FEB_3285 10.11.25 10:56:46
Info
10:56:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:46:ST3_Shared:INFO: FEB-Microcable
10:56:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:46:febtest:INFO: Testing FEB with SN 3285
10:56:48:smx_tester:INFO: Scanning setup
10:56:48:elinks:INFO: Disabling clock on downlink 0
10:56:48:elinks:INFO: Disabling clock on downlink 1
10:56:48:elinks:INFO: Disabling clock on downlink 2
10:56:48:elinks:INFO: Disabling clock on downlink 3
10:56:48:elinks:INFO: Disabling clock on downlink 4
10:56:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:56:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:48:elinks:INFO: Disabling clock on downlink 0
10:56:48:elinks:INFO: Disabling clock on downlink 1
10:56:48:elinks:INFO: Disabling clock on downlink 2
10:56:48:elinks:INFO: Disabling clock on downlink 3
10:56:48:elinks:INFO: Disabling clock on downlink 4
10:56:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:56:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:56:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:48:elinks:INFO: Disabling clock on downlink 0
10:56:48:elinks:INFO: Disabling clock on downlink 1
10:56:48:elinks:INFO: Disabling clock on downlink 2
10:56:48:elinks:INFO: Disabling clock on downlink 3
10:56:48:elinks:INFO: Disabling clock on downlink 4
10:56:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:48:elinks:INFO: Disabling clock on downlink 0
10:56:48:elinks:INFO: Disabling clock on downlink 1
10:56:48:elinks:INFO: Disabling clock on downlink 2
10:56:48:elinks:INFO: Disabling clock on downlink 3
10:56:48:elinks:INFO: Disabling clock on downlink 4
10:56:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:56:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:48:elinks:INFO: Disabling clock on downlink 0
10:56:48:elinks:INFO: Disabling clock on downlink 1
10:56:48:elinks:INFO: Disabling clock on downlink 2
10:56:48:elinks:INFO: Disabling clock on downlink 3
10:56:48:elinks:INFO: Disabling clock on downlink 4
10:56:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:56:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:49:setup_element:INFO: Scanning clock phase
10:56:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:49:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:56:49:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
10:56:49:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
10:56:49:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXX____________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXX____________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:56:49:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:56:49:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:56:49:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 1
10:56:49:setup_element:INFO: Scanning data phases
10:56:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:54:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:56:54:setup_element:INFO: Eye window for uplink 0 : __________________XXXXXXXXXX_X__________
Data delay found: 3
10:56:54:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXXXXXXX______________
Data delay found: 0
10:56:54:setup_element:INFO: Eye window for uplink 2 : ______XXXXXXXXX_________________________
Data delay found: 30
10:56:54:setup_element:INFO: Eye window for uplink 3 : _____X_XXXXXX___________________________
Data delay found: 28
10:56:54:setup_element:INFO: Eye window for uplink 4 : ___X_XXXXXX_____________________________
Data delay found: 26
10:56:54:setup_element:INFO: Eye window for uplink 5 : ___XXXXXXXXX____________________________
Data delay found: 27
10:56:54:setup_element:INFO: Eye window for uplink 6 : XXXXXXXX_______________________________X
Data delay found: 23
10:56:54:setup_element:INFO: Eye window for uplink 7 : XXXXXX_____________________________XXXXX
Data delay found: 20
10:56:54:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXXXXX______
Data delay found: 9
10:56:54:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
10:56:54:setup_element:INFO: Eye window for uplink 10: _X_______________________________XXXXXX_
Data delay found: 17
10:56:54:setup_element:INFO: Eye window for uplink 11: XX________________________________XXXXXX
Data delay found: 17
10:56:54:setup_element:INFO: Eye window for uplink 12: X________________________________XXXXXXX
Data delay found: 16
10:56:54:setup_element:INFO: Eye window for uplink 13: X________________________________XXXXXXX
Data delay found: 16
10:56:54:setup_element:INFO: Eye window for uplink 14: ______________________________X_XXXXXXX_
Data delay found: 14
10:56:54:setup_element:INFO: Eye window for uplink 15: _______________________________X_XXXXXXX
Data delay found: 15
10:56:54:setup_element:INFO: Setting the data phase to 3 for uplink 0
10:56:54:setup_element:INFO: Setting the data phase to 0 for uplink 1
10:56:54:setup_element:INFO: Setting the data phase to 30 for uplink 2
10:56:54:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:56:54:setup_element:INFO: Setting the data phase to 26 for uplink 4
10:56:54:setup_element:INFO: Setting the data phase to 27 for uplink 5
10:56:54:setup_element:INFO: Setting the data phase to 23 for uplink 6
10:56:54:setup_element:INFO: Setting the data phase to 20 for uplink 7
10:56:54:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:56:54:setup_element:INFO: Setting the data phase to 12 for uplink 9
10:56:54:setup_element:INFO: Setting the data phase to 17 for uplink 10
10:56:54:setup_element:INFO: Setting the data phase to 17 for uplink 11
10:56:54:setup_element:INFO: Setting the data phase to 16 for uplink 12
10:56:54:setup_element:INFO: Setting the data phase to 16 for uplink 13
10:56:54:setup_element:INFO: Setting the data phase to 14 for uplink 14
10:56:54:setup_element:INFO: Setting the data phase to 15 for uplink 15
10:56:54:setup_element:INFO: Beginning SMX ASICs map scan
10:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:56:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:56:54:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:56:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:56:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:56:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:56:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:56:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:56:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:56:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:56:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:56:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:56:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:56:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:56:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:56:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:56:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:56:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:56:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:56:57:setup_element:INFO: Performing Elink synchronization
10:56:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:56:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:56:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:56:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:56:58:febtest:INFO: Init all SMX (CSA): 30
10:57:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:57:14:febtest:INFO: 01-00 | XA-000-09-004-036-003-013-06 | 28.2 | 1189.2
10:57:14:febtest:INFO: 08-01 | XA-000-09-004-036-003-012-06 | 31.4 | 1177.4
10:57:14:febtest:INFO: 03-02 | XA-000-09-004-036-012-012-02 | 31.4 | 1183.3
10:57:15:febtest:INFO: 10-03 | XA-000-09-004-036-008-020-03 | 44.1 | 1153.7
10:57:15:febtest:INFO: 05-04 | XA-000-09-004-036-009-012-09 | 37.7 | 1177.4
10:57:15:febtest:INFO: 12-05 | XA-000-09-004-036-011-020-13 | 44.1 | 1147.8
10:57:15:febtest:INFO: 07-06 | XA-000-09-004-036-006-012-13 | 25.1 | 1212.7
10:57:15:febtest:INFO: 14-07 | XA-000-09-004-036-014-020-06 | 25.1 | 1206.9
10:57:16:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:57:18:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV
10:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:18:ST3_smx:INFO: Electrons
10:57:18:ST3_smx:INFO: # loops 0
10:57:20:ST3_smx:INFO: # loops 1
10:57:22:ST3_smx:INFO: # loops 2
10:57:24:ST3_smx:INFO: Total # of broken channels: 0
10:57:24:ST3_smx:INFO: List of broken channels: []
10:57:24:ST3_smx:INFO: Total # of broken channels: 0
10:57:24:ST3_smx:INFO: List of broken channels: []
10:57:25:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
10:57:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:25:ST3_smx:INFO: Electrons
10:57:25:ST3_smx:INFO: # loops 0
10:57:27:ST3_smx:INFO: # loops 1
10:57:29:ST3_smx:INFO: # loops 2
10:57:31:ST3_smx:INFO: Total # of broken channels: 0
10:57:31:ST3_smx:INFO: List of broken channels: []
10:57:31:ST3_smx:INFO: Total # of broken channels: 0
10:57:31:ST3_smx:INFO: List of broken channels: []
10:57:32:ST3_smx:INFO: chip: 3-2 31.389742 C 1195.082160 mV
10:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:32:ST3_smx:INFO: Electrons
10:57:32:ST3_smx:INFO: # loops 0
10:57:34:ST3_smx:INFO: # loops 1
10:57:36:ST3_smx:INFO: # loops 2
10:57:38:ST3_smx:INFO: Total # of broken channels: 0
10:57:38:ST3_smx:INFO: List of broken channels: []
10:57:38:ST3_smx:INFO: Total # of broken channels: 0
10:57:38:ST3_smx:INFO: List of broken channels: []
10:57:40:ST3_smx:INFO: chip: 10-3 44.073563 C 1171.483840 mV
10:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:40:ST3_smx:INFO: Electrons
10:57:40:ST3_smx:INFO: # loops 0
10:57:41:ST3_smx:INFO: # loops 1
10:57:43:ST3_smx:INFO: # loops 2
10:57:45:ST3_smx:INFO: Total # of broken channels: 0
10:57:45:ST3_smx:INFO: List of broken channels: []
10:57:45:ST3_smx:INFO: Total # of broken channels: 0
10:57:45:ST3_smx:INFO: List of broken channels: []
10:57:47:ST3_smx:INFO: chip: 5-4 37.726682 C 1195.082160 mV
10:57:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:47:ST3_smx:INFO: Electrons
10:57:47:ST3_smx:INFO: # loops 0
10:57:48:ST3_smx:INFO: # loops 1
10:57:50:ST3_smx:INFO: # loops 2
10:57:52:ST3_smx:INFO: Total # of broken channels: 0
10:57:52:ST3_smx:INFO: List of broken channels: []
10:57:52:ST3_smx:INFO: Total # of broken channels: 0
10:57:52:ST3_smx:INFO: List of broken channels: []
10:57:54:ST3_smx:INFO: chip: 12-5 47.250730 C 1159.654860 mV
10:57:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:54:ST3_smx:INFO: Electrons
10:57:54:ST3_smx:INFO: # loops 0
10:57:56:ST3_smx:INFO: # loops 1
10:57:57:ST3_smx:INFO: # loops 2
10:57:59:ST3_smx:INFO: Total # of broken channels: 0
10:57:59:ST3_smx:INFO: List of broken channels: []
10:57:59:ST3_smx:INFO: Total # of broken channels: 0
10:57:59:ST3_smx:INFO: List of broken channels: []
10:58:01:ST3_smx:INFO: chip: 7-6 25.062742 C 1230.330540 mV
10:58:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:01:ST3_smx:INFO: Electrons
10:58:01:ST3_smx:INFO: # loops 0
10:58:03:ST3_smx:INFO: # loops 1
10:58:04:ST3_smx:INFO: # loops 2
10:58:06:ST3_smx:INFO: Total # of broken channels: 0
10:58:06:ST3_smx:INFO: List of broken channels: []
10:58:06:ST3_smx:INFO: Total # of broken channels: 0
10:58:06:ST3_smx:INFO: List of broken channels: []
10:58:08:ST3_smx:INFO: chip: 14-7 28.225000 C 1218.600960 mV
10:58:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:08:ST3_smx:INFO: Electrons
10:58:08:ST3_smx:INFO: # loops 0
10:58:10:ST3_smx:INFO: # loops 1
10:58:11:ST3_smx:INFO: # loops 2
10:58:13:ST3_smx:INFO: Total # of broken channels: 0
10:58:13:ST3_smx:INFO: List of broken channels: []
10:58:13:ST3_smx:INFO: Total # of broken channels: 0
10:58:13:ST3_smx:INFO: List of broken channels: []
10:58:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:58:14:febtest:INFO: 01-00 | XA-000-09-004-036-003-013-06 | 31.4 | 1224.5
10:58:14:febtest:INFO: 08-01 | XA-000-09-004-036-003-012-06 | 34.6 | 1212.7
10:58:14:febtest:INFO: 03-02 | XA-000-09-004-036-012-012-02 | 34.6 | 1218.6
10:58:14:febtest:INFO: 10-03 | XA-000-09-004-036-008-020-03 | 44.1 | 1206.9
10:58:15:febtest:INFO: 05-04 | XA-000-09-004-036-009-012-09 | 37.7 | 1230.3
10:58:15:febtest:INFO: 12-05 | XA-000-09-004-036-011-020-13 | 47.3 | 1183.3
10:58:15:febtest:INFO: 07-06 | XA-000-09-004-036-006-012-13 | 25.1 | 1247.9
10:58:15:febtest:INFO: 14-07 | XA-000-09-004-036-014-020-06 | 31.4 | 1247.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_10-10_56_46
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3285| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9840', '1.850', '2.9450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0040', '1.850', '2.3340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9760', '1.850', '0.5214', '0.000', '0.0000', '0.000', '0.0000']