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FEB_3291 11.11.25 12:24:40
Info
12:24:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:24:40:ST3_Shared:INFO: FEB-Microcable
12:24:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:24:40:febtest:INFO: Testing FEB with SN 3291
12:24:42:smx_tester:INFO: Scanning setup
12:24:42:elinks:INFO: Disabling clock on downlink 0
12:24:42:elinks:INFO: Disabling clock on downlink 1
12:24:42:elinks:INFO: Disabling clock on downlink 2
12:24:42:elinks:INFO: Disabling clock on downlink 3
12:24:42:elinks:INFO: Disabling clock on downlink 4
12:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:24:42:elinks:INFO: Disabling clock on downlink 0
12:24:42:elinks:INFO: Disabling clock on downlink 1
12:24:42:elinks:INFO: Disabling clock on downlink 2
12:24:42:elinks:INFO: Disabling clock on downlink 3
12:24:42:elinks:INFO: Disabling clock on downlink 4
12:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:24:42:elinks:INFO: Disabling clock on downlink 0
12:24:42:elinks:INFO: Disabling clock on downlink 1
12:24:42:elinks:INFO: Disabling clock on downlink 2
12:24:42:elinks:INFO: Disabling clock on downlink 3
12:24:42:elinks:INFO: Disabling clock on downlink 4
12:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:24:42:elinks:INFO: Disabling clock on downlink 0
12:24:42:elinks:INFO: Disabling clock on downlink 1
12:24:42:elinks:INFO: Disabling clock on downlink 2
12:24:42:elinks:INFO: Disabling clock on downlink 3
12:24:42:elinks:INFO: Disabling clock on downlink 4
12:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:24:42:elinks:INFO: Disabling clock on downlink 0
12:24:42:elinks:INFO: Disabling clock on downlink 1
12:24:42:elinks:INFO: Disabling clock on downlink 2
12:24:42:elinks:INFO: Disabling clock on downlink 3
12:24:42:elinks:INFO: Disabling clock on downlink 4
12:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:24:42:setup_element:INFO: Scanning clock phase
12:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:24:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:24:43:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:24:43:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
12:24:43:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
12:24:43:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:24:43:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:24:43:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
12:24:43:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXX____________
Clock Delay: 24
12:24:43:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXX____________
Clock Delay: 24
12:24:43:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:24:43:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:24:43:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
12:24:43:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
12:24:43:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
12:24:43:setup_element:INFO: Scanning data phases
12:24:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:24:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:24:48:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:24:48:setup_element:INFO: Eye window for uplink 0 : ____________________X_XXXXXXXXX_________
Data delay found: 5
12:24:48:setup_element:INFO: Eye window for uplink 1 : _________________XXXXXXXXXXX____________
Data delay found: 2
12:24:48:setup_element:INFO: Eye window for uplink 2 : ___________XXXXXXX______________________
Data delay found: 34
12:24:48:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXX_______________________
Data delay found: 33
12:24:48:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXX________________________
Data delay found: 32
12:24:48:setup_element:INFO: Eye window for uplink 5 : ______XXXXXXXXX_________________________
Data delay found: 30
12:24:48:setup_element:INFO: Eye window for uplink 6 : _____XXXXXXX____________________________
Data delay found: 28
12:24:48:setup_element:INFO: Eye window for uplink 7 : ___XXXXXXXX____________________________X
Data delay found: 24
12:24:48:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXXXXX____
Data delay found: 11
12:24:48:setup_element:INFO: Eye window for uplink 9 : ______________________________X_XXXXX___
Data delay found: 13
12:24:48:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXXX___
Data delay found: 13
12:24:48:setup_element:INFO: Eye window for uplink 11: X_______________________________XXXXXX_X
Data delay found: 16
12:24:48:setup_element:INFO: Eye window for uplink 12: XXXXXX_______________________________XXX
Data delay found: 21
12:24:48:setup_element:INFO: Eye window for uplink 13: XXXXXX________________________________XX
Data delay found: 21
12:24:48:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXXXX_
Data delay found: 15
12:24:48:setup_element:INFO: Eye window for uplink 15: X______________________________XXXXXXXXX
Data delay found: 15
12:24:48:setup_element:INFO: Setting the data phase to 5 for uplink 0
12:24:48:setup_element:INFO: Setting the data phase to 2 for uplink 1
12:24:48:setup_element:INFO: Setting the data phase to 34 for uplink 2
12:24:48:setup_element:INFO: Setting the data phase to 33 for uplink 3
12:24:48:setup_element:INFO: Setting the data phase to 32 for uplink 4
12:24:48:setup_element:INFO: Setting the data phase to 30 for uplink 5
12:24:48:setup_element:INFO: Setting the data phase to 28 for uplink 6
12:24:48:setup_element:INFO: Setting the data phase to 24 for uplink 7
12:24:48:setup_element:INFO: Setting the data phase to 11 for uplink 8
12:24:48:setup_element:INFO: Setting the data phase to 13 for uplink 9
12:24:48:setup_element:INFO: Setting the data phase to 13 for uplink 10
12:24:48:setup_element:INFO: Setting the data phase to 16 for uplink 11
12:24:48:setup_element:INFO: Setting the data phase to 21 for uplink 12
12:24:48:setup_element:INFO: Setting the data phase to 21 for uplink 13
12:24:48:setup_element:INFO: Setting the data phase to 15 for uplink 14
12:24:48:setup_element:INFO: Setting the data phase to 15 for uplink 15
12:24:48:setup_element:INFO: Beginning SMX ASICs map scan
12:24:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:24:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:24:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:24:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:24:48:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:24:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:24:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:24:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:24:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:24:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:24:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:24:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:24:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:24:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:24:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:24:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:24:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:24:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:24:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:24:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:24:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:24:51:setup_element:INFO: Performing Elink synchronization
12:24:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:24:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:24:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:24:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:24:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:24:51:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:24:52:febtest:INFO: Init all SMX (CSA): 30
12:25:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:25:08:febtest:INFO: 01-00 | XA-000-09-004-036-015-023-11 | 34.6 | 1171.5
12:25:08:febtest:INFO: 08-01 | XA-000-09-004-036-003-021-01 | 40.9 | 1159.7
12:25:08:febtest:INFO: 03-02 | XA-000-09-004-036-012-023-05 | 44.1 | 1153.7
12:25:09:febtest:INFO: 10-03 | XA-000-09-004-036-006-021-10 | 44.1 | 1153.7
12:25:09:febtest:INFO: 05-04 | XA-000-09-004-036-009-022-14 | 53.6 | 1118.1
12:25:09:febtest:INFO: 12-05 | XA-000-09-004-036-018-020-00 | 25.1 | 1206.9
12:25:09:febtest:INFO: 07-06 | XA-000-09-004-036-006-022-10 | 40.9 | 1165.6
12:25:10:febtest:INFO: 14-07 | XA-000-09-004-036-015-021-11 | 6.1 | 1294.5
12:25:11:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:25:13:ST3_smx:INFO: chip: 1-0 34.556970 C 1183.292940 mV
12:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:13:ST3_smx:INFO: Electrons
12:25:13:ST3_smx:INFO: # loops 0
12:25:15:ST3_smx:INFO: # loops 1
12:25:17:ST3_smx:INFO: # loops 2
12:25:19:ST3_smx:INFO: Total # of broken channels: 0
12:25:19:ST3_smx:INFO: List of broken channels: []
12:25:19:ST3_smx:INFO: Total # of broken channels: 0
12:25:19:ST3_smx:INFO: List of broken channels: []
12:25:20:ST3_smx:INFO: chip: 8-1 40.898880 C 1171.483840 mV
12:25:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:20:ST3_smx:INFO: Electrons
12:25:20:ST3_smx:INFO: # loops 0
12:25:22:ST3_smx:INFO: # loops 1
12:25:24:ST3_smx:INFO: # loops 2
12:25:26:ST3_smx:INFO: Total # of broken channels: 0
12:25:26:ST3_smx:INFO: List of broken channels: []
12:25:26:ST3_smx:INFO: Total # of broken channels: 0
12:25:26:ST3_smx:INFO: List of broken channels: []
12:25:28:ST3_smx:INFO: chip: 3-2 44.073563 C 1165.571835 mV
12:25:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:28:ST3_smx:INFO: Electrons
12:25:28:ST3_smx:INFO: # loops 0
12:25:30:ST3_smx:INFO: # loops 1
12:25:32:ST3_smx:INFO: # loops 2
12:25:34:ST3_smx:INFO: Total # of broken channels: 0
12:25:34:ST3_smx:INFO: List of broken channels: []
12:25:34:ST3_smx:INFO: Total # of broken channels: 0
12:25:34:ST3_smx:INFO: List of broken channels: []
12:25:36:ST3_smx:INFO: chip: 10-3 47.250730 C 1165.571835 mV
12:25:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:36:ST3_smx:INFO: Electrons
12:25:36:ST3_smx:INFO: # loops 0
12:25:38:ST3_smx:INFO: # loops 1
12:25:40:ST3_smx:INFO: # loops 2
12:25:42:ST3_smx:INFO: Total # of broken channels: 0
12:25:42:ST3_smx:INFO: List of broken channels: []
12:25:42:ST3_smx:INFO: Total # of broken channels: 0
12:25:42:ST3_smx:INFO: List of broken channels: []
12:25:43:ST3_smx:INFO: chip: 5-4 53.612520 C 1129.995435 mV
12:25:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:43:ST3_smx:INFO: Electrons
12:25:43:ST3_smx:INFO: # loops 0
12:25:46:ST3_smx:INFO: # loops 1
12:25:48:ST3_smx:INFO: # loops 2
12:25:50:ST3_smx:INFO: Total # of broken channels: 0
12:25:50:ST3_smx:INFO: List of broken channels: []
12:25:50:ST3_smx:INFO: Total # of broken channels: 0
12:25:50:ST3_smx:INFO: List of broken channels: []
12:25:52:ST3_smx:INFO: chip: 12-5 25.062742 C 1224.468235 mV
12:25:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:52:ST3_smx:INFO: Electrons
12:25:52:ST3_smx:INFO: # loops 0
12:25:54:ST3_smx:INFO: # loops 1
12:25:56:ST3_smx:INFO: # loops 2
12:25:57:ST3_smx:INFO: Total # of broken channels: 0
12:25:57:ST3_smx:INFO: List of broken channels: []
12:25:57:ST3_smx:INFO: Total # of broken channels: 0
12:25:57:ST3_smx:INFO: List of broken channels: []
12:25:59:ST3_smx:INFO: chip: 7-6 40.898880 C 1183.292940 mV
12:25:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:25:59:ST3_smx:INFO: Electrons
12:25:59:ST3_smx:INFO: # loops 0
12:26:01:ST3_smx:INFO: # loops 1
12:26:03:ST3_smx:INFO: # loops 2
12:26:05:ST3_smx:INFO: Total # of broken channels: 0
12:26:05:ST3_smx:INFO: List of broken channels: []
12:26:05:ST3_smx:INFO: Total # of broken channels: 0
12:26:05:ST3_smx:INFO: List of broken channels: []
12:26:06:ST3_smx:INFO: chip: 14-7 6.141382 C 1317.668715 mV
12:26:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:26:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:26:06:ST3_smx:INFO: Electrons
12:26:06:ST3_smx:INFO: # loops 0
12:26:08:ST3_smx:INFO: # loops 1
12:26:10:ST3_smx:INFO: # loops 2
12:26:12:ST3_smx:INFO: Total # of broken channels: 0
12:26:12:ST3_smx:INFO: List of broken channels: []
12:26:12:ST3_smx:INFO: Total # of broken channels: 0
12:26:12:ST3_smx:INFO: List of broken channels: []
12:26:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:26:13:febtest:INFO: 01-00 | XA-000-09-004-036-015-023-11 | 37.7 | 1206.9
12:26:13:febtest:INFO: 08-01 | XA-000-09-004-036-003-021-01 | 44.1 | 1195.1
12:26:13:febtest:INFO: 03-02 | XA-000-09-004-036-012-023-05 | 47.3 | 1183.3
12:26:13:febtest:INFO: 10-03 | XA-000-09-004-036-006-021-10 | 47.3 | 1189.2
12:26:14:febtest:INFO: 05-04 | XA-000-09-004-036-009-022-14 | 56.8 | 1153.7
12:26:14:febtest:INFO: 12-05 | XA-000-09-004-036-018-020-00 | 28.2 | 1247.9
12:26:14:febtest:INFO: 07-06 | XA-000-09-004-036-006-022-10 | 44.1 | 1206.9
12:26:14:febtest:INFO: 14-07 | XA-000-09-004-036-015-021-11 | 6.1 | 1369.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_11-12_24_40
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3291| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5090', '1.850', '2.5620', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0270', '1.850', '2.3340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5216', '0.000', '0.0000', '0.000', '0.0000']