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FEB_3297 19.11.25 11:35:31
Info
11:35:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:31:ST3_Shared:INFO: FEB-Microcable
11:35:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:31:febtest:INFO: Testing FEB with SN 3297
11:35:33:smx_tester:INFO: Scanning setup
11:35:33:elinks:INFO: Disabling clock on downlink 0
11:35:33:elinks:INFO: Disabling clock on downlink 1
11:35:33:elinks:INFO: Disabling clock on downlink 2
11:35:33:elinks:INFO: Disabling clock on downlink 3
11:35:33:elinks:INFO: Disabling clock on downlink 4
11:35:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:35:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:33:elinks:INFO: Disabling clock on downlink 0
11:35:33:elinks:INFO: Disabling clock on downlink 1
11:35:33:elinks:INFO: Disabling clock on downlink 2
11:35:33:elinks:INFO: Disabling clock on downlink 3
11:35:33:elinks:INFO: Disabling clock on downlink 4
11:35:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:35:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:35:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:33:elinks:INFO: Disabling clock on downlink 0
11:35:33:elinks:INFO: Disabling clock on downlink 1
11:35:33:elinks:INFO: Disabling clock on downlink 2
11:35:33:elinks:INFO: Disabling clock on downlink 3
11:35:33:elinks:INFO: Disabling clock on downlink 4
11:35:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:33:elinks:INFO: Disabling clock on downlink 0
11:35:33:elinks:INFO: Disabling clock on downlink 1
11:35:33:elinks:INFO: Disabling clock on downlink 2
11:35:33:elinks:INFO: Disabling clock on downlink 3
11:35:33:elinks:INFO: Disabling clock on downlink 4
11:35:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:35:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:33:elinks:INFO: Disabling clock on downlink 0
11:35:33:elinks:INFO: Disabling clock on downlink 1
11:35:33:elinks:INFO: Disabling clock on downlink 2
11:35:33:elinks:INFO: Disabling clock on downlink 3
11:35:34:elinks:INFO: Disabling clock on downlink 4
11:35:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:35:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:34:setup_element:INFO: Scanning clock phase
11:35:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:35:34:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
11:35:34:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
11:35:34:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:35:34:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:35:34:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:35:34:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:35:34:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXX____________
Clock Delay: 25
11:35:34:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________XXXXX____________
Clock Delay: 25
11:35:34:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________XXXXXX_X__________
Clock Delay: 25
11:35:34:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXX_X__________
Clock Delay: 25
11:35:34:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
11:35:34:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
11:35:34:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXX____________
Clock Delay: 24
11:35:34:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXX____________
Clock Delay: 24
11:35:34:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:35:34:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:35:34:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
11:35:34:setup_element:INFO: Scanning data phases
11:35:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:35:39:setup_element:INFO: Eye window for uplink 0 : __________________XXXXXXXXXXX___________
Data delay found: 3
11:35:39:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXXXXXXX______________
Data delay found: 0
11:35:39:setup_element:INFO: Eye window for uplink 2 : __________XXXXXXXX______________________
Data delay found: 33
11:35:39:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXXX______________________
Data delay found: 33
11:35:39:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXXXX______________________
Data delay found: 33
11:35:39:setup_element:INFO: Eye window for uplink 5 : ________XXXXXXXX________________________
Data delay found: 31
11:35:39:setup_element:INFO: Eye window for uplink 6 : __XXXXXXXX______________________________
Data delay found: 25
11:35:39:setup_element:INFO: Eye window for uplink 7 : _XXXXXXXXXX____________________________X
Data delay found: 24
11:35:39:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXXX___
Data delay found: 13
11:35:39:setup_element:INFO: Eye window for uplink 9 : X________________________________XXXXXX_
Data delay found: 16
11:35:39:setup_element:INFO: Eye window for uplink 10: X_______________________________XXXXXXX_
Data delay found: 16
11:35:39:setup_element:INFO: Eye window for uplink 11: XX_______________________________XXXXXXX
Data delay found: 17
11:35:39:setup_element:INFO: Eye window for uplink 12: XXXXXX________________________________XX
Data delay found: 21
11:35:39:setup_element:INFO: Eye window for uplink 13: XXXXXX_________________________________X
Data delay found: 22
11:35:39:setup_element:INFO: Eye window for uplink 14: XXX_______________________________XXXXXX
Data delay found: 18
11:35:39:setup_element:INFO: Eye window for uplink 15: XXXX______________________________XXXXXX
Data delay found: 18
11:35:39:setup_element:INFO: Setting the data phase to 3 for uplink 0
11:35:39:setup_element:INFO: Setting the data phase to 0 for uplink 1
11:35:39:setup_element:INFO: Setting the data phase to 33 for uplink 2
11:35:39:setup_element:INFO: Setting the data phase to 33 for uplink 3
11:35:39:setup_element:INFO: Setting the data phase to 33 for uplink 4
11:35:39:setup_element:INFO: Setting the data phase to 31 for uplink 5
11:35:39:setup_element:INFO: Setting the data phase to 25 for uplink 6
11:35:39:setup_element:INFO: Setting the data phase to 24 for uplink 7
11:35:39:setup_element:INFO: Setting the data phase to 13 for uplink 8
11:35:39:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:35:39:setup_element:INFO: Setting the data phase to 16 for uplink 10
11:35:39:setup_element:INFO: Setting the data phase to 17 for uplink 11
11:35:39:setup_element:INFO: Setting the data phase to 21 for uplink 12
11:35:39:setup_element:INFO: Setting the data phase to 22 for uplink 13
11:35:39:setup_element:INFO: Setting the data phase to 18 for uplink 14
11:35:39:setup_element:INFO: Setting the data phase to 18 for uplink 15
11:35:39:setup_element:INFO: Beginning SMX ASICs map scan
11:35:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:35:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:35:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:35:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:35:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:35:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:35:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:35:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:35:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:35:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:35:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:35:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:35:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:35:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:35:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:35:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:35:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:35:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:35:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:35:42:setup_element:INFO: Performing Elink synchronization
11:35:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:35:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:35:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:35:42:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:35:43:febtest:INFO: Init all SMX (CSA): 30
11:36:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:36:02:febtest:INFO: 01-00 | XA-000-09-004-036-009-024-14 | 28.2 | 1195.1
11:36:02:febtest:INFO: 08-01 | XA-000-09-004-036-012-018-05 | 44.1 | 1153.7
11:36:02:febtest:INFO: 03-02 | XA-000-09-004-036-012-024-05 | 34.6 | 1195.1
11:36:02:febtest:INFO: 10-03 | XA-000-09-004-036-009-018-14 | 40.9 | 1159.7
11:36:02:febtest:INFO: 05-04 | XA-000-09-004-036-018-018-00 | 21.9 | 1224.5
11:36:03:febtest:INFO: 12-05 | XA-000-09-004-036-018-017-00 | 15.6 | 1247.9
11:36:03:febtest:INFO: 07-06 | XA-000-09-004-036-015-018-11 | 28.2 | 1212.7
11:36:03:febtest:INFO: 14-07 | XA-000-09-004-036-015-017-11 | 37.7 | 1171.5
11:36:04:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:36:06:ST3_smx:INFO: chip: 1-0 31.389742 C 1206.851500 mV
11:36:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:06:ST3_smx:INFO: Electrons
11:36:06:ST3_smx:INFO: # loops 0
11:36:08:ST3_smx:INFO: # loops 1
11:36:11:ST3_smx:INFO: # loops 2
11:36:13:ST3_smx:INFO: Total # of broken channels: 0
11:36:13:ST3_smx:INFO: List of broken channels: []
11:36:13:ST3_smx:INFO: Total # of broken channels: 0
11:36:13:ST3_smx:INFO: List of broken channels: []
11:36:15:ST3_smx:INFO: chip: 8-1 44.073563 C 1171.483840 mV
11:36:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:15:ST3_smx:INFO: Electrons
11:36:15:ST3_smx:INFO: # loops 0
11:36:17:ST3_smx:INFO: # loops 1
11:36:19:ST3_smx:INFO: # loops 2
11:36:21:ST3_smx:INFO: Total # of broken channels: 0
11:36:21:ST3_smx:INFO: List of broken channels: []
11:36:21:ST3_smx:INFO: Total # of broken channels: 0
11:36:21:ST3_smx:INFO: List of broken channels: []
11:36:23:ST3_smx:INFO: chip: 3-2 34.556970 C 1206.851500 mV
11:36:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:23:ST3_smx:INFO: Electrons
11:36:23:ST3_smx:INFO: # loops 0
11:36:25:ST3_smx:INFO: # loops 1
11:36:27:ST3_smx:INFO: # loops 2
11:36:29:ST3_smx:INFO: Total # of broken channels: 0
11:36:29:ST3_smx:INFO: List of broken channels: []
11:36:29:ST3_smx:INFO: Total # of broken channels: 0
11:36:29:ST3_smx:INFO: List of broken channels: []
11:36:30:ST3_smx:INFO: chip: 10-3 44.073563 C 1177.390875 mV
11:36:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:31:ST3_smx:INFO: Electrons
11:36:31:ST3_smx:INFO: # loops 0
11:36:32:ST3_smx:INFO: # loops 1
11:36:34:ST3_smx:INFO: # loops 2
11:36:36:ST3_smx:INFO: Total # of broken channels: 0
11:36:36:ST3_smx:INFO: List of broken channels: []
11:36:36:ST3_smx:INFO: Total # of broken channels: 0
11:36:36:ST3_smx:INFO: List of broken channels: []
11:36:38:ST3_smx:INFO: chip: 5-4 25.062742 C 1236.187875 mV
11:36:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:38:ST3_smx:INFO: Electrons
11:36:38:ST3_smx:INFO: # loops 0
11:36:40:ST3_smx:INFO: # loops 1
11:36:43:ST3_smx:INFO: # loops 2
11:36:45:ST3_smx:INFO: Total # of broken channels: 1
11:36:45:ST3_smx:INFO: List of broken channels: [42]
11:36:45:ST3_smx:INFO: Total # of broken channels: 1
11:36:45:ST3_smx:INFO: List of broken channels: [42]
11:36:46:ST3_smx:INFO: chip: 12-5 18.745682 C 1265.400000 mV
11:36:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:46:ST3_smx:INFO: Electrons
11:36:47:ST3_smx:INFO: # loops 0
11:36:49:ST3_smx:INFO: # loops 1
11:36:51:ST3_smx:INFO: # loops 2
11:36:54:ST3_smx:INFO: Total # of broken channels: 0
11:36:54:ST3_smx:INFO: List of broken channels: []
11:36:54:ST3_smx:INFO: Total # of broken channels: 0
11:36:54:ST3_smx:INFO: List of broken channels: []
11:36:55:ST3_smx:INFO: chip: 7-6 31.389742 C 1224.468235 mV
11:36:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:55:ST3_smx:INFO: Electrons
11:36:55:ST3_smx:INFO: # loops 0
11:36:57:ST3_smx:INFO: # loops 1
11:37:00:ST3_smx:INFO: # loops 2
11:37:02:ST3_smx:INFO: Total # of broken channels: 0
11:37:02:ST3_smx:INFO: List of broken channels: []
11:37:02:ST3_smx:INFO: Total # of broken channels: 0
11:37:02:ST3_smx:INFO: List of broken channels: []
11:37:04:ST3_smx:INFO: chip: 14-7 40.898880 C 1183.292940 mV
11:37:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:04:ST3_smx:INFO: Electrons
11:37:04:ST3_smx:INFO: # loops 0
11:37:06:ST3_smx:INFO: # loops 1
11:37:08:ST3_smx:INFO: # loops 2
11:37:10:ST3_smx:INFO: Total # of broken channels: 0
11:37:10:ST3_smx:INFO: List of broken channels: []
11:37:10:ST3_smx:INFO: Total # of broken channels: 0
11:37:10:ST3_smx:INFO: List of broken channels: []
11:37:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:37:10:febtest:INFO: 01-00 | XA-000-09-004-036-009-024-14 | 31.4 | 1236.2
11:37:11:febtest:INFO: 08-01 | XA-000-09-004-036-012-018-05 | 44.1 | 1195.1
11:37:11:febtest:INFO: 03-02 | XA-000-09-004-036-012-024-05 | 34.6 | 1230.3
11:37:11:febtest:INFO: 10-03 | XA-000-09-004-036-009-018-14 | 44.1 | 1201.0
11:37:11:febtest:INFO: 05-04 | XA-000-09-004-036-018-018-00 | 25.1 | 1259.6
11:37:11:febtest:INFO: 12-05 | XA-000-09-004-036-018-017-00 | 18.7 | 1288.7
11:37:12:febtest:INFO: 07-06 | XA-000-09-004-036-015-018-11 | 31.4 | 1247.9
11:37:12:febtest:INFO: 14-07 | XA-000-09-004-036-015-017-11 | 44.1 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_19-11_35_31
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3297| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5600', '1.850', '3.0500', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0230', '1.850', '2.5120', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9790', '1.850', '0.5226', '0.000', '0.0000', '0.000', '0.0000']