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FEB_3300 21.11.25 08:16:08
Info
08:16:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:16:08:ST3_Shared:INFO: FEB-Microcable
08:16:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:16:08:febtest:INFO: Testing FEB with SN 3300
08:16:10:smx_tester:INFO: Scanning setup
08:16:10:elinks:INFO: Disabling clock on downlink 0
08:16:10:elinks:INFO: Disabling clock on downlink 1
08:16:10:elinks:INFO: Disabling clock on downlink 2
08:16:10:elinks:INFO: Disabling clock on downlink 3
08:16:10:elinks:INFO: Disabling clock on downlink 4
08:16:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:16:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:16:10:elinks:INFO: Disabling clock on downlink 0
08:16:10:elinks:INFO: Disabling clock on downlink 1
08:16:10:elinks:INFO: Disabling clock on downlink 2
08:16:10:elinks:INFO: Disabling clock on downlink 3
08:16:10:elinks:INFO: Disabling clock on downlink 4
08:16:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:16:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:16:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:16:10:elinks:INFO: Disabling clock on downlink 0
08:16:10:elinks:INFO: Disabling clock on downlink 1
08:16:10:elinks:INFO: Disabling clock on downlink 2
08:16:10:elinks:INFO: Disabling clock on downlink 3
08:16:10:elinks:INFO: Disabling clock on downlink 4
08:16:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:16:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:16:10:elinks:INFO: Disabling clock on downlink 0
08:16:10:elinks:INFO: Disabling clock on downlink 1
08:16:10:elinks:INFO: Disabling clock on downlink 2
08:16:10:elinks:INFO: Disabling clock on downlink 3
08:16:10:elinks:INFO: Disabling clock on downlink 4
08:16:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:16:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:16:10:elinks:INFO: Disabling clock on downlink 0
08:16:10:elinks:INFO: Disabling clock on downlink 1
08:16:10:elinks:INFO: Disabling clock on downlink 2
08:16:10:elinks:INFO: Disabling clock on downlink 3
08:16:10:elinks:INFO: Disabling clock on downlink 4
08:16:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:16:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:16:10:setup_element:INFO: Scanning clock phase
08:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:16:11:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
08:16:11:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
08:16:11:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:16:11:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:16:11:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
08:16:11:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
08:16:11:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:16:11:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
08:16:11:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
08:16:11:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
08:16:11:setup_element:INFO: Scanning data phases
08:16:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:16:16:setup_element:INFO: Eye window for uplink 0 : ___________________XXXXXXXXXXXX_________
Data delay found: 4
08:16:16:setup_element:INFO: Eye window for uplink 1 : ________________XXXXXXXXXXX_____________
Data delay found: 1
08:16:16:setup_element:INFO: Eye window for uplink 2 : __________XXXXXXXX_X____________________
Data delay found: 34
08:16:16:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXXX______________________
Data delay found: 33
08:16:16:setup_element:INFO: Eye window for uplink 4 : ________XXXXXXXXXXXX____________________
Data delay found: 33
08:16:16:setup_element:INFO: Eye window for uplink 5 : _______XXXXXXXXXXXX_____________________
Data delay found: 32
08:16:16:setup_element:INFO: Eye window for uplink 6 : ____XXXXXXXX____________________________
Data delay found: 27
08:16:16:setup_element:INFO: Eye window for uplink 7 : _XXXXXXXXXXX___________________________X
Data delay found: 25
08:16:16:setup_element:INFO: Eye window for uplink 8 : X________________________________XXXXXXX
Data delay found: 16
08:16:16:setup_element:INFO: Eye window for uplink 9 : XXXX______________________________XXXXXX
Data delay found: 18
08:16:16:setup_element:INFO: Eye window for uplink 10: XXXXX_______________________________XXXX
Data delay found: 20
08:16:16:setup_element:INFO: Eye window for uplink 11: XXXXXX_______________________________XXX
Data delay found: 21
08:16:16:setup_element:INFO: Eye window for uplink 12: XXXX________________________________XXXX
Data delay found: 19
08:16:16:setup_element:INFO: Eye window for uplink 13: XXXXX________________________________XXX
Data delay found: 20
08:16:16:setup_element:INFO: Eye window for uplink 14: XX_________________________________XXXXX
Data delay found: 18
08:16:16:setup_element:INFO: Eye window for uplink 15: XX__________________________________XXXX
Data delay found: 18
08:16:16:setup_element:INFO: Setting the data phase to 4 for uplink 0
08:16:16:setup_element:INFO: Setting the data phase to 1 for uplink 1
08:16:16:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:16:16:setup_element:INFO: Setting the data phase to 33 for uplink 3
08:16:16:setup_element:INFO: Setting the data phase to 33 for uplink 4
08:16:16:setup_element:INFO: Setting the data phase to 32 for uplink 5
08:16:16:setup_element:INFO: Setting the data phase to 27 for uplink 6
08:16:16:setup_element:INFO: Setting the data phase to 25 for uplink 7
08:16:16:setup_element:INFO: Setting the data phase to 16 for uplink 8
08:16:16:setup_element:INFO: Setting the data phase to 18 for uplink 9
08:16:16:setup_element:INFO: Setting the data phase to 20 for uplink 10
08:16:16:setup_element:INFO: Setting the data phase to 21 for uplink 11
08:16:16:setup_element:INFO: Setting the data phase to 19 for uplink 12
08:16:16:setup_element:INFO: Setting the data phase to 20 for uplink 13
08:16:16:setup_element:INFO: Setting the data phase to 18 for uplink 14
08:16:16:setup_element:INFO: Setting the data phase to 18 for uplink 15
08:16:16:setup_element:INFO: Beginning SMX ASICs map scan
08:16:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:16:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:16:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:16:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:16:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:16:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:16:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:16:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:16:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:16:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:16:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:16:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:16:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:16:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:16:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:16:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:16:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:16:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:16:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:16:19:setup_element:INFO: Performing Elink synchronization
08:16:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:16:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:16:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:16:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:16:19:febtest:INFO: Init all SMX (CSA): 30
08:16:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:16:33:febtest:INFO: 01-00 | XA-000-09-004-036-011-027-13 | 37.7 | 1153.7
08:16:33:febtest:INFO: 08-01 | XA-000-09-004-036-009-002-09 | 40.9 | 1141.9
08:16:34:febtest:INFO: 03-02 | XA-000-09-004-036-008-027-03 | 44.1 | 1135.9
08:16:34:febtest:INFO: 10-03 | XA-000-09-004-036-014-026-06 | 37.7 | 1153.7
08:16:34:febtest:INFO: 05-04 | XA-000-09-004-036-012-002-02 | 44.1 | 1153.7
08:16:34:febtest:INFO: 12-05 | XA-000-09-004-036-008-026-03 | 28.2 | 1189.2
08:16:34:febtest:INFO: 07-06 | XA-000-09-004-036-008-025-03 | 31.4 | 1177.4
08:16:35:febtest:INFO: 14-07 | XA-000-09-004-036-011-025-13 | 18.7 | 1212.7
08:16:36:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:16:38:ST3_smx:INFO: chip: 1-0 40.898880 C 1159.654860 mV
08:16:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:38:ST3_smx:INFO: Electrons
08:16:38:ST3_smx:INFO: # loops 0
08:16:39:ST3_smx:INFO: # loops 1
08:16:41:ST3_smx:INFO: # loops 2
08:16:42:ST3_smx:INFO: Total # of broken channels: 0
08:16:42:ST3_smx:INFO: List of broken channels: []
08:16:42:ST3_smx:INFO: Total # of broken channels: 0
08:16:42:ST3_smx:INFO: List of broken channels: []
08:16:44:ST3_smx:INFO: chip: 8-1 40.898880 C 1153.732915 mV
08:16:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:44:ST3_smx:INFO: Electrons
08:16:44:ST3_smx:INFO: # loops 0
08:16:46:ST3_smx:INFO: # loops 1
08:16:47:ST3_smx:INFO: # loops 2
08:16:49:ST3_smx:INFO: Total # of broken channels: 0
08:16:49:ST3_smx:INFO: List of broken channels: []
08:16:49:ST3_smx:INFO: Total # of broken channels: 0
08:16:49:ST3_smx:INFO: List of broken channels: []
08:16:51:ST3_smx:INFO: chip: 3-2 44.073563 C 1147.806000 mV
08:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:51:ST3_smx:INFO: Electrons
08:16:51:ST3_smx:INFO: # loops 0
08:16:52:ST3_smx:INFO: # loops 1
08:16:54:ST3_smx:INFO: # loops 2
08:16:55:ST3_smx:INFO: Total # of broken channels: 0
08:16:55:ST3_smx:INFO: List of broken channels: []
08:16:55:ST3_smx:INFO: Total # of broken channels: 1
08:16:55:ST3_smx:INFO: List of broken channels: [4]
08:16:57:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV
08:16:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:57:ST3_smx:INFO: Electrons
08:16:57:ST3_smx:INFO: # loops 0
08:16:58:ST3_smx:INFO: # loops 1
08:17:00:ST3_smx:INFO: # loops 2
08:17:02:ST3_smx:INFO: Total # of broken channels: 0
08:17:02:ST3_smx:INFO: List of broken channels: []
08:17:02:ST3_smx:INFO: Total # of broken channels: 0
08:17:02:ST3_smx:INFO: List of broken channels: []
08:17:03:ST3_smx:INFO: chip: 5-4 44.073563 C 1165.571835 mV
08:17:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:03:ST3_smx:INFO: Electrons
08:17:03:ST3_smx:INFO: # loops 0
08:17:05:ST3_smx:INFO: # loops 1
08:17:06:ST3_smx:INFO: # loops 2
08:17:08:ST3_smx:INFO: Total # of broken channels: 0
08:17:08:ST3_smx:INFO: List of broken channels: []
08:17:08:ST3_smx:INFO: Total # of broken channels: 0
08:17:08:ST3_smx:INFO: List of broken channels: []
08:17:10:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
08:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:10:ST3_smx:INFO: Electrons
08:17:10:ST3_smx:INFO: # loops 0
08:17:11:ST3_smx:INFO: # loops 1
08:17:13:ST3_smx:INFO: # loops 2
08:17:14:ST3_smx:INFO: Total # of broken channels: 0
08:17:14:ST3_smx:INFO: List of broken channels: []
08:17:14:ST3_smx:INFO: Total # of broken channels: 0
08:17:14:ST3_smx:INFO: List of broken channels: []
08:17:16:ST3_smx:INFO: chip: 7-6 34.556970 C 1189.190035 mV
08:17:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:16:ST3_smx:INFO: Electrons
08:17:16:ST3_smx:INFO: # loops 0
08:17:18:ST3_smx:INFO: # loops 1
08:17:19:ST3_smx:INFO: # loops 2
08:17:21:ST3_smx:INFO: Total # of broken channels: 0
08:17:21:ST3_smx:INFO: List of broken channels: []
08:17:21:ST3_smx:INFO: Total # of broken channels: 0
08:17:21:ST3_smx:INFO: List of broken channels: []
08:17:22:ST3_smx:INFO: chip: 14-7 21.902970 C 1218.600960 mV
08:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:22:ST3_smx:INFO: Electrons
08:17:22:ST3_smx:INFO: # loops 0
08:17:24:ST3_smx:INFO: # loops 1
08:17:25:ST3_smx:INFO: # loops 2
08:17:27:ST3_smx:INFO: Total # of broken channels: 0
08:17:27:ST3_smx:INFO: List of broken channels: []
08:17:27:ST3_smx:INFO: Total # of broken channels: 0
08:17:27:ST3_smx:INFO: List of broken channels: []
08:17:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:17:27:febtest:INFO: 01-00 | XA-000-09-004-036-011-027-13 | 44.1 | 1183.3
08:17:28:febtest:INFO: 08-01 | XA-000-09-004-036-009-002-09 | 44.1 | 1177.4
08:17:28:febtest:INFO: 03-02 | XA-000-09-004-036-008-027-03 | 47.3 | 1171.5
08:17:28:febtest:INFO: 10-03 | XA-000-09-004-036-014-026-06 | 40.9 | 1183.3
08:17:28:febtest:INFO: 05-04 | XA-000-09-004-036-012-002-02 | 44.1 | 1183.3
08:17:29:febtest:INFO: 12-05 | XA-000-09-004-036-008-026-03 | 34.6 | 1224.5
08:17:29:febtest:INFO: 07-06 | XA-000-09-004-036-008-025-03 | 34.6 | 1212.7
08:17:29:febtest:INFO: 14-07 | XA-000-09-004-036-011-025-13 | 21.9 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_21-08_16_08
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3300| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '1.5010', '1.850', '2.5630', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9620', '1.850', '2.3130', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9520', '1.850', '0.5108', '0.000', '0.0000', '0.000', '0.0000']