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FEB_3301 21.11.25 08:32:18
Info
08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:18:ST3_Shared:INFO: FEB-Microcable
08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:18:febtest:INFO: Testing FEB with SN 3301
08:32:20:smx_tester:INFO: Scanning setup
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:setup_element:INFO: Scanning clock phase
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:21:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:32:21:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
08:32:21:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
08:32:21:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:32:21:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXX____________
Clock Delay: 25
08:32:21:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXX____________
Clock Delay: 25
08:32:21:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
08:32:21:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
08:32:21:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
08:32:21:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
08:32:21:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
08:32:21:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
08:32:21:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
08:32:21:setup_element:INFO: Scanning data phases
08:32:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:26:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:32:26:setup_element:INFO: Eye window for uplink 0 : __________________XXXXXXXXXXX___________
Data delay found: 3
08:32:26:setup_element:INFO: Eye window for uplink 1 : ______________XXXXXXXXXXXX______________
Data delay found: 39
08:32:26:setup_element:INFO: Eye window for uplink 2 : __________XXXXXXXXXX____________________
Data delay found: 34
08:32:26:setup_element:INFO: Eye window for uplink 3 : _________XXXXXXXXXX_____________________
Data delay found: 33
08:32:26:setup_element:INFO: Eye window for uplink 4 : ________X_XXXXXXXXX_____________________
Data delay found: 33
08:32:26:setup_element:INFO: Eye window for uplink 5 : __________XXXXXXXX______________________
Data delay found: 33
08:32:26:setup_element:INFO: Eye window for uplink 6 : _____XXXXXXXX___________________________
Data delay found: 28
08:32:26:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXX___________________________X
Data delay found: 25
08:32:26:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXXXXX____
Data delay found: 11
08:32:26:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXXXX_
Data delay found: 14
08:32:26:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
08:32:26:setup_element:INFO: Eye window for uplink 11: X________________________________XXXXXXX
Data delay found: 16
08:32:26:setup_element:INFO: Eye window for uplink 12: XXX_______________________________XXXXXX
Data delay found: 18
08:32:26:setup_element:INFO: Eye window for uplink 13: XXX________________________________XXXXX
Data delay found: 18
08:32:26:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXXXX_
Data delay found: 14
08:32:26:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXXXXX
Data delay found: 15
08:32:26:setup_element:INFO: Setting the data phase to 3 for uplink 0
08:32:26:setup_element:INFO: Setting the data phase to 39 for uplink 1
08:32:26:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:32:26:setup_element:INFO: Setting the data phase to 33 for uplink 3
08:32:26:setup_element:INFO: Setting the data phase to 33 for uplink 4
08:32:26:setup_element:INFO: Setting the data phase to 33 for uplink 5
08:32:26:setup_element:INFO: Setting the data phase to 28 for uplink 6
08:32:26:setup_element:INFO: Setting the data phase to 25 for uplink 7
08:32:26:setup_element:INFO: Setting the data phase to 11 for uplink 8
08:32:26:setup_element:INFO: Setting the data phase to 14 for uplink 9
08:32:26:setup_element:INFO: Setting the data phase to 14 for uplink 10
08:32:26:setup_element:INFO: Setting the data phase to 16 for uplink 11
08:32:26:setup_element:INFO: Setting the data phase to 18 for uplink 12
08:32:26:setup_element:INFO: Setting the data phase to 18 for uplink 13
08:32:26:setup_element:INFO: Setting the data phase to 14 for uplink 14
08:32:26:setup_element:INFO: Setting the data phase to 15 for uplink 15
08:32:26:setup_element:INFO: Beginning SMX ASICs map scan
08:32:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:32:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:32:26:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:32:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:32:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:32:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:32:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:32:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:32:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:32:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:32:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:32:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:32:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:32:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:32:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:32:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:32:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:32:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:32:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:32:29:setup_element:INFO: Performing Elink synchronization
08:32:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:32:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:32:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:32:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:32:29:febtest:INFO: Init all SMX (CSA): 30
08:32:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:32:43:febtest:INFO: 01-00 | XA-000-09-004-036-009-003-09 | 31.4 | 1201.0
08:32:44:febtest:INFO: 08-01 | XA-000-09-004-036-005-018-04 | 56.8 | 1112.1
08:32:44:febtest:INFO: 03-02 | XA-000-09-004-036-012-003-02 | 40.9 | 1171.5
08:32:44:febtest:INFO: 10-03 | XA-000-09-004-036-008-018-03 | 40.9 | 1165.6
08:32:44:febtest:INFO: 05-04 | XA-000-09-004-036-015-004-12 | 44.1 | 1165.6
08:32:45:febtest:INFO: 12-05 | XA-000-09-004-036-011-017-13 | 40.9 | 1171.5
08:32:45:febtest:INFO: 07-06 | XA-000-09-004-036-009-004-09 | 37.7 | 1183.3
08:32:45:febtest:INFO: 14-07 | XA-000-09-004-036-014-018-06 | 25.1 | 1218.6
08:32:46:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:32:48:ST3_smx:INFO: chip: 1-0 31.389742 C 1218.600960 mV
08:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:48:ST3_smx:INFO: Electrons
08:32:48:ST3_smx:INFO: # loops 0
08:32:50:ST3_smx:INFO: # loops 1
08:32:52:ST3_smx:INFO: # loops 2
08:32:54:ST3_smx:INFO: Total # of broken channels: 0
08:32:54:ST3_smx:INFO: List of broken channels: []
08:32:54:ST3_smx:INFO: Total # of broken channels: 0
08:32:54:ST3_smx:INFO: List of broken channels: []
08:32:55:ST3_smx:INFO: chip: 8-1 59.984250 C 1129.995435 mV
08:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:55:ST3_smx:INFO: Electrons
08:32:55:ST3_smx:INFO: # loops 0
08:32:57:ST3_smx:INFO: # loops 1
08:32:59:ST3_smx:INFO: # loops 2
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:02:ST3_smx:INFO: chip: 3-2 44.073563 C 1183.292940 mV
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_smx:INFO: Electrons
08:33:02:ST3_smx:INFO: # loops 0
08:33:04:ST3_smx:INFO: # loops 1
08:33:05:ST3_smx:INFO: # loops 2
08:33:07:ST3_smx:INFO: Total # of broken channels: 0
08:33:07:ST3_smx:INFO: List of broken channels: []
08:33:07:ST3_smx:INFO: Total # of broken channels: 0
08:33:07:ST3_smx:INFO: List of broken channels: []
08:33:08:ST3_smx:INFO: chip: 10-3 44.073563 C 1183.292940 mV
08:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:08:ST3_smx:INFO: Electrons
08:33:08:ST3_smx:INFO: # loops 0
08:33:10:ST3_smx:INFO: # loops 1
08:33:12:ST3_smx:INFO: # loops 2
08:33:14:ST3_smx:INFO: Total # of broken channels: 0
08:33:14:ST3_smx:INFO: List of broken channels: []
08:33:14:ST3_smx:INFO: Total # of broken channels: 0
08:33:14:ST3_smx:INFO: List of broken channels: []
08:33:15:ST3_smx:INFO: chip: 5-4 44.073563 C 1177.390875 mV
08:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:15:ST3_smx:INFO: Electrons
08:33:15:ST3_smx:INFO: # loops 0
08:33:17:ST3_smx:INFO: # loops 1
08:33:19:ST3_smx:INFO: # loops 2
08:33:21:ST3_smx:INFO: Total # of broken channels: 0
08:33:21:ST3_smx:INFO: List of broken channels: []
08:33:21:ST3_smx:INFO: Total # of broken channels: 1
08:33:21:ST3_smx:INFO: List of broken channels: [30]
08:33:22:ST3_smx:INFO: chip: 12-5 40.898880 C 1183.292940 mV
08:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:22:ST3_smx:INFO: Electrons
08:33:22:ST3_smx:INFO: # loops 0
08:33:24:ST3_smx:INFO: # loops 1
08:33:26:ST3_smx:INFO: # loops 2
08:33:28:ST3_smx:INFO: Total # of broken channels: 0
08:33:28:ST3_smx:INFO: List of broken channels: []
08:33:28:ST3_smx:INFO: Total # of broken channels: 0
08:33:28:ST3_smx:INFO: List of broken channels: []
08:33:29:ST3_smx:INFO: chip: 7-6 37.726682 C 1195.082160 mV
08:33:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:29:ST3_smx:INFO: Electrons
08:33:29:ST3_smx:INFO: # loops 0
08:33:31:ST3_smx:INFO: # loops 1
08:33:33:ST3_smx:INFO: # loops 2
08:33:34:ST3_smx:INFO: Total # of broken channels: 0
08:33:34:ST3_smx:INFO: List of broken channels: []
08:33:34:ST3_smx:INFO: Total # of broken channels: 0
08:33:34:ST3_smx:INFO: List of broken channels: []
08:33:36:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV
08:33:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:36:ST3_smx:INFO: Electrons
08:33:36:ST3_smx:INFO: # loops 0
08:33:37:ST3_smx:INFO: # loops 1
08:33:39:ST3_smx:INFO: # loops 2
08:33:41:ST3_smx:INFO: Total # of broken channels: 0
08:33:41:ST3_smx:INFO: List of broken channels: []
08:33:41:ST3_smx:INFO: Total # of broken channels: 0
08:33:41:ST3_smx:INFO: List of broken channels: []
08:33:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:41:febtest:INFO: 01-00 | XA-000-09-004-036-009-003-09 | 34.6 | 1236.2
08:33:41:febtest:INFO: 08-01 | XA-000-09-004-036-005-018-04 | 60.0 | 1147.8
08:33:42:febtest:INFO: 03-02 | XA-000-09-004-036-012-003-02 | 47.3 | 1206.9
08:33:42:febtest:INFO: 10-03 | XA-000-09-004-036-008-018-03 | 47.3 | 1206.9
08:33:42:febtest:INFO: 05-04 | XA-000-09-004-036-015-004-12 | 47.3 | 1201.0
08:33:42:febtest:INFO: 12-05 | XA-000-09-004-036-011-017-13 | 44.1 | 1206.9
08:33:42:febtest:INFO: 07-06 | XA-000-09-004-036-009-004-09 | 40.9 | 1218.6
08:33:43:febtest:INFO: 14-07 | XA-000-09-004-036-014-018-06 | 28.2 | 1259.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_21-08_32_18
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3301| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4620', '1.850', '2.3210', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9920', '1.850', '2.4330', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5226', '0.000', '0.0000', '0.000', '0.0000']