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FEB_3303 24.11.25 11:21:47
Info
11:21:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:47:ST3_Shared:INFO: FEB-Microcable
11:21:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:47:febtest:INFO: Testing FEB with SN 3303
11:21:49:smx_tester:INFO: Scanning setup
11:21:49:elinks:INFO: Disabling clock on downlink 0
11:21:49:elinks:INFO: Disabling clock on downlink 1
11:21:49:elinks:INFO: Disabling clock on downlink 2
11:21:49:elinks:INFO: Disabling clock on downlink 3
11:21:49:elinks:INFO: Disabling clock on downlink 4
11:21:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:21:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:49:elinks:INFO: Disabling clock on downlink 0
11:21:49:elinks:INFO: Disabling clock on downlink 1
11:21:49:elinks:INFO: Disabling clock on downlink 2
11:21:49:elinks:INFO: Disabling clock on downlink 3
11:21:49:elinks:INFO: Disabling clock on downlink 4
11:21:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:21:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:21:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:49:elinks:INFO: Disabling clock on downlink 0
11:21:49:elinks:INFO: Disabling clock on downlink 1
11:21:49:elinks:INFO: Disabling clock on downlink 2
11:21:49:elinks:INFO: Disabling clock on downlink 3
11:21:49:elinks:INFO: Disabling clock on downlink 4
11:21:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:49:elinks:INFO: Disabling clock on downlink 0
11:21:49:elinks:INFO: Disabling clock on downlink 1
11:21:49:elinks:INFO: Disabling clock on downlink 2
11:21:49:elinks:INFO: Disabling clock on downlink 3
11:21:49:elinks:INFO: Disabling clock on downlink 4
11:21:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:21:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:49:elinks:INFO: Disabling clock on downlink 0
11:21:49:elinks:INFO: Disabling clock on downlink 1
11:21:49:elinks:INFO: Disabling clock on downlink 2
11:21:49:elinks:INFO: Disabling clock on downlink 3
11:21:49:elinks:INFO: Disabling clock on downlink 4
11:21:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:21:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:49:setup_element:INFO: Scanning clock phase
11:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:21:50:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________XXXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
11:21:50:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
11:21:50:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
11:21:50:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
11:21:50:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
11:21:50:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________XXXXX_____________
Clock Delay: 24
11:21:50:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________XXXXX_____________
Clock Delay: 24
11:21:50:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
11:21:50:setup_element:INFO: Scanning data phases
11:21:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:55:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:21:55:setup_element:INFO: Eye window for uplink 0 : _____________________XXXXXXXXXX_________
Data delay found: 5
11:21:55:setup_element:INFO: Eye window for uplink 1 : _________________XXXXXXXXXXX____________
Data delay found: 2
11:21:55:setup_element:INFO: Eye window for uplink 2 : __________XXXXXXXXX_____________________
Data delay found: 34
11:21:55:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXX_______________________
Data delay found: 33
11:21:55:setup_element:INFO: Eye window for uplink 4 : _______XXXXXXXX_________________________
Data delay found: 30
11:21:55:setup_element:INFO: Eye window for uplink 5 : ______XXXXXXXXX_________________________
Data delay found: 30
11:21:55:setup_element:INFO: Eye window for uplink 6 : __XXXXXXXXX_____________________________
Data delay found: 26
11:21:55:setup_element:INFO: Eye window for uplink 7 : _XXXXXXXXX______________________________
Data delay found: 25
11:21:55:setup_element:INFO: Eye window for uplink 8 : ______________________________X_XXXXXXX_
Data delay found: 14
11:21:55:setup_element:INFO: Eye window for uplink 9 : X_________________________________XXXXXX
Data delay found: 17
11:21:55:setup_element:INFO: Eye window for uplink 10: XXXXX_____________________________XXXXXX
Data delay found: 19
11:21:55:setup_element:INFO: Eye window for uplink 11: XXXXXX________________________________XX
Data delay found: 21
11:21:55:setup_element:INFO: Eye window for uplink 12: X_______________________________XXXXXXXX
Data delay found: 16
11:21:55:setup_element:INFO: Eye window for uplink 13: X_______________________________X_XXXXXX
Data delay found: 16
11:21:55:setup_element:INFO: Eye window for uplink 14: XX________________________________XXXXXX
Data delay found: 17
11:21:55:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
11:21:55:setup_element:INFO: Setting the data phase to 5 for uplink 0
11:21:55:setup_element:INFO: Setting the data phase to 2 for uplink 1
11:21:55:setup_element:INFO: Setting the data phase to 34 for uplink 2
11:21:55:setup_element:INFO: Setting the data phase to 33 for uplink 3
11:21:55:setup_element:INFO: Setting the data phase to 30 for uplink 4
11:21:55:setup_element:INFO: Setting the data phase to 30 for uplink 5
11:21:55:setup_element:INFO: Setting the data phase to 26 for uplink 6
11:21:55:setup_element:INFO: Setting the data phase to 25 for uplink 7
11:21:55:setup_element:INFO: Setting the data phase to 14 for uplink 8
11:21:55:setup_element:INFO: Setting the data phase to 17 for uplink 9
11:21:55:setup_element:INFO: Setting the data phase to 19 for uplink 10
11:21:55:setup_element:INFO: Setting the data phase to 21 for uplink 11
11:21:55:setup_element:INFO: Setting the data phase to 16 for uplink 12
11:21:55:setup_element:INFO: Setting the data phase to 16 for uplink 13
11:21:55:setup_element:INFO: Setting the data phase to 17 for uplink 14
11:21:55:setup_element:INFO: Setting the data phase to 18 for uplink 15
11:21:55:setup_element:INFO: Beginning SMX ASICs map scan
11:21:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:21:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:21:55:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:21:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:21:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:21:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:21:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:21:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:21:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:21:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:21:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:21:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:21:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:21:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:21:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:21:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:21:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:21:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:21:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:21:58:setup_element:INFO: Performing Elink synchronization
11:21:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:21:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:21:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:21:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:21:58:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:21:59:febtest:INFO: Init all SMX (CSA): 30
11:22:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:15:febtest:INFO: 01-00 | XA-000-09-004-026-017-021-11 | 25.1 | 1212.7
11:22:16:febtest:INFO: 08-01 | XA-000-09-004-036-014-011-01 | 47.3 | 1147.8
11:22:16:febtest:INFO: 03-02 | XA-000-09-004-026-014-021-03 | 31.4 | 1201.0
11:22:16:febtest:INFO: 10-03 | XA-000-09-004-036-017-011-09 | 34.6 | 1189.2
11:22:16:febtest:INFO: 05-04 | XA-000-09-004-026-011-021-08 | 47.3 | 1130.0
11:22:17:febtest:INFO: 12-05 | XA-000-09-004-036-005-009-03 | 34.6 | 1177.4
11:22:17:febtest:INFO: 07-06 | XA-000-09-004-026-008-021-06 | 31.4 | 1195.1
11:22:17:febtest:INFO: 14-07 | XA-000-09-004-036-011-011-10 | 37.7 | 1171.5
11:22:18:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:22:20:ST3_smx:INFO: chip: 1-0 25.062742 C 1224.468235 mV
11:22:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:20:ST3_smx:INFO: Electrons
11:22:20:ST3_smx:INFO: # loops 0
11:22:22:ST3_smx:INFO: # loops 1
11:22:24:ST3_smx:INFO: # loops 2
11:22:26:ST3_smx:INFO: Total # of broken channels: 0
11:22:26:ST3_smx:INFO: List of broken channels: []
11:22:26:ST3_smx:INFO: Total # of broken channels: 0
11:22:26:ST3_smx:INFO: List of broken channels: []
11:22:28:ST3_smx:INFO: chip: 8-1 47.250730 C 1159.654860 mV
11:22:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:28:ST3_smx:INFO: Electrons
11:22:28:ST3_smx:INFO: # loops 0
11:22:30:ST3_smx:INFO: # loops 1
11:22:32:ST3_smx:INFO: # loops 2
11:22:34:ST3_smx:INFO: Total # of broken channels: 0
11:22:34:ST3_smx:INFO: List of broken channels: []
11:22:34:ST3_smx:INFO: Total # of broken channels: 0
11:22:35:ST3_smx:INFO: List of broken channels: []
11:22:36:ST3_smx:INFO: chip: 3-2 31.389742 C 1212.728715 mV
11:22:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:36:ST3_smx:INFO: Electrons
11:22:36:ST3_smx:INFO: # loops 0
11:22:38:ST3_smx:INFO: # loops 1
11:22:40:ST3_smx:INFO: # loops 2
11:22:42:ST3_smx:INFO: Total # of broken channels: 0
11:22:42:ST3_smx:INFO: List of broken channels: []
11:22:42:ST3_smx:INFO: Total # of broken channels: 0
11:22:42:ST3_smx:INFO: List of broken channels: []
11:22:44:ST3_smx:INFO: chip: 10-3 34.556970 C 1206.851500 mV
11:22:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:44:ST3_smx:INFO: Electrons
11:22:44:ST3_smx:INFO: # loops 0
11:22:46:ST3_smx:INFO: # loops 1
11:22:48:ST3_smx:INFO: # loops 2
11:22:50:ST3_smx:INFO: Total # of broken channels: 0
11:22:50:ST3_smx:INFO: List of broken channels: []
11:22:50:ST3_smx:INFO: Total # of broken channels: 0
11:22:50:ST3_smx:INFO: List of broken channels: []
11:22:51:ST3_smx:INFO: chip: 5-4 50.430383 C 1147.806000 mV
11:22:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:51:ST3_smx:INFO: Electrons
11:22:51:ST3_smx:INFO: # loops 0
11:22:53:ST3_smx:INFO: # loops 1
11:22:55:ST3_smx:INFO: # loops 2
11:22:57:ST3_smx:INFO: Total # of broken channels: 0
11:22:57:ST3_smx:INFO: List of broken channels: []
11:22:57:ST3_smx:INFO: Total # of broken channels: 0
11:22:57:ST3_smx:INFO: List of broken channels: []
11:22:59:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
11:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:59:ST3_smx:INFO: Electrons
11:22:59:ST3_smx:INFO: # loops 0
11:23:01:ST3_smx:INFO: # loops 1
11:23:03:ST3_smx:INFO: # loops 2
11:23:05:ST3_smx:INFO: Total # of broken channels: 0
11:23:05:ST3_smx:INFO: List of broken channels: []
11:23:05:ST3_smx:INFO: Total # of broken channels: 0
11:23:05:ST3_smx:INFO: List of broken channels: []
11:23:06:ST3_smx:INFO: chip: 7-6 34.556970 C 1206.851500 mV
11:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:06:ST3_smx:INFO: Electrons
11:23:06:ST3_smx:INFO: # loops 0
11:23:08:ST3_smx:INFO: # loops 1
11:23:10:ST3_smx:INFO: # loops 2
11:23:12:ST3_smx:INFO: Total # of broken channels: 0
11:23:12:ST3_smx:INFO: List of broken channels: []
11:23:12:ST3_smx:INFO: Total # of broken channels: 0
11:23:12:ST3_smx:INFO: List of broken channels: []
11:23:14:ST3_smx:INFO: chip: 14-7 40.898880 C 1183.292940 mV
11:23:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:14:ST3_smx:INFO: Electrons
11:23:14:ST3_smx:INFO: # loops 0
11:23:16:ST3_smx:INFO: # loops 1
11:23:18:ST3_smx:INFO: # loops 2
11:23:20:ST3_smx:INFO: Total # of broken channels: 0
11:23:20:ST3_smx:INFO: List of broken channels: []
11:23:20:ST3_smx:INFO: Total # of broken channels: 0
11:23:20:ST3_smx:INFO: List of broken channels: []
11:23:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:23:21:febtest:INFO: 01-00 | XA-000-09-004-026-017-021-11 | 28.2 | 1247.9
11:23:21:febtest:INFO: 08-01 | XA-000-09-004-036-014-011-01 | 50.4 | 1183.3
11:23:21:febtest:INFO: 03-02 | XA-000-09-004-026-014-021-03 | 34.6 | 1230.3
11:23:21:febtest:INFO: 10-03 | XA-000-09-004-036-017-011-09 | 37.7 | 1224.5
11:23:22:febtest:INFO: 05-04 | XA-000-09-004-026-011-021-08 | 53.6 | 1165.6
11:23:22:febtest:INFO: 12-05 | XA-000-09-004-036-005-009-03 | 40.9 | 1212.7
11:23:22:febtest:INFO: 07-06 | XA-000-09-004-026-008-021-06 | 34.6 | 1224.5
11:23:22:febtest:INFO: 14-07 | XA-000-09-004-036-011-011-10 | 44.1 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_24-11_21_47
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5050', '1.850', '2.4940', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '2.4460', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5201', '0.000', '0.0000', '0.000', '0.0000']