DTL-STS tests database

FEB_3303 02.12.25 09:45:36

link: XA-000-09-004-036-014-011-01
...SMX_1.root
link: XA-000-09-004-036-017-011-09
...SMX_3.root
link: XA-000-09-004-036-005-009-03
...SMX_5.root
link: XA-000-09-004-036-011-011-10
...SMX_7.root
link: XA-000-09-004-026-017-021-11
...SMX_0.root
link: XA-000-09-004-026-014-021-03
...SMX_2.root
link: XA-000-09-004-026-011-021-08
...SMX_4.root
link: XA-000-09-004-026-008-021-06
...SMX_6.root
link: XA-000-09-004-026-008-021-06
...VddmCSAstatus.root
Info
            09:45:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:36:ST3_Shared:INFO:	                         FEB-Sensor                         
09:45:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:51:ST3_ModuleSelector:INFO:	L2UL201028 M2UL2B4010284A2 62 B

09:45:51:ST3_ModuleSelector:INFO:	10373

09:45:51:febtest:INFO:	Testing FEB with SN 3303
09:45:52:smx_tester:INFO:	Scanning setup
09:45:52:elinks:INFO:	Disabling clock on downlink 0
09:45:52:elinks:INFO:	Disabling clock on downlink 1
09:45:52:elinks:INFO:	Disabling clock on downlink 2
09:45:52:elinks:INFO:	Disabling clock on downlink 3
09:45:52:elinks:INFO:	Disabling clock on downlink 4
09:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:52:elinks:INFO:	Disabling clock on downlink 0
09:45:52:elinks:INFO:	Disabling clock on downlink 1
09:45:52:elinks:INFO:	Disabling clock on downlink 2
09:45:52:elinks:INFO:	Disabling clock on downlink 3
09:45:52:elinks:INFO:	Disabling clock on downlink 4
09:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:45:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:45:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:53:elinks:INFO:	Disabling clock on downlink 0
09:45:53:elinks:INFO:	Disabling clock on downlink 1
09:45:53:elinks:INFO:	Disabling clock on downlink 2
09:45:53:elinks:INFO:	Disabling clock on downlink 3
09:45:53:elinks:INFO:	Disabling clock on downlink 4
09:45:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:53:elinks:INFO:	Disabling clock on downlink 0
09:45:53:elinks:INFO:	Disabling clock on downlink 1
09:45:53:elinks:INFO:	Disabling clock on downlink 2
09:45:53:elinks:INFO:	Disabling clock on downlink 3
09:45:53:elinks:INFO:	Disabling clock on downlink 4
09:45:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:45:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:53:elinks:INFO:	Disabling clock on downlink 0
09:45:53:elinks:INFO:	Disabling clock on downlink 1
09:45:53:elinks:INFO:	Disabling clock on downlink 2
09:45:53:elinks:INFO:	Disabling clock on downlink 3
09:45:53:elinks:INFO:	Disabling clock on downlink 4
09:45:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:45:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:53:setup_element:INFO:	Scanning clock phase
09:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:45:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:53:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:45:53:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:45:53:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:45:53:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
09:45:53:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
09:45:53:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
09:45:53:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
09:45:53:setup_element:INFO:	Setting the clock phase to 25 for group 0, downlink 1
09:45:53:setup_element:INFO:	Scanning data phases
09:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:45:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:59:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:45:59:setup_element:INFO:	Eye window for uplink 0 : ______________________XXXXXXXXXXX_______
Data delay found: 7
09:45:59:setup_element:INFO:	Eye window for uplink 1 : __________________XXXXXXXXXXXX__________
Data delay found: 3
09:45:59:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXXXX_____________________
Data delay found: 35
09:45:59:setup_element:INFO:	Eye window for uplink 3 : ___________XXXXXXX______________________
Data delay found: 34
09:45:59:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXXXXX_________________________
Data delay found: 30
09:45:59:setup_element:INFO:	Eye window for uplink 5 : _____XXXXXXXXXX_________________________
Data delay found: 29
09:45:59:setup_element:INFO:	Eye window for uplink 6 : ____XXXXXXX_____________________________
Data delay found: 27
09:45:59:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXX___________________________XX
Data delay found: 24
09:45:59:setup_element:INFO:	Eye window for uplink 8 : ________________________________XXXXXXX_
Data delay found: 15
09:45:59:setup_element:INFO:	Eye window for uplink 9 : XX_______________________________XXXXXXX
Data delay found: 17
09:45:59:setup_element:INFO:	Eye window for uplink 10: XXXXX_______________________________XXXX
Data delay found: 20
09:45:59:setup_element:INFO:	Eye window for uplink 11: XXXXXXX_______________________________XX
Data delay found: 22
09:45:59:setup_element:INFO:	Eye window for uplink 12: XX________________________________XXXXXX
Data delay found: 17
09:45:59:setup_element:INFO:	Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
09:45:59:setup_element:INFO:	Eye window for uplink 14: XX_________________________________XXXXX
Data delay found: 18
09:45:59:setup_element:INFO:	Eye window for uplink 15: XXX_______________________________XXXXXX
Data delay found: 18
09:45:59:setup_element:INFO:	Setting the data phase to 7 for uplink 0
09:45:59:setup_element:INFO:	Setting the data phase to 3 for uplink 1
09:45:59:setup_element:INFO:	Setting the data phase to 35 for uplink 2
09:45:59:setup_element:INFO:	Setting the data phase to 34 for uplink 3
09:45:59:setup_element:INFO:	Setting the data phase to 30 for uplink 4
09:45:59:setup_element:INFO:	Setting the data phase to 29 for uplink 5
09:45:59:setup_element:INFO:	Setting the data phase to 27 for uplink 6
09:45:59:setup_element:INFO:	Setting the data phase to 24 for uplink 7
09:45:59:setup_element:INFO:	Setting the data phase to 15 for uplink 8
09:45:59:setup_element:INFO:	Setting the data phase to 17 for uplink 9
09:45:59:setup_element:INFO:	Setting the data phase to 20 for uplink 10
09:45:59:setup_element:INFO:	Setting the data phase to 22 for uplink 11
09:45:59:setup_element:INFO:	Setting the data phase to 17 for uplink 12
09:45:59:setup_element:INFO:	Setting the data phase to 18 for uplink 13
09:45:59:setup_element:INFO:	Setting the data phase to 18 for uplink 14
09:45:59:setup_element:INFO:	Setting the data phase to 18 for uplink 15
09:45:59:setup_element:INFO:	Beginning SMX ASICs map scan
09:45:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:45:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:45:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:45:59:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:45:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:45:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:45:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:45:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:45:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:45:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:45:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:45:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:45:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:46:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:46:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:46:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:46:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:46:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:46:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:46:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:46:01:setup_element:INFO:	Performing Elink synchronization
09:46:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:46:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:46:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:46:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:46:01:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:46:01:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:46:02:febtest:INFO:	Init all SMX (CSA): 30
09:46:19:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:46:19:febtest:INFO:	01-00 | XA-000-09-004-026-017-021-11 |  15.6 | 1218.6
09:46:19:febtest:INFO:	08-01 | XA-000-09-004-036-014-011-01 |  37.7 | 1147.8
09:46:20:febtest:INFO:	03-02 | XA-000-09-004-026-014-021-03 |  21.9 | 1206.9
09:46:20:febtest:INFO:	10-03 | XA-000-09-004-036-017-011-09 |  25.1 | 1189.2
09:46:20:febtest:INFO:	05-04 | XA-000-09-004-026-011-021-08 |  40.9 | 1135.9
09:46:20:febtest:INFO:	12-05 | XA-000-09-004-036-005-009-03 |  28.2 | 1183.3
09:46:20:febtest:INFO:	07-06 | XA-000-09-004-026-008-021-06 |  25.1 | 1201.0
09:46:21:febtest:INFO:	14-07 | XA-000-09-004-036-011-011-10 |  31.4 | 1177.4
09:46:22:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:46:24:ST3_smx:INFO:	chip: 1-0 	 15.590880 C 	 1236.187875 mV
09:46:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:24:ST3_smx:INFO:		Electrons
09:46:24:ST3_smx:INFO:	# loops 0
09:46:26:ST3_smx:INFO:	# loops 1
09:46:27:ST3_smx:INFO:	# loops 2
09:46:29:ST3_smx:INFO:	Total # of broken channels: 0
09:46:29:ST3_smx:INFO:	List of broken channels: []
09:46:29:ST3_smx:INFO:	Total # of broken channels: 0
09:46:29:ST3_smx:INFO:	List of broken channels: []
09:46:31:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1165.571835 mV
09:46:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:31:ST3_smx:INFO:		Electrons
09:46:31:ST3_smx:INFO:	# loops 0
09:46:33:ST3_smx:INFO:	# loops 1
09:46:35:ST3_smx:INFO:	# loops 2
09:46:37:ST3_smx:INFO:	Total # of broken channels: 0
09:46:37:ST3_smx:INFO:	List of broken channels: []
09:46:37:ST3_smx:INFO:	Total # of broken channels: 0
09:46:37:ST3_smx:INFO:	List of broken channels: []
09:46:39:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1218.600960 mV
09:46:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:39:ST3_smx:INFO:		Electrons
09:46:39:ST3_smx:INFO:	# loops 0
09:46:41:ST3_smx:INFO:	# loops 1
09:46:43:ST3_smx:INFO:	# loops 2
09:46:45:ST3_smx:INFO:	Total # of broken channels: 0
09:46:45:ST3_smx:INFO:	List of broken channels: []
09:46:45:ST3_smx:INFO:	Total # of broken channels: 0
09:46:45:ST3_smx:INFO:	List of broken channels: []
09:46:46:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1206.851500 mV
09:46:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:46:ST3_smx:INFO:		Electrons
09:46:46:ST3_smx:INFO:	# loops 0
09:46:48:ST3_smx:INFO:	# loops 1
09:46:50:ST3_smx:INFO:	# loops 2
09:46:52:ST3_smx:INFO:	Total # of broken channels: 0
09:46:52:ST3_smx:INFO:	List of broken channels: []
09:46:52:ST3_smx:INFO:	Total # of broken channels: 0
09:46:52:ST3_smx:INFO:	List of broken channels: []
09:46:54:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1147.806000 mV
09:46:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:46:54:ST3_smx:INFO:		Electrons
09:46:54:ST3_smx:INFO:	# loops 0
09:46:55:ST3_smx:INFO:	# loops 1
09:46:57:ST3_smx:INFO:	# loops 2
09:46:59:ST3_smx:INFO:	Total # of broken channels: 0
09:46:59:ST3_smx:INFO:	List of broken channels: []
09:46:59:ST3_smx:INFO:	Total # of broken channels: 0
09:46:59:ST3_smx:INFO:	List of broken channels: []
09:47:01:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1195.082160 mV
09:47:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:01:ST3_smx:INFO:		Electrons
09:47:01:ST3_smx:INFO:	# loops 0
09:47:03:ST3_smx:INFO:	# loops 1
09:47:05:ST3_smx:INFO:	# loops 2
09:47:07:ST3_smx:INFO:	Total # of broken channels: 0
09:47:07:ST3_smx:INFO:	List of broken channels: []
09:47:07:ST3_smx:INFO:	Total # of broken channels: 0
09:47:07:ST3_smx:INFO:	List of broken channels: []
09:47:08:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1206.851500 mV
09:47:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:08:ST3_smx:INFO:		Electrons
09:47:08:ST3_smx:INFO:	# loops 0
09:47:10:ST3_smx:INFO:	# loops 1
09:47:12:ST3_smx:INFO:	# loops 2
09:47:14:ST3_smx:INFO:	Total # of broken channels: 0
09:47:14:ST3_smx:INFO:	List of broken channels: []
09:47:14:ST3_smx:INFO:	Total # of broken channels: 0
09:47:14:ST3_smx:INFO:	List of broken channels: []
09:47:16:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1189.190035 mV
09:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:16:ST3_smx:INFO:		Electrons
09:47:16:ST3_smx:INFO:	# loops 0
09:47:18:ST3_smx:INFO:	# loops 1
09:47:20:ST3_smx:INFO:	# loops 2
09:47:22:ST3_smx:INFO:	Total # of broken channels: 0
09:47:22:ST3_smx:INFO:	List of broken channels: []
09:47:22:ST3_smx:INFO:	Total # of broken channels: 0
09:47:22:ST3_smx:INFO:	List of broken channels: []
09:47:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:47:22:febtest:INFO:	01-00 | XA-000-09-004-026-017-021-11 |  18.7 | 1253.7
09:47:23:febtest:INFO:	08-01 | XA-000-09-004-036-014-011-01 |  40.9 | 1183.3
09:47:23:febtest:INFO:	03-02 | XA-000-09-004-026-014-021-03 |  25.1 | 1242.0
09:47:23:febtest:INFO:	10-03 | XA-000-09-004-036-017-011-09 |  28.2 | 1224.5
09:47:23:febtest:INFO:	05-04 | XA-000-09-004-026-011-021-08 |  44.1 | 1165.6
09:47:23:febtest:INFO:	12-05 | XA-000-09-004-036-005-009-03 |  31.4 | 1212.7
09:47:24:febtest:INFO:	07-06 | XA-000-09-004-026-008-021-06 |  28.2 | 1230.3
09:47:24:febtest:INFO:	14-07 | XA-000-09-004-036-011-011-10 |  37.7 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_12_02-09_45_36
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	10373

MODULE_NAME:	L2UL201028 M2UL2B4010284A2 62 B

MODULE_TYPE:	
MODULE_LADDER:	L2UL201028
MODULE_MODULE:	M2UL2B4010284A2
MODULE_SIZE:	62
MODULE_GRADE:	B
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5640', '1.850', '2.3810', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9950', '1.850', '2.3130', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9750', '1.850', '0.5190', '0.000', '0.0000', '0.000', '0.0000']
Comment