Go Back
FEB_3304 24.11.25 14:05:34
Info
14:05:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:34:ST3_Shared:INFO: FEB-Microcable
14:05:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:34:febtest:INFO: Testing FEB with SN 3304
14:05:35:smx_tester:INFO: Scanning setup
14:05:35:elinks:INFO: Disabling clock on downlink 0
14:05:35:elinks:INFO: Disabling clock on downlink 1
14:05:35:elinks:INFO: Disabling clock on downlink 2
14:05:35:elinks:INFO: Disabling clock on downlink 3
14:05:35:elinks:INFO: Disabling clock on downlink 4
14:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:05:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:elinks:INFO: Disabling clock on downlink 0
14:05:36:elinks:INFO: Disabling clock on downlink 1
14:05:36:elinks:INFO: Disabling clock on downlink 2
14:05:36:elinks:INFO: Disabling clock on downlink 3
14:05:36:elinks:INFO: Disabling clock on downlink 4
14:05:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:05:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:36:setup_element:INFO: Scanning clock phase
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:05:36:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:05:36:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:05:36:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
14:05:36:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
14:05:36:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
14:05:36:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
14:05:36:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:05:36:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
14:05:36:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXX_______________
Clock Delay: 22
14:05:36:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXX_______________
Clock Delay: 22
14:05:36:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
14:05:36:setup_element:INFO: Scanning data phases
14:05:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:42:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:05:42:setup_element:INFO: Eye window for uplink 0 : _____________________XXXXXXXXX__________
Data delay found: 5
14:05:42:setup_element:INFO: Eye window for uplink 1 : _________________XXXXXXXXXX_____________
Data delay found: 1
14:05:42:setup_element:INFO: Eye window for uplink 2 : _______________XXXXXXX__________________
Data delay found: 38
14:05:42:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXXXX___________________
Data delay found: 36
14:05:42:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXXX_______________________
Data delay found: 32
14:05:42:setup_element:INFO: Eye window for uplink 5 : ________XXXXXXX_________________________
Data delay found: 31
14:05:42:setup_element:INFO: Eye window for uplink 6 : __XXXXXXXX______________________________
Data delay found: 25
14:05:42:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXX_________________________XXXXX
Data delay found: 22
14:05:42:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXXXXX_
Data delay found: 14
14:05:42:setup_element:INFO: Eye window for uplink 9 : X________________________________XXXXXXX
Data delay found: 16
14:05:42:setup_element:INFO: Eye window for uplink 10: XXX_________________________________XXXX
Data delay found: 19
14:05:42:setup_element:INFO: Eye window for uplink 11: XXXXX________________________________XXX
Data delay found: 20
14:05:42:setup_element:INFO: Eye window for uplink 12: XX________________________________XXXXXX
Data delay found: 17
14:05:42:setup_element:INFO: Eye window for uplink 13: XX________________________________XXXXXX
Data delay found: 17
14:05:42:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXXX_
Data delay found: 15
14:05:42:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXXXX_
Data delay found: 15
14:05:42:setup_element:INFO: Setting the data phase to 5 for uplink 0
14:05:42:setup_element:INFO: Setting the data phase to 1 for uplink 1
14:05:42:setup_element:INFO: Setting the data phase to 38 for uplink 2
14:05:42:setup_element:INFO: Setting the data phase to 36 for uplink 3
14:05:42:setup_element:INFO: Setting the data phase to 32 for uplink 4
14:05:42:setup_element:INFO: Setting the data phase to 31 for uplink 5
14:05:42:setup_element:INFO: Setting the data phase to 25 for uplink 6
14:05:42:setup_element:INFO: Setting the data phase to 22 for uplink 7
14:05:42:setup_element:INFO: Setting the data phase to 14 for uplink 8
14:05:42:setup_element:INFO: Setting the data phase to 16 for uplink 9
14:05:42:setup_element:INFO: Setting the data phase to 19 for uplink 10
14:05:42:setup_element:INFO: Setting the data phase to 20 for uplink 11
14:05:42:setup_element:INFO: Setting the data phase to 17 for uplink 12
14:05:42:setup_element:INFO: Setting the data phase to 17 for uplink 13
14:05:42:setup_element:INFO: Setting the data phase to 15 for uplink 14
14:05:42:setup_element:INFO: Setting the data phase to 15 for uplink 15
14:05:42:setup_element:INFO: Beginning SMX ASICs map scan
14:05:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:05:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:05:42:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:05:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:05:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:05:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:05:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:05:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:05:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:05:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:05:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:05:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:05:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:05:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:05:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:05:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:05:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:05:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:05:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:05:44:setup_element:INFO: Performing Elink synchronization
14:05:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:05:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:05:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:05:45:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:05:45:febtest:INFO: Init all SMX (CSA): 30
14:06:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:03:febtest:INFO: 01-00 | XA-000-09-004-026-011-025-08 | 18.7 | 1206.9
14:06:03:febtest:INFO: 08-01 | XA-000-09-004-026-008-023-06 | 31.4 | 1189.2
14:06:03:febtest:INFO: 03-02 | XA-000-09-004-026-014-025-03 | 28.2 | 1189.2
14:06:04:febtest:INFO: 10-03 | XA-000-09-004-026-005-023-01 | 40.9 | 1141.9
14:06:04:febtest:INFO: 05-04 | XA-000-09-004-026-014-024-03 | 28.2 | 1189.2
14:06:04:febtest:INFO: 12-05 | XA-000-09-004-026-005-024-01 | 37.7 | 1171.5
14:06:04:febtest:INFO: 07-06 | XA-000-09-004-026-011-024-08 | 25.1 | 1201.0
14:06:05:febtest:INFO: 14-07 | XA-000-09-004-026-008-024-06 | 31.4 | 1183.3
14:06:06:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:06:08:ST3_smx:INFO: chip: 1-0 18.745682 C 1224.468235 mV
14:06:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:08:ST3_smx:INFO: Electrons
14:06:08:ST3_smx:INFO: # loops 0
14:06:10:ST3_smx:INFO: # loops 1
14:06:12:ST3_smx:INFO: # loops 2
14:06:14:ST3_smx:INFO: Total # of broken channels: 0
14:06:14:ST3_smx:INFO: List of broken channels: []
14:06:14:ST3_smx:INFO: Total # of broken channels: 0
14:06:14:ST3_smx:INFO: List of broken channels: []
14:06:16:ST3_smx:INFO: chip: 8-1 31.389742 C 1200.969315 mV
14:06:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:16:ST3_smx:INFO: Electrons
14:06:16:ST3_smx:INFO: # loops 0
14:06:18:ST3_smx:INFO: # loops 1
14:06:21:ST3_smx:INFO: # loops 2
14:06:23:ST3_smx:INFO: Total # of broken channels: 0
14:06:23:ST3_smx:INFO: List of broken channels: []
14:06:23:ST3_smx:INFO: Total # of broken channels: 0
14:06:23:ST3_smx:INFO: List of broken channels: []
14:06:25:ST3_smx:INFO: chip: 3-2 28.225000 C 1200.969315 mV
14:06:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:25:ST3_smx:INFO: Electrons
14:06:25:ST3_smx:INFO: # loops 0
14:06:27:ST3_smx:INFO: # loops 1
14:06:29:ST3_smx:INFO: # loops 2
14:06:31:ST3_smx:INFO: Total # of broken channels: 0
14:06:31:ST3_smx:INFO: List of broken channels: []
14:06:31:ST3_smx:INFO: Total # of broken channels: 0
14:06:31:ST3_smx:INFO: List of broken channels: []
14:06:32:ST3_smx:INFO: chip: 10-3 44.073563 C 1159.654860 mV
14:06:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:32:ST3_smx:INFO: Electrons
14:06:32:ST3_smx:INFO: # loops 0
14:06:34:ST3_smx:INFO: # loops 1
14:06:36:ST3_smx:INFO: # loops 2
14:06:38:ST3_smx:INFO: Total # of broken channels: 0
14:06:38:ST3_smx:INFO: List of broken channels: []
14:06:38:ST3_smx:INFO: Total # of broken channels: 0
14:06:38:ST3_smx:INFO: List of broken channels: []
14:06:40:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
14:06:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:40:ST3_smx:INFO: Electrons
14:06:40:ST3_smx:INFO: # loops 0
14:06:42:ST3_smx:INFO: # loops 1
14:06:44:ST3_smx:INFO: # loops 2
14:06:47:ST3_smx:INFO: Total # of broken channels: 0
14:06:47:ST3_smx:INFO: List of broken channels: []
14:06:47:ST3_smx:INFO: Total # of broken channels: 0
14:06:47:ST3_smx:INFO: List of broken channels: []
14:06:48:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV
14:06:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:48:ST3_smx:INFO: Electrons
14:06:48:ST3_smx:INFO: # loops 0
14:06:50:ST3_smx:INFO: # loops 1
14:06:53:ST3_smx:INFO: # loops 2
14:06:55:ST3_smx:INFO: Total # of broken channels: 0
14:06:55:ST3_smx:INFO: List of broken channels: []
14:06:55:ST3_smx:INFO: Total # of broken channels: 0
14:06:55:ST3_smx:INFO: List of broken channels: []
14:06:56:ST3_smx:INFO: chip: 7-6 28.225000 C 1212.728715 mV
14:06:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:56:ST3_smx:INFO: Electrons
14:06:56:ST3_smx:INFO: # loops 0
14:06:58:ST3_smx:INFO: # loops 1
14:07:01:ST3_smx:INFO: # loops 2
14:07:03:ST3_smx:INFO: Total # of broken channels: 0
14:07:03:ST3_smx:INFO: List of broken channels: []
14:07:03:ST3_smx:INFO: Total # of broken channels: 0
14:07:03:ST3_smx:INFO: List of broken channels: []
14:07:04:ST3_smx:INFO: chip: 14-7 34.556970 C 1195.082160 mV
14:07:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:04:ST3_smx:INFO: Electrons
14:07:04:ST3_smx:INFO: # loops 0
14:07:07:ST3_smx:INFO: # loops 1
14:07:09:ST3_smx:INFO: # loops 2
14:07:11:ST3_smx:INFO: Total # of broken channels: 0
14:07:11:ST3_smx:INFO: List of broken channels: []
14:07:11:ST3_smx:INFO: Total # of broken channels: 0
14:07:11:ST3_smx:INFO: List of broken channels: []
14:07:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:07:12:febtest:INFO: 01-00 | XA-000-09-004-026-011-025-08 | 21.9 | 1242.0
14:07:12:febtest:INFO: 08-01 | XA-000-09-004-026-008-023-06 | 34.6 | 1218.6
14:07:12:febtest:INFO: 03-02 | XA-000-09-004-026-014-025-03 | 31.4 | 1224.5
14:07:12:febtest:INFO: 10-03 | XA-000-09-004-026-005-023-01 | 47.3 | 1177.4
14:07:13:febtest:INFO: 05-04 | XA-000-09-004-026-014-024-03 | 31.4 | 1218.6
14:07:13:febtest:INFO: 12-05 | XA-000-09-004-026-005-024-01 | 40.9 | 1201.0
14:07:13:febtest:INFO: 07-06 | XA-000-09-004-026-011-024-08 | 28.2 | 1236.2
14:07:13:febtest:INFO: 14-07 | XA-000-09-004-026-008-024-06 | 37.7 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_24-14_05_34
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3304| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5740', '1.850', '1.9090', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9550', '1.850', '2.4720', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9480', '1.850', '0.5155', '0.000', '0.0000', '0.000', '0.0000']