Go Back
FEB_3305 26.11.25 10:14:07
Info
10:14:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:07:ST3_Shared:INFO: FEB-Microcable
10:14:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:07:febtest:INFO: Testing FEB with SN 3305
10:14:09:smx_tester:INFO: Scanning setup
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:14:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:10:setup_element:INFO: Scanning clock phase
10:14:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:14:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:14:10:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:14:10:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:14:10:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________XXXXXXXX____________
Clock Delay: 23
10:14:10:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________XXXXXXXX____________
Clock Delay: 23
10:14:10:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
10:14:10:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
10:14:10:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________XXXXXXX_____________
Clock Delay: 23
10:14:10:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
10:14:10:setup_element:INFO: Scanning data phases
10:14:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:14:15:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:14:15:setup_element:INFO: Eye window for uplink 0 : _________________XXXXXXXXXXXX___________
Data delay found: 2
10:14:15:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXXXXXXXXX______________
Data delay found: 39
10:14:15:setup_element:INFO: Eye window for uplink 2 : _____________XXXXXXX____________________
Data delay found: 36
10:14:15:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXXX_____________________
Data delay found: 35
10:14:15:setup_element:INFO: Eye window for uplink 4 : ____XXXXXXXXX___________________________
Data delay found: 28
10:14:15:setup_element:INFO: Eye window for uplink 5 : ___XXXXXXXXX____________________________
Data delay found: 27
10:14:15:setup_element:INFO: Eye window for uplink 6 : ___XXXXXXX______________________________
Data delay found: 26
10:14:15:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXX___________________________XXX
Data delay found: 23
10:14:15:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXXX___
Data delay found: 13
10:14:15:setup_element:INFO: Eye window for uplink 9 : X________________________________XXXXXX_
Data delay found: 16
10:14:15:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
10:14:15:setup_element:INFO: Eye window for uplink 11: XXX________________________________XXXXX
Data delay found: 18
10:14:15:setup_element:INFO: Eye window for uplink 12: XXX________________________________XXXXX
Data delay found: 18
10:14:15:setup_element:INFO: Eye window for uplink 13: XXXX________________________________XXXX
Data delay found: 19
10:14:15:setup_element:INFO: Eye window for uplink 14: X________________________________XXXXXXX
Data delay found: 16
10:14:15:setup_element:INFO: Eye window for uplink 15: X________________________________XXXXXXX
Data delay found: 16
10:14:15:setup_element:INFO: Setting the data phase to 2 for uplink 0
10:14:15:setup_element:INFO: Setting the data phase to 39 for uplink 1
10:14:15:setup_element:INFO: Setting the data phase to 36 for uplink 2
10:14:15:setup_element:INFO: Setting the data phase to 35 for uplink 3
10:14:15:setup_element:INFO: Setting the data phase to 28 for uplink 4
10:14:15:setup_element:INFO: Setting the data phase to 27 for uplink 5
10:14:15:setup_element:INFO: Setting the data phase to 26 for uplink 6
10:14:15:setup_element:INFO: Setting the data phase to 23 for uplink 7
10:14:15:setup_element:INFO: Setting the data phase to 13 for uplink 8
10:14:15:setup_element:INFO: Setting the data phase to 16 for uplink 9
10:14:15:setup_element:INFO: Setting the data phase to 17 for uplink 10
10:14:15:setup_element:INFO: Setting the data phase to 18 for uplink 11
10:14:15:setup_element:INFO: Setting the data phase to 18 for uplink 12
10:14:15:setup_element:INFO: Setting the data phase to 19 for uplink 13
10:14:15:setup_element:INFO: Setting the data phase to 16 for uplink 14
10:14:15:setup_element:INFO: Setting the data phase to 16 for uplink 15
10:14:15:setup_element:INFO: Beginning SMX ASICs map scan
10:14:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:14:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:14:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:14:15:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:14:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:14:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:14:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:14:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:14:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:14:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:14:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:14:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:14:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:14:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:14:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:14:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:14:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:14:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:14:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:14:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:14:18:setup_element:INFO: Performing Elink synchronization
10:14:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:14:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:14:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:14:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:14:18:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:14:19:febtest:INFO: Init all SMX (CSA): 30
10:14:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:14:38:febtest:INFO: 01-00 | XA-000-09-004-042-004-015-03 | 31.4 | 1165.6
10:14:38:febtest:INFO: 08-01 | XA-000-09-004-042-013-011-02 | 34.6 | 1165.6
10:14:38:febtest:INFO: 03-02 | XA-000-09-004-042-016-011-09 | 31.4 | 1165.6
10:14:38:febtest:INFO: 10-03 | XA-000-09-004-026-005-009-06 | 28.2 | 1189.2
10:14:38:febtest:INFO: 05-04 | XA-000-09-004-042-013-012-02 | 44.1 | 1130.0
10:14:39:febtest:INFO: 12-05 | XA-000-09-004-042-016-013-09 | 28.2 | 1189.2
10:14:39:febtest:INFO: 07-06 | XA-000-09-004-042-016-012-09 | 18.7 | 1212.7
10:14:39:febtest:INFO: 14-07 | XA-000-09-004-042-010-011-10 | 34.6 | 1165.6
10:14:40:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:14:42:ST3_smx:INFO: chip: 1-0 31.389742 C 1177.390875 mV
10:14:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:42:ST3_smx:INFO: Electrons
10:14:42:ST3_smx:INFO: # loops 0
10:14:44:ST3_smx:INFO: # loops 1
10:14:46:ST3_smx:INFO: # loops 2
10:14:49:ST3_smx:INFO: Total # of broken channels: 0
10:14:49:ST3_smx:INFO: List of broken channels: []
10:14:49:ST3_smx:INFO: Total # of broken channels: 0
10:14:49:ST3_smx:INFO: List of broken channels: []
10:14:51:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV
10:14:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:51:ST3_smx:INFO: Electrons
10:14:51:ST3_smx:INFO: # loops 0
10:14:53:ST3_smx:INFO: # loops 1
10:14:55:ST3_smx:INFO: # loops 2
10:14:57:ST3_smx:INFO: Total # of broken channels: 0
10:14:57:ST3_smx:INFO: List of broken channels: []
10:14:57:ST3_smx:INFO: Total # of broken channels: 0
10:14:57:ST3_smx:INFO: List of broken channels: []
10:14:59:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
10:14:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:59:ST3_smx:INFO: Electrons
10:14:59:ST3_smx:INFO: # loops 0
10:15:01:ST3_smx:INFO: # loops 1
10:15:03:ST3_smx:INFO: # loops 2
10:15:05:ST3_smx:INFO: Total # of broken channels: 0
10:15:05:ST3_smx:INFO: List of broken channels: []
10:15:05:ST3_smx:INFO: Total # of broken channels: 0
10:15:05:ST3_smx:INFO: List of broken channels: []
10:15:07:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV
10:15:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:07:ST3_smx:INFO: Electrons
10:15:07:ST3_smx:INFO: # loops 0
10:15:09:ST3_smx:INFO: # loops 1
10:15:11:ST3_smx:INFO: # loops 2
10:15:13:ST3_smx:INFO: Total # of broken channels: 0
10:15:13:ST3_smx:INFO: List of broken channels: []
10:15:13:ST3_smx:INFO: Total # of broken channels: 0
10:15:13:ST3_smx:INFO: List of broken channels: []
10:15:15:ST3_smx:INFO: chip: 5-4 44.073563 C 1135.937260 mV
10:15:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:15:ST3_smx:INFO: Electrons
10:15:15:ST3_smx:INFO: # loops 0
10:15:17:ST3_smx:INFO: # loops 1
10:15:19:ST3_smx:INFO: # loops 2
10:15:21:ST3_smx:INFO: Total # of broken channels: 0
10:15:21:ST3_smx:INFO: List of broken channels: []
10:15:21:ST3_smx:INFO: Total # of broken channels: 0
10:15:21:ST3_smx:INFO: List of broken channels: []
10:15:22:ST3_smx:INFO: chip: 12-5 28.225000 C 1200.969315 mV
10:15:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:22:ST3_smx:INFO: Electrons
10:15:22:ST3_smx:INFO: # loops 0
10:15:24:ST3_smx:INFO: # loops 1
10:15:26:ST3_smx:INFO: # loops 2
10:15:28:ST3_smx:INFO: Total # of broken channels: 0
10:15:28:ST3_smx:INFO: List of broken channels: []
10:15:28:ST3_smx:INFO: Total # of broken channels: 0
10:15:28:ST3_smx:INFO: List of broken channels: []
10:15:30:ST3_smx:INFO: chip: 7-6 21.902970 C 1224.468235 mV
10:15:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:30:ST3_smx:INFO: Electrons
10:15:30:ST3_smx:INFO: # loops 0
10:15:32:ST3_smx:INFO: # loops 1
10:15:34:ST3_smx:INFO: # loops 2
10:15:36:ST3_smx:INFO: Total # of broken channels: 0
10:15:36:ST3_smx:INFO: List of broken channels: []
10:15:36:ST3_smx:INFO: Total # of broken channels: 0
10:15:36:ST3_smx:INFO: List of broken channels: []
10:15:37:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
10:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:37:ST3_smx:INFO: Electrons
10:15:37:ST3_smx:INFO: # loops 0
10:15:39:ST3_smx:INFO: # loops 1
10:15:41:ST3_smx:INFO: # loops 2
10:15:43:ST3_smx:INFO: Total # of broken channels: 0
10:15:43:ST3_smx:INFO: List of broken channels: []
10:15:43:ST3_smx:INFO: Total # of broken channels: 0
10:15:43:ST3_smx:INFO: List of broken channels: []
10:15:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:15:43:febtest:INFO: 01-00 | XA-000-09-004-042-004-015-03 | 34.6 | 1201.0
10:15:44:febtest:INFO: 08-01 | XA-000-09-004-042-013-011-02 | 37.7 | 1206.9
10:15:44:febtest:INFO: 03-02 | XA-000-09-004-042-016-011-09 | 34.6 | 1195.1
10:15:44:febtest:INFO: 10-03 | XA-000-09-004-026-005-009-06 | 31.4 | 1224.5
10:15:44:febtest:INFO: 05-04 | XA-000-09-004-042-013-012-02 | 47.3 | 1159.7
10:15:45:febtest:INFO: 12-05 | XA-000-09-004-042-016-013-09 | 31.4 | 1230.3
10:15:45:febtest:INFO: 07-06 | XA-000-09-004-042-016-012-09 | 21.9 | 1242.0
10:15:45:febtest:INFO: 14-07 | XA-000-09-004-042-010-011-10 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_26-10_14_07
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3305| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6110', '1.850', '2.3970', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0160', '1.850', '2.3080', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5248', '0.000', '0.0000', '0.000', '0.0000']