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FEB_3306 26.11.25 10:40:30
Info
10:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:30:ST3_Shared:INFO: FEB-Microcable
10:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:30:febtest:INFO: Testing FEB with SN 3306
10:40:31:smx_tester:INFO: Scanning setup
10:40:31:elinks:INFO: Disabling clock on downlink 0
10:40:31:elinks:INFO: Disabling clock on downlink 1
10:40:31:elinks:INFO: Disabling clock on downlink 2
10:40:31:elinks:INFO: Disabling clock on downlink 3
10:40:31:elinks:INFO: Disabling clock on downlink 4
10:40:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:40:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:31:elinks:INFO: Disabling clock on downlink 0
10:40:31:elinks:INFO: Disabling clock on downlink 1
10:40:31:elinks:INFO: Disabling clock on downlink 2
10:40:31:elinks:INFO: Disabling clock on downlink 3
10:40:31:elinks:INFO: Disabling clock on downlink 4
10:40:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:40:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:32:elinks:INFO: Disabling clock on downlink 0
10:40:32:elinks:INFO: Disabling clock on downlink 1
10:40:32:elinks:INFO: Disabling clock on downlink 2
10:40:32:elinks:INFO: Disabling clock on downlink 3
10:40:32:elinks:INFO: Disabling clock on downlink 4
10:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:32:elinks:INFO: Disabling clock on downlink 0
10:40:32:elinks:INFO: Disabling clock on downlink 1
10:40:32:elinks:INFO: Disabling clock on downlink 2
10:40:32:elinks:INFO: Disabling clock on downlink 3
10:40:32:elinks:INFO: Disabling clock on downlink 4
10:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:32:elinks:INFO: Disabling clock on downlink 0
10:40:32:elinks:INFO: Disabling clock on downlink 1
10:40:32:elinks:INFO: Disabling clock on downlink 2
10:40:32:elinks:INFO: Disabling clock on downlink 3
10:40:32:elinks:INFO: Disabling clock on downlink 4
10:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:32:setup_element:INFO: Scanning clock phase
10:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:32:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:40:32:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________XXXXXX________
Clock Delay: 28
10:40:32:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________XXXXXX________
Clock Delay: 28
10:40:32:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:40:32:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:40:32:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________XXXXXXX________
Clock Delay: 28
10:40:32:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________XXXXXXX________
Clock Delay: 28
10:40:32:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
10:40:32:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
10:40:32:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
10:40:32:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
10:40:32:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
10:40:32:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 1
10:40:32:setup_element:INFO: Scanning data phases
10:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:37:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:40:38:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXXXXXXXXX___________
Data delay found: 2
10:40:38:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXXXXXXXXX______________
Data delay found: 39
10:40:38:setup_element:INFO: Eye window for uplink 2 : ______________XXXXXX_X__________________
Data delay found: 37
10:40:38:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXXXXX____________________
Data delay found: 35
10:40:38:setup_element:INFO: Eye window for uplink 4 : ______XXXXXXXXX_________________________
Data delay found: 30
10:40:38:setup_element:INFO: Eye window for uplink 5 : ______XXXXXXXXXX________________________
Data delay found: 30
10:40:38:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXX_____________________________
Data delay found: 25
10:40:38:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXX_________________________XXXX
Data delay found: 23
10:40:38:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXXX___
Data delay found: 13
10:40:38:setup_element:INFO: Eye window for uplink 9 : _______________________________X_XXXXXX_
Data delay found: 14
10:40:38:setup_element:INFO: Eye window for uplink 10: XXX________________________________XXXXX
Data delay found: 18
10:40:38:setup_element:INFO: Eye window for uplink 11: XXXX______________________________XXXXXX
Data delay found: 18
10:40:38:setup_element:INFO: Eye window for uplink 12: XXX_______________________________XXXXXX
Data delay found: 18
10:40:38:setup_element:INFO: Eye window for uplink 13: XXX________________________________XXXXX
Data delay found: 18
10:40:38:setup_element:INFO: Eye window for uplink 14: XX_______________________________XXXXXXX
Data delay found: 17
10:40:38:setup_element:INFO: Eye window for uplink 15: XXX________________________________XXXXX
Data delay found: 18
10:40:38:setup_element:INFO: Setting the data phase to 2 for uplink 0
10:40:38:setup_element:INFO: Setting the data phase to 39 for uplink 1
10:40:38:setup_element:INFO: Setting the data phase to 37 for uplink 2
10:40:38:setup_element:INFO: Setting the data phase to 35 for uplink 3
10:40:38:setup_element:INFO: Setting the data phase to 30 for uplink 4
10:40:38:setup_element:INFO: Setting the data phase to 30 for uplink 5
10:40:38:setup_element:INFO: Setting the data phase to 25 for uplink 6
10:40:38:setup_element:INFO: Setting the data phase to 23 for uplink 7
10:40:38:setup_element:INFO: Setting the data phase to 13 for uplink 8
10:40:38:setup_element:INFO: Setting the data phase to 14 for uplink 9
10:40:38:setup_element:INFO: Setting the data phase to 18 for uplink 10
10:40:38:setup_element:INFO: Setting the data phase to 18 for uplink 11
10:40:38:setup_element:INFO: Setting the data phase to 18 for uplink 12
10:40:38:setup_element:INFO: Setting the data phase to 18 for uplink 13
10:40:38:setup_element:INFO: Setting the data phase to 17 for uplink 14
10:40:38:setup_element:INFO: Setting the data phase to 18 for uplink 15
10:40:38:setup_element:INFO: Beginning SMX ASICs map scan
10:40:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:40:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:40:38:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:40:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:40:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:40:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:40:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:40:40:setup_element:INFO: Performing Elink synchronization
10:40:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:40:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:40:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:40:40:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:40:41:febtest:INFO: Init all SMX (CSA): 30
10:40:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:40:59:febtest:INFO: 01-00 | XA-000-09-004-026-011-027-08 | 40.9 | 1153.7
10:40:59:febtest:INFO: 08-01 | XA-000-09-004-026-008-025-06 | 40.9 | 1147.8
10:41:00:febtest:INFO: 03-02 | XA-000-09-004-026-010-002-02 | 40.9 | 1159.7
10:41:00:febtest:INFO: 10-03 | XA-000-09-004-026-005-025-01 | 47.3 | 1130.0
10:41:00:febtest:INFO: 05-04 | XA-000-09-004-026-013-003-10 | 40.9 | 1165.6
10:41:00:febtest:INFO: 12-05 | XA-000-09-004-026-011-026-08 | 31.4 | 1183.3
10:41:01:febtest:INFO: 07-06 | XA-000-09-004-026-010-003-02 | 34.6 | 1177.4
10:41:01:febtest:INFO: 14-07 | XA-000-09-004-026-014-026-03 | 18.7 | 1212.7
10:41:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:41:04:ST3_smx:INFO: chip: 1-0 40.898880 C 1165.571835 mV
10:41:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:04:ST3_smx:INFO: Electrons
10:41:04:ST3_smx:INFO: # loops 0
10:41:06:ST3_smx:INFO: # loops 1
10:41:08:ST3_smx:INFO: # loops 2
10:41:10:ST3_smx:INFO: Total # of broken channels: 0
10:41:10:ST3_smx:INFO: List of broken channels: []
10:41:10:ST3_smx:INFO: Total # of broken channels: 0
10:41:10:ST3_smx:INFO: List of broken channels: []
10:41:12:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
10:41:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:12:ST3_smx:INFO: Electrons
10:41:12:ST3_smx:INFO: # loops 0
10:41:14:ST3_smx:INFO: # loops 1
10:41:16:ST3_smx:INFO: # loops 2
10:41:18:ST3_smx:INFO: Total # of broken channels: 0
10:41:18:ST3_smx:INFO: List of broken channels: []
10:41:18:ST3_smx:INFO: Total # of broken channels: 0
10:41:18:ST3_smx:INFO: List of broken channels: []
10:41:20:ST3_smx:INFO: chip: 3-2 40.898880 C 1171.483840 mV
10:41:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:20:ST3_smx:INFO: Electrons
10:41:20:ST3_smx:INFO: # loops 0
10:41:22:ST3_smx:INFO: # loops 1
10:41:24:ST3_smx:INFO: # loops 2
10:41:26:ST3_smx:INFO: Total # of broken channels: 0
10:41:26:ST3_smx:INFO: List of broken channels: []
10:41:26:ST3_smx:INFO: Total # of broken channels: 0
10:41:26:ST3_smx:INFO: List of broken channels: []
10:41:28:ST3_smx:INFO: chip: 10-3 47.250730 C 1147.806000 mV
10:41:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:28:ST3_smx:INFO: Electrons
10:41:28:ST3_smx:INFO: # loops 0
10:41:30:ST3_smx:INFO: # loops 1
10:41:32:ST3_smx:INFO: # loops 2
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:35:ST3_smx:INFO: chip: 5-4 40.898880 C 1183.292940 mV
10:41:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:35:ST3_smx:INFO: Electrons
10:41:35:ST3_smx:INFO: # loops 0
10:41:37:ST3_smx:INFO: # loops 1
10:41:39:ST3_smx:INFO: # loops 2
10:41:41:ST3_smx:INFO: Total # of broken channels: 0
10:41:41:ST3_smx:INFO: List of broken channels: []
10:41:41:ST3_smx:INFO: Total # of broken channels: 0
10:41:41:ST3_smx:INFO: List of broken channels: []
10:41:43:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
10:41:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:43:ST3_smx:INFO: Electrons
10:41:43:ST3_smx:INFO: # loops 0
10:41:45:ST3_smx:INFO: # loops 1
10:41:47:ST3_smx:INFO: # loops 2
10:41:48:ST3_smx:INFO: Total # of broken channels: 0
10:41:48:ST3_smx:INFO: List of broken channels: []
10:41:48:ST3_smx:INFO: Total # of broken channels: 0
10:41:48:ST3_smx:INFO: List of broken channels: []
10:41:50:ST3_smx:INFO: chip: 7-6 37.726682 C 1189.190035 mV
10:41:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:50:ST3_smx:INFO: Electrons
10:41:50:ST3_smx:INFO: # loops 0
10:41:52:ST3_smx:INFO: # loops 1
10:41:54:ST3_smx:INFO: # loops 2
10:41:56:ST3_smx:INFO: Total # of broken channels: 0
10:41:56:ST3_smx:INFO: List of broken channels: []
10:41:56:ST3_smx:INFO: Total # of broken channels: 0
10:41:56:ST3_smx:INFO: List of broken channels: []
10:41:58:ST3_smx:INFO: chip: 14-7 21.902970 C 1224.468235 mV
10:41:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:58:ST3_smx:INFO: Electrons
10:41:58:ST3_smx:INFO: # loops 0
10:41:59:ST3_smx:INFO: # loops 1
10:42:01:ST3_smx:INFO: # loops 2
10:42:03:ST3_smx:INFO: Total # of broken channels: 0
10:42:03:ST3_smx:INFO: List of broken channels: []
10:42:03:ST3_smx:INFO: Total # of broken channels: 0
10:42:03:ST3_smx:INFO: List of broken channels: []
10:42:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:42:04:febtest:INFO: 01-00 | XA-000-09-004-026-011-027-08 | 44.1 | 1189.2
10:42:04:febtest:INFO: 08-01 | XA-000-09-004-026-008-025-06 | 44.1 | 1183.3
10:42:04:febtest:INFO: 03-02 | XA-000-09-004-026-010-002-02 | 44.1 | 1195.1
10:42:04:febtest:INFO: 10-03 | XA-000-09-004-026-005-025-01 | 50.4 | 1165.6
10:42:05:febtest:INFO: 05-04 | XA-000-09-004-026-013-003-10 | 40.9 | 1218.6
10:42:05:febtest:INFO: 12-05 | XA-000-09-004-026-011-026-08 | 34.6 | 1218.6
10:42:05:febtest:INFO: 07-06 | XA-000-09-004-026-010-003-02 | 37.7 | 1212.7
10:42:05:febtest:INFO: 14-07 | XA-000-09-004-026-014-026-03 | 25.1 | 1247.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_26-10_40_30
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3306| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5650', '1.849', '2.2370', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0210', '1.850', '2.4750', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9810', '1.850', '0.5157', '0.000', '0.0000', '0.000', '0.0000']