FEB_3312 27.11.25 13:45:04
Info
13:45:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:04:ST3_Shared:INFO: FEB-Microcable
13:45:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:04:febtest:INFO: Testing FEB with SN 3312
13:45:05:smx_tester:INFO: Scanning setup
13:45:05:elinks:INFO: Disabling clock on downlink 0
13:45:05:elinks:INFO: Disabling clock on downlink 1
13:45:05:elinks:INFO: Disabling clock on downlink 2
13:45:05:elinks:INFO: Disabling clock on downlink 3
13:45:05:elinks:INFO: Disabling clock on downlink 4
13:45:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:45:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:45:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:45:05:elinks:INFO: Disabling clock on downlink 0
13:45:05:elinks:INFO: Disabling clock on downlink 1
13:45:05:elinks:INFO: Disabling clock on downlink 2
13:45:05:elinks:INFO: Disabling clock on downlink 3
13:45:05:elinks:INFO: Disabling clock on downlink 4
13:45:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:45:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:45:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:45:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:45:06:elinks:INFO: Disabling clock on downlink 0
13:45:06:elinks:INFO: Disabling clock on downlink 1
13:45:06:elinks:INFO: Disabling clock on downlink 2
13:45:06:elinks:INFO: Disabling clock on downlink 3
13:45:06:elinks:INFO: Disabling clock on downlink 4
13:45:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:45:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:45:06:elinks:INFO: Disabling clock on downlink 0
13:45:06:elinks:INFO: Disabling clock on downlink 1
13:45:06:elinks:INFO: Disabling clock on downlink 2
13:45:06:elinks:INFO: Disabling clock on downlink 3
13:45:06:elinks:INFO: Disabling clock on downlink 4
13:45:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:45:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:45:06:elinks:INFO: Disabling clock on downlink 0
13:45:06:elinks:INFO: Disabling clock on downlink 1
13:45:06:elinks:INFO: Disabling clock on downlink 2
13:45:06:elinks:INFO: Disabling clock on downlink 3
13:45:06:elinks:INFO: Disabling clock on downlink 4
13:45:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:45:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:45:06:setup_element:INFO: Scanning clock phase
13:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:06:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:45:06:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
13:45:06:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
13:45:06:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXX____________
Clock Delay: 24
13:45:06:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXX____________
Clock Delay: 24
13:45:06:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________XXXXXX___________
Clock Delay: 25
13:45:06:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________XXXXXX___________
Clock Delay: 25
13:45:06:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:45:06:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:45:06:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
13:45:06:setup_element:INFO: Scanning data phases
13:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:11:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:45:11:setup_element:INFO: Eye window for uplink 8 : XX_______________________________XXXXXXX
Data delay found: 17
13:45:11:setup_element:INFO: Eye window for uplink 9 : XXXX_________________________________XXX
Data delay found: 20
13:45:11:setup_element:INFO: Eye window for uplink 10: XXXXX_______________________________XXXX
Data delay found: 20
13:45:11:setup_element:INFO: Eye window for uplink 11: XXXXXX________________________________XX
Data delay found: 21
13:45:11:setup_element:INFO: Eye window for uplink 12: XXXXXXX_______________________________XX
Data delay found: 22
13:45:11:setup_element:INFO: Eye window for uplink 13: XXXXXXXX_______________________________X
Data delay found: 23
13:45:11:setup_element:INFO: Eye window for uplink 14: XXXXXXXX_______________________________X
Data delay found: 23
13:45:11:setup_element:INFO: Eye window for uplink 15: XXXXXXXXX______________________________X
Data delay found: 23
13:45:11:setup_element:INFO: Setting the data phase to 17 for uplink 8
13:45:11:setup_element:INFO: Setting the data phase to 20 for uplink 9
13:45:11:setup_element:INFO: Setting the data phase to 20 for uplink 10
13:45:11:setup_element:INFO: Setting the data phase to 21 for uplink 11
13:45:11:setup_element:INFO: Setting the data phase to 22 for uplink 12
13:45:11:setup_element:INFO: Setting the data phase to 23 for uplink 13
13:45:11:setup_element:INFO: Setting the data phase to 23 for uplink 14
13:45:11:setup_element:INFO: Setting the data phase to 23 for uplink 15
13:45:11:setup_element:INFO: Beginning SMX ASICs map scan
13:45:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:45:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:45:11:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:45:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:45:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:45:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:45:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:45:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:45:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:45:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:45:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:45:14:setup_element:INFO: Performing Elink synchronization
13:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:45:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:45:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:45:14:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:45:14:febtest:INFO: Init all SMX (CSA): 30
13:45:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:45:22:febtest:INFO: 08-01 | XA-000-09-004-026-007-006-05 | 34.6 | 1159.7
13:45:22:febtest:INFO: 10-03 | XA-000-09-004-026-010-006-02 | 31.4 | 1177.4
13:45:22:febtest:INFO: 12-05 | XA-000-09-004-026-016-006-01 | 31.4 | 1177.4
13:45:22:febtest:INFO: 14-07 | XA-000-09-004-026-016-007-01 | 25.1 | 1206.9
13:45:23:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:45:25:ST3_smx:INFO: chip: 8-1 34.556970 C 1171.483840 mV
13:45:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:25:ST3_smx:INFO: Electrons
13:45:25:ST3_smx:INFO: # loops 0
13:45:27:ST3_smx:INFO: # loops 1
13:45:29:ST3_smx:INFO: # loops 2
13:45:30:ST3_smx:INFO: Total # of broken channels: 0
13:45:30:ST3_smx:INFO: List of broken channels: []
13:45:30:ST3_smx:INFO: Total # of broken channels: 0
13:45:30:ST3_smx:INFO: List of broken channels: []
13:45:32:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV
13:45:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:32:ST3_smx:INFO: Electrons
13:45:32:ST3_smx:INFO: # loops 0
13:45:34:ST3_smx:INFO: # loops 1
13:45:36:ST3_smx:INFO: # loops 2
13:45:37:ST3_smx:INFO: Total # of broken channels: 0
13:45:37:ST3_smx:INFO: List of broken channels: []
13:45:37:ST3_smx:INFO: Total # of broken channels: 0
13:45:37:ST3_smx:INFO: List of broken channels: []
13:45:39:ST3_smx:INFO: chip: 12-5 34.556970 C 1189.190035 mV
13:45:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:39:ST3_smx:INFO: Electrons
13:45:39:ST3_smx:INFO: # loops 0
13:45:41:ST3_smx:INFO: # loops 1
13:45:42:ST3_smx:INFO: # loops 2
13:45:44:ST3_smx:INFO: Total # of broken channels: 0
13:45:44:ST3_smx:INFO: List of broken channels: []
13:45:44:ST3_smx:INFO: Total # of broken channels: 0
13:45:44:ST3_smx:INFO: List of broken channels: []
13:45:45:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
13:45:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:45:ST3_smx:INFO: Electrons
13:45:45:ST3_smx:INFO: # loops 0
13:45:47:ST3_smx:INFO: # loops 1
13:45:49:ST3_smx:INFO: # loops 2
13:45:51:ST3_smx:INFO: Total # of broken channels: 0
13:45:51:ST3_smx:INFO: List of broken channels: []
13:45:51:ST3_smx:INFO: Total # of broken channels: 0
13:45:51:ST3_smx:INFO: List of broken channels: []
13:45:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:45:51:febtest:INFO: 08-01 | XA-000-09-004-026-007-006-05 | 34.6 | 1195.1
13:45:51:febtest:INFO: 10-03 | XA-000-09-004-026-010-006-02 | 34.6 | 1206.9
13:45:52:febtest:INFO: 12-05 | XA-000-09-004-026-016-006-01 | 34.6 | 1224.5
13:45:52:febtest:INFO: 14-07 | XA-000-09-004-026-016-007-01 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_27-13_45_04
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3312| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '0.7832', '1.850', '1.5930', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9793', '1.850', '1.1930', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9810', '1.850', '0.2624', '0.000', '0.0000', '0.000', '0.0000']