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FEB_3315 04.12.25 08:45:16
Info
08:45:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:16:ST3_Shared:INFO: FEB-Microcable
08:45:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:16:febtest:INFO: Testing FEB with SN 3315
08:45:18:smx_tester:INFO: Scanning setup
08:45:18:elinks:INFO: Disabling clock on downlink 0
08:45:18:elinks:INFO: Disabling clock on downlink 1
08:45:18:elinks:INFO: Disabling clock on downlink 2
08:45:18:elinks:INFO: Disabling clock on downlink 3
08:45:18:elinks:INFO: Disabling clock on downlink 4
08:45:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:45:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:18:elinks:INFO: Disabling clock on downlink 0
08:45:18:elinks:INFO: Disabling clock on downlink 1
08:45:18:elinks:INFO: Disabling clock on downlink 2
08:45:18:elinks:INFO: Disabling clock on downlink 3
08:45:18:elinks:INFO: Disabling clock on downlink 4
08:45:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:45:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:45:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:18:elinks:INFO: Disabling clock on downlink 0
08:45:18:elinks:INFO: Disabling clock on downlink 1
08:45:18:elinks:INFO: Disabling clock on downlink 2
08:45:18:elinks:INFO: Disabling clock on downlink 3
08:45:18:elinks:INFO: Disabling clock on downlink 4
08:45:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:18:elinks:INFO: Disabling clock on downlink 0
08:45:18:elinks:INFO: Disabling clock on downlink 1
08:45:18:elinks:INFO: Disabling clock on downlink 2
08:45:18:elinks:INFO: Disabling clock on downlink 3
08:45:18:elinks:INFO: Disabling clock on downlink 4
08:45:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:45:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:19:elinks:INFO: Disabling clock on downlink 0
08:45:19:elinks:INFO: Disabling clock on downlink 1
08:45:19:elinks:INFO: Disabling clock on downlink 2
08:45:19:elinks:INFO: Disabling clock on downlink 3
08:45:19:elinks:INFO: Disabling clock on downlink 4
08:45:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:45:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:19:setup_element:INFO: Scanning clock phase
08:45:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:45:19:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:45:19:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________XXXXX_X_________
Clock Delay: 27
08:45:19:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________XXXXX_X_________
Clock Delay: 27
08:45:19:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:45:19:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:45:19:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
08:45:19:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________XXXXXXXX________
Clock Delay: 27
08:45:19:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
08:45:19:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
08:45:19:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
08:45:19:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXX_X_________
Clock Delay: 26
08:45:19:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:45:19:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
08:45:19:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________XXXXXX______________
Clock Delay: 22
08:45:19:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________XXXXXX______________
Clock Delay: 22
08:45:19:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________XXXXXX_X___________
Clock Delay: 24
08:45:19:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________XXXXXX_X___________
Clock Delay: 24
08:45:19:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 1
08:45:19:setup_element:INFO: Scanning data phases
08:45:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:45:24:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:45:24:setup_element:INFO: Eye window for uplink 0 : ___________________XXXXXXXXXX___________
Data delay found: 3
08:45:24:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXXXXXXXX_____________
Data delay found: 0
08:45:24:setup_element:INFO: Eye window for uplink 2 : ______________XXXXXX____________________
Data delay found: 36
08:45:24:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXXXX_____________________
Data delay found: 34
08:45:24:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXXXX______________________
Data delay found: 33
08:45:24:setup_element:INFO: Eye window for uplink 5 : _______X_XXXXXXXXX______________________
Data delay found: 32
08:45:24:setup_element:INFO: Eye window for uplink 6 : _______XXXXXXX__________________________
Data delay found: 30
08:45:24:setup_element:INFO: Eye window for uplink 7 : ___XXXXXXXXXXX__________________________
Data delay found: 28
08:45:24:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXXX__
Data delay found: 14
08:45:24:setup_element:INFO: Eye window for uplink 9 : XXX_______________________________XXXXXX
Data delay found: 18
08:45:24:setup_element:INFO: Eye window for uplink 10: X_______________________________XXXXXXXX
Data delay found: 16
08:45:24:setup_element:INFO: Eye window for uplink 11: XX_______________________________XXXXXXX
Data delay found: 17
08:45:24:setup_element:INFO: Eye window for uplink 12: X_________________________________XXXXX_
Data delay found: 17
08:45:24:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
08:45:24:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXXXXX
Data delay found: 15
08:45:24:setup_element:INFO: Eye window for uplink 15: XXX______________________________XXXXXXX
Data delay found: 17
08:45:24:setup_element:INFO: Setting the data phase to 3 for uplink 0
08:45:24:setup_element:INFO: Setting the data phase to 0 for uplink 1
08:45:24:setup_element:INFO: Setting the data phase to 36 for uplink 2
08:45:24:setup_element:INFO: Setting the data phase to 34 for uplink 3
08:45:24:setup_element:INFO: Setting the data phase to 33 for uplink 4
08:45:24:setup_element:INFO: Setting the data phase to 32 for uplink 5
08:45:24:setup_element:INFO: Setting the data phase to 30 for uplink 6
08:45:24:setup_element:INFO: Setting the data phase to 28 for uplink 7
08:45:24:setup_element:INFO: Setting the data phase to 14 for uplink 8
08:45:24:setup_element:INFO: Setting the data phase to 18 for uplink 9
08:45:24:setup_element:INFO: Setting the data phase to 16 for uplink 10
08:45:24:setup_element:INFO: Setting the data phase to 17 for uplink 11
08:45:24:setup_element:INFO: Setting the data phase to 17 for uplink 12
08:45:24:setup_element:INFO: Setting the data phase to 17 for uplink 13
08:45:24:setup_element:INFO: Setting the data phase to 15 for uplink 14
08:45:24:setup_element:INFO: Setting the data phase to 17 for uplink 15
08:45:24:setup_element:INFO: Beginning SMX ASICs map scan
08:45:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:45:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:45:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:45:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:45:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:45:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:45:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:45:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:45:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:45:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:45:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:45:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:45:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:45:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:45:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:45:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:45:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:45:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:45:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:45:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:45:27:setup_element:INFO: Performing Elink synchronization
08:45:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:45:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:45:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:45:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:45:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:45:28:febtest:INFO: Init all SMX (CSA): 30
08:45:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:45:43:febtest:INFO: 01-00 | XA-000-09-004-026-004-012-11 | 15.6 | 1212.7
08:45:43:febtest:INFO: 08-01 | XA-000-09-004-026-013-010-10 | 37.7 | 1159.7
08:45:43:febtest:INFO: 03-02 | XA-000-09-004-026-013-011-10 | 28.2 | 1177.4
08:45:44:febtest:INFO: 10-03 | XA-000-09-004-026-013-009-10 | 21.9 | 1201.0
08:45:44:febtest:INFO: 05-04 | XA-000-09-004-026-016-011-01 | 28.2 | 1195.1
08:45:44:febtest:INFO: 12-05 | XA-000-09-004-026-007-009-05 | 34.6 | 1165.6
08:45:44:febtest:INFO: 07-06 | XA-000-09-004-026-016-010-01 | 15.6 | 1218.6
08:45:44:febtest:INFO: 14-07 | XA-000-09-004-026-004-009-11 | 21.9 | 1212.7
08:45:45:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:45:47:ST3_smx:INFO: chip: 1-0 18.745682 C 1230.330540 mV
08:45:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:45:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:45:47:ST3_smx:INFO: Electrons
08:45:47:ST3_smx:INFO: # loops 0
08:45:49:ST3_smx:INFO: # loops 1
08:45:51:ST3_smx:INFO: # loops 2
08:45:53:ST3_smx:INFO: Total # of broken channels: 0
08:45:53:ST3_smx:INFO: List of broken channels: []
08:45:53:ST3_smx:INFO: Total # of broken channels: 0
08:45:53:ST3_smx:INFO: List of broken channels: []
08:45:55:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
08:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:45:55:ST3_smx:INFO: Electrons
08:45:55:ST3_smx:INFO: # loops 0
08:45:57:ST3_smx:INFO: # loops 1
08:45:58:ST3_smx:INFO: # loops 2
08:46:00:ST3_smx:INFO: Total # of broken channels: 0
08:46:00:ST3_smx:INFO: List of broken channels: []
08:46:00:ST3_smx:INFO: Total # of broken channels: 0
08:46:00:ST3_smx:INFO: List of broken channels: []
08:46:02:ST3_smx:INFO: chip: 3-2 28.225000 C 1195.082160 mV
08:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:02:ST3_smx:INFO: Electrons
08:46:02:ST3_smx:INFO: # loops 0
08:46:03:ST3_smx:INFO: # loops 1
08:46:05:ST3_smx:INFO: # loops 2
08:46:07:ST3_smx:INFO: Total # of broken channels: 0
08:46:07:ST3_smx:INFO: List of broken channels: []
08:46:07:ST3_smx:INFO: Total # of broken channels: 1
08:46:07:ST3_smx:INFO: List of broken channels: [99]
08:46:08:ST3_smx:INFO: chip: 10-3 25.062742 C 1218.600960 mV
08:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:08:ST3_smx:INFO: Electrons
08:46:08:ST3_smx:INFO: # loops 0
08:46:10:ST3_smx:INFO: # loops 1
08:46:12:ST3_smx:INFO: # loops 2
08:46:14:ST3_smx:INFO: Total # of broken channels: 0
08:46:14:ST3_smx:INFO: List of broken channels: []
08:46:14:ST3_smx:INFO: Total # of broken channels: 0
08:46:14:ST3_smx:INFO: List of broken channels: []
08:46:15:ST3_smx:INFO: chip: 5-4 28.225000 C 1206.851500 mV
08:46:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:15:ST3_smx:INFO: Electrons
08:46:15:ST3_smx:INFO: # loops 0
08:46:17:ST3_smx:INFO: # loops 1
08:46:19:ST3_smx:INFO: # loops 2
08:46:20:ST3_smx:INFO: Total # of broken channels: 0
08:46:20:ST3_smx:INFO: List of broken channels: []
08:46:20:ST3_smx:INFO: Total # of broken channels: 0
08:46:20:ST3_smx:INFO: List of broken channels: []
08:46:22:ST3_smx:INFO: chip: 12-5 37.726682 C 1177.390875 mV
08:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:22:ST3_smx:INFO: Electrons
08:46:22:ST3_smx:INFO: # loops 0
08:46:24:ST3_smx:INFO: # loops 1
08:46:25:ST3_smx:INFO: # loops 2
08:46:27:ST3_smx:INFO: Total # of broken channels: 0
08:46:27:ST3_smx:INFO: List of broken channels: []
08:46:27:ST3_smx:INFO: Total # of broken channels: 0
08:46:27:ST3_smx:INFO: List of broken channels: []
08:46:29:ST3_smx:INFO: chip: 7-6 18.745682 C 1230.330540 mV
08:46:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:29:ST3_smx:INFO: Electrons
08:46:29:ST3_smx:INFO: # loops 0
08:46:30:ST3_smx:INFO: # loops 1
08:46:32:ST3_smx:INFO: # loops 2
08:46:34:ST3_smx:INFO: Total # of broken channels: 0
08:46:34:ST3_smx:INFO: List of broken channels: []
08:46:34:ST3_smx:INFO: Total # of broken channels: 0
08:46:34:ST3_smx:INFO: List of broken channels: []
08:46:36:ST3_smx:INFO: chip: 14-7 25.062742 C 1230.330540 mV
08:46:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:36:ST3_smx:INFO: Electrons
08:46:36:ST3_smx:INFO: # loops 0
08:46:37:ST3_smx:INFO: # loops 1
08:46:39:ST3_smx:INFO: # loops 2
08:46:41:ST3_smx:INFO: Total # of broken channels: 0
08:46:41:ST3_smx:INFO: List of broken channels: []
08:46:41:ST3_smx:INFO: Total # of broken channels: 0
08:46:41:ST3_smx:INFO: List of broken channels: []
08:46:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:46:41:febtest:INFO: 01-00 | XA-000-09-004-026-004-012-11 | 18.7 | 1247.9
08:46:41:febtest:INFO: 08-01 | XA-000-09-004-026-013-010-10 | 37.7 | 1195.1
08:46:42:febtest:INFO: 03-02 | XA-000-09-004-026-013-011-10 | 31.4 | 1212.7
08:46:42:febtest:INFO: 10-03 | XA-000-09-004-026-013-009-10 | 25.1 | 1242.0
08:46:42:febtest:INFO: 05-04 | XA-000-09-004-026-016-011-01 | 28.2 | 1230.3
08:46:42:febtest:INFO: 12-05 | XA-000-09-004-026-007-009-05 | 37.7 | 1201.0
08:46:42:febtest:INFO: 07-06 | XA-000-09-004-026-016-010-01 | 21.9 | 1253.7
08:46:43:febtest:INFO: 14-07 | XA-000-09-004-026-004-009-11 | 25.1 | 1294.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_04-08_45_16
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3315| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5920', '1.850', '2.3160', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0320', '1.850', '2.4500', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9690', '1.850', '0.5234', '0.000', '0.0000', '0.000', '0.0000']