FEB_4005    13.03.24 13:45:48

TextEdit.txt
            13:45:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:48:ST3_Shared:INFO:	                       FEB-Microcable                       
13:45:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:49:febtest:INFO:	Testing FEB with SN 4005
13:45:52:smx_tester:INFO:	Scanning setup
13:45:52:elinks:INFO:	Disabling clock on downlink 0
13:45:52:elinks:INFO:	Disabling clock on downlink 1
13:45:52:elinks:INFO:	Disabling clock on downlink 2
13:45:52:elinks:INFO:	Disabling clock on downlink 3
13:45:52:elinks:INFO:	Disabling clock on downlink 4
13:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:52:elinks:INFO:	Disabling clock on downlink 0
13:45:52:elinks:INFO:	Disabling clock on downlink 1
13:45:52:elinks:INFO:	Disabling clock on downlink 2
13:45:52:elinks:INFO:	Disabling clock on downlink 3
13:45:52:elinks:INFO:	Disabling clock on downlink 4
13:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:52:elinks:INFO:	Disabling clock on downlink 0
13:45:52:elinks:INFO:	Disabling clock on downlink 1
13:45:52:elinks:INFO:	Disabling clock on downlink 2
13:45:52:elinks:INFO:	Disabling clock on downlink 3
13:45:52:elinks:INFO:	Disabling clock on downlink 4
13:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:45:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:52:elinks:INFO:	Disabling clock on downlink 0
13:45:52:elinks:INFO:	Disabling clock on downlink 1
13:45:52:elinks:INFO:	Disabling clock on downlink 2
13:45:52:elinks:INFO:	Disabling clock on downlink 3
13:45:52:elinks:INFO:	Disabling clock on downlink 4
13:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:52:elinks:INFO:	Disabling clock on downlink 0
13:45:52:elinks:INFO:	Disabling clock on downlink 1
13:45:52:elinks:INFO:	Disabling clock on downlink 2
13:45:52:elinks:INFO:	Disabling clock on downlink 3
13:45:52:elinks:INFO:	Disabling clock on downlink 4
13:45:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:45:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:52:setup_element:INFO:	Scanning clock phase
13:45:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:45:53:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:45:53:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXX_______
Clock Delay: 30
13:45:53:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXX_______
Clock Delay: 30
13:45:53:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:45:53:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:45:53:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXX_______
Clock Delay: 30
13:45:53:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXX_______
Clock Delay: 30
13:45:53:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:45:53:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:45:53:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:45:53:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:45:53:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
13:45:53:setup_element:INFO:	Scanning data phases
13:45:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:45:58:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:45:58:setup_element:INFO:	Eye window for uplink 16: __________________________XXXXXX________
Data delay found: 8
13:45:58:setup_element:INFO:	Eye window for uplink 17: ________________________XXXX____________
Data delay found: 5
13:45:58:setup_element:INFO:	Eye window for uplink 18: ___________________________XXXXX________
Data delay found: 9
13:45:58:setup_element:INFO:	Eye window for uplink 19: _______________________XXXXXXX__________
Data delay found: 6
13:45:58:setup_element:INFO:	Eye window for uplink 20: __________________________XXXX__________
Data delay found: 7
13:45:58:setup_element:INFO:	Eye window for uplink 21: ________________________XXXXX___________
Data delay found: 6
13:45:58:setup_element:INFO:	Eye window for uplink 22: ______________________________XXXXXX____
Data delay found: 12
13:45:58:setup_element:INFO:	Eye window for uplink 23: __________________________XXXXXX________
Data delay found: 8
13:45:58:setup_element:INFO:	Eye window for uplink 24: ________________________________XXXXXXX_
Data delay found: 15
13:45:58:setup_element:INFO:	Eye window for uplink 25: XX___________________________________XXX
Data delay found: 19
13:45:58:setup_element:INFO:	Eye window for uplink 26: XXX________________________________XXXXX
Data delay found: 18
13:45:58:setup_element:INFO:	Eye window for uplink 27: _XXXXXXXX_______________________________
Data delay found: 24
13:45:58:setup_element:INFO:	Eye window for uplink 28: ____XXXXXX______________________________
Data delay found: 26
13:45:58:setup_element:INFO:	Eye window for uplink 29: _______XXXX_____________________________
Data delay found: 28
13:45:58:setup_element:INFO:	Eye window for uplink 30: ___XXXXXXX______________________________
Data delay found: 26
13:45:58:setup_element:INFO:	Eye window for uplink 31: ____XXXXX_______________________________
Data delay found: 26
13:45:58:setup_element:INFO:	Setting the data phase to 8 for uplink 16
13:45:58:setup_element:INFO:	Setting the data phase to 5 for uplink 17
13:45:58:setup_element:INFO:	Setting the data phase to 9 for uplink 18
13:45:58:setup_element:INFO:	Setting the data phase to 6 for uplink 19
13:45:58:setup_element:INFO:	Setting the data phase to 7 for uplink 20
13:45:58:setup_element:INFO:	Setting the data phase to 6 for uplink 21
13:45:58:setup_element:INFO:	Setting the data phase to 12 for uplink 22
13:45:58:setup_element:INFO:	Setting the data phase to 8 for uplink 23
13:45:58:setup_element:INFO:	Setting the data phase to 15 for uplink 24
13:45:58:setup_element:INFO:	Setting the data phase to 19 for uplink 25
13:45:58:setup_element:INFO:	Setting the data phase to 18 for uplink 26
13:45:58:setup_element:INFO:	Setting the data phase to 24 for uplink 27
13:45:58:setup_element:INFO:	Setting the data phase to 26 for uplink 28
13:45:58:setup_element:INFO:	Setting the data phase to 28 for uplink 29
13:45:58:setup_element:INFO:	Setting the data phase to 26 for uplink 30
13:45:58:setup_element:INFO:	Setting the data phase to 26 for uplink 31
13:45:58:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXX_____
      Uplink 17: _____________________________________________________________________XXXXXX_____
      Uplink 18: _____________________________________________________________________XXXXXX_____
      Uplink 19: _____________________________________________________________________XXXXXX_____
      Uplink 20: _____________________________________________________________________XXXX_______
      Uplink 21: _____________________________________________________________________XXXX_______
      Uplink 22: _______________________________________________________________________XXXXXX___
      Uplink 23: _______________________________________________________________________XXXXXX___
      Uplink 24: ____________________________________________________________________XXXXX_______
      Uplink 25: ____________________________________________________________________XXXXX_______
      Uplink 26: _____________________________________________________________________XXXXXX_____
      Uplink 27: _____________________________________________________________________XXXXXX_____
      Uplink 28: ______________________________________________________________________XXXXX_____
      Uplink 29: ______________________________________________________________________XXXXX_____
      Uplink 30: _____________________________________________________________________XXXXX______
      Uplink 31: _____________________________________________________________________XXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 17:
      Optimal Phase: 5
      Window Length: 36
      Eye Window: ________________________XXXX____________
    Uplink 18:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 19:
      Optimal Phase: 6
      Window Length: 33
      Eye Window: _______________________XXXXXXX__________
    Uplink 20:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 21:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 22:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 23:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 24:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 25:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 26:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 27:
      Optimal Phase: 24
      Window Length: 32
      Eye Window: _XXXXXXXX_______________________________
    Uplink 28:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 29:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 30:
      Optimal Phase: 26
      Window Length: 33
      Eye Window: ___XXXXXXX______________________________
    Uplink 31:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
]
13:45:58:setup_element:INFO:	Beginning SMX ASICs map scan
13:45:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:45:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:45:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:45:58:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:45:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:45:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:45:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:45:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:45:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:45:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:45:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:45:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:45:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:45:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:45:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:45:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:45:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:45:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:45:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:45:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:46:01:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXX_____
      Uplink 17: _____________________________________________________________________XXXXXX_____
      Uplink 18: _____________________________________________________________________XXXXXX_____
      Uplink 19: _____________________________________________________________________XXXXXX_____
      Uplink 20: _____________________________________________________________________XXXX_______
      Uplink 21: _____________________________________________________________________XXXX_______
      Uplink 22: _______________________________________________________________________XXXXXX___
      Uplink 23: _______________________________________________________________________XXXXXX___
      Uplink 24: ____________________________________________________________________XXXXX_______
      Uplink 25: ____________________________________________________________________XXXXX_______
      Uplink 26: _____________________________________________________________________XXXXXX_____
      Uplink 27: _____________________________________________________________________XXXXXX_____
      Uplink 28: ______________________________________________________________________XXXXX_____
      Uplink 29: ______________________________________________________________________XXXXX_____
      Uplink 30: _____________________________________________________________________XXXXX______
      Uplink 31: _____________________________________________________________________XXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 17:
      Optimal Phase: 5
      Window Length: 36
      Eye Window: ________________________XXXX____________
    Uplink 18:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 19:
      Optimal Phase: 6
      Window Length: 33
      Eye Window: _______________________XXXXXXX__________
    Uplink 20:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 21:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 22:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 23:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 24:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 25:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 26:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 27:
      Optimal Phase: 24
      Window Length: 32
      Eye Window: _XXXXXXXX_______________________________
    Uplink 28:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 29:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 30:
      Optimal Phase: 26
      Window Length: 33
      Eye Window: ___XXXXXXX______________________________
    Uplink 31:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________

13:46:01:setup_element:INFO:	Performing Elink synchronization
13:46:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:46:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:46:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:46:01:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:46:01:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:46:01:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
13:46:02:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:46:02:febtest:INFO:	23-00 | XA-000-08-003-000-001-120-05 |  12.4 | 1300.3
13:46:02:febtest:INFO:	30-01 | XA-000-08-003-000-001-077-12 |  18.7 | 1288.7
13:46:03:febtest:INFO:	21-02 | XA-000-08-003-000-001-113-05 |  31.4 | 1230.3
13:46:03:febtest:INFO:	28-03 | XA-000-08-003-000-001-069-12 |  12.4 | 1306.1
13:46:03:febtest:INFO:	19-04 | XA-000-08-003-000-001-116-05 |  28.2 | 1265.4
13:46:03:febtest:INFO:	26-05 | XA-000-08-003-000-001-073-12 |  31.4 | 1247.9
13:46:04:febtest:INFO:	17-06 | XA-000-08-003-000-001-117-05 |  18.7 | 1277.1
13:46:04:febtest:INFO:	24-07 | XA-000-08-003-000-001-078-12 |  28.2 | 1253.7
13:46:04:ST3_smx:INFO:	Configuring SMX FAST
13:46:06:ST3_smx:INFO:	chip: 23-0 	 18.745682 C 	 1282.867635 mV
13:46:06:ST3_smx:INFO:		Electrons
13:46:06:ST3_smx:INFO:	# loops 0
13:46:08:ST3_smx:INFO:	# loops 1
13:46:10:ST3_smx:INFO:	# loops 2
13:46:13:ST3_smx:INFO:	Total # of broken channels: 0
13:46:13:ST3_smx:INFO:	List of broken channels: []
13:46:13:ST3_smx:INFO:	Total # of broken channels: 0
13:46:13:ST3_smx:INFO:	List of broken channels: []
13:46:14:ST3_smx:INFO:	Configuring SMX FAST
13:46:16:ST3_smx:INFO:	chip: 30-1 	 18.745682 C 	 1288.680240 mV
13:46:16:ST3_smx:INFO:		Electrons
13:46:16:ST3_smx:INFO:	# loops 0
13:46:18:ST3_smx:INFO:	# loops 1
13:46:20:ST3_smx:INFO:	# loops 2
13:46:22:ST3_smx:INFO:	Total # of broken channels: 0
13:46:22:ST3_smx:INFO:	List of broken channels: []
13:46:22:ST3_smx:INFO:	Total # of broken channels: 0
13:46:22:ST3_smx:INFO:	List of broken channels: []
13:46:23:ST3_smx:INFO:	Configuring SMX FAST
13:46:25:ST3_smx:INFO:	chip: 21-2 	 28.225000 C 	 1247.887635 mV
13:46:25:ST3_smx:INFO:		Electrons
13:46:25:ST3_smx:INFO:	# loops 0
13:46:28:ST3_smx:INFO:	# loops 1
13:46:30:ST3_smx:INFO:	# loops 2
13:46:32:ST3_smx:INFO:	Total # of broken channels: 0
13:46:32:ST3_smx:INFO:	List of broken channels: []
13:46:32:ST3_smx:INFO:	Total # of broken channels: 0
13:46:32:ST3_smx:INFO:	List of broken channels: []
13:46:33:ST3_smx:INFO:	Configuring SMX FAST
13:46:35:ST3_smx:INFO:	chip: 28-3 	 15.590880 C 	 1306.088235 mV
13:46:35:ST3_smx:INFO:		Electrons
13:46:35:ST3_smx:INFO:	# loops 0
13:46:37:ST3_smx:INFO:	# loops 1
13:46:39:ST3_smx:INFO:	# loops 2
13:46:41:ST3_smx:INFO:	Total # of broken channels: 0
13:46:41:ST3_smx:INFO:	List of broken channels: []
13:46:41:ST3_smx:INFO:	Total # of broken channels: 0
13:46:41:ST3_smx:INFO:	List of broken channels: []
13:46:42:ST3_smx:INFO:	Configuring SMX FAST
13:46:44:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1253.730060 mV
13:46:44:ST3_smx:INFO:		Electrons
13:46:45:ST3_smx:INFO:	# loops 0
13:46:46:ST3_smx:INFO:	# loops 1
13:46:48:ST3_smx:INFO:	# loops 2
13:46:50:ST3_smx:INFO:	Total # of broken channels: 0
13:46:50:ST3_smx:INFO:	List of broken channels: []
13:46:50:ST3_smx:INFO:	Total # of broken channels: 0
13:46:50:ST3_smx:INFO:	List of broken channels: []
13:46:51:ST3_smx:INFO:	Configuring SMX FAST
13:46:54:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1259.567515 mV
13:46:54:ST3_smx:INFO:		Electrons
13:46:54:ST3_smx:INFO:	# loops 0
13:46:56:ST3_smx:INFO:	# loops 1
13:46:58:ST3_smx:INFO:	# loops 2
13:47:00:ST3_smx:INFO:	Total # of broken channels: 0
13:47:00:ST3_smx:INFO:	List of broken channels: []
13:47:00:ST3_smx:INFO:	Total # of broken channels: 0
13:47:00:ST3_smx:INFO:	List of broken channels: []
13:47:01:ST3_smx:INFO:	Configuring SMX FAST
13:47:04:ST3_smx:INFO:	chip: 17-6 	 28.225000 C 	 1259.567515 mV
13:47:04:ST3_smx:INFO:		Electrons
13:47:04:ST3_smx:INFO:	# loops 0
13:47:05:ST3_smx:INFO:	# loops 1
13:47:08:ST3_smx:INFO:	# loops 2
13:47:10:ST3_smx:INFO:	Total # of broken channels: 0
13:47:10:ST3_smx:INFO:	List of broken channels: []
13:47:10:ST3_smx:INFO:	Total # of broken channels: 0
13:47:10:ST3_smx:INFO:	List of broken channels: []
13:47:11:ST3_smx:INFO:	Configuring SMX FAST
13:47:13:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1259.567515 mV
13:47:13:ST3_smx:INFO:		Electrons
13:47:13:ST3_smx:INFO:	# loops 0
13:47:15:ST3_smx:INFO:	# loops 1
13:47:17:ST3_smx:INFO:	# loops 2
13:47:19:ST3_smx:INFO:	Total # of broken channels: 0
13:47:19:ST3_smx:INFO:	List of broken channels: []
13:47:19:ST3_smx:INFO:	Total # of broken channels: 0
13:47:19:ST3_smx:INFO:	List of broken channels: []
13:47:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:47:20:febtest:INFO:	23-00 | XA-000-08-003-000-001-120-05 |  21.9 | 1277.1
13:47:20:febtest:INFO:	30-01 | XA-000-08-003-000-001-077-12 |  25.1 | 1277.1
13:47:20:febtest:INFO:	21-02 | XA-000-08-003-000-001-113-05 |  31.4 | 1242.0
13:47:21:febtest:INFO:	28-03 | XA-000-08-003-000-001-069-12 |  18.7 | 1300.3
13:47:21:febtest:INFO:	19-04 | XA-000-08-003-000-001-116-05 |  34.6 | 1247.9
13:47:21:febtest:INFO:	26-05 | XA-000-08-003-000-001-073-12 |  31.4 | 1259.6
13:47:21:febtest:INFO:	17-06 | XA-000-08-003-000-001-117-05 |  28.2 | 1259.6
13:47:21:febtest:INFO:	24-07 | XA-000-08-003-000-001-078-12 |  31.4 | 1259.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_03_13-13_45_48
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 4005
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.199', '1.4970', '2.800', '2.1060']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7860', '2.800', '0.4114']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7860', '2.800', '0.3282']