14:27:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:27:25:ST3_Shared:INFO:	                         FEB-Sensor                         
14:27:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:27:39:ST3_ModuleSelector:INFO:	L5UL301017 M5UL3T2010172B2 124 B

14:27:39:ST3_ModuleSelector:INFO:	18264

14:27:40:febtest:INFO:	Testing FEB with SN 4006
14:27:42:smx_tester:INFO:	Scanning setup
14:27:42:elinks:INFO:	Disabling clock on downlink 0
14:27:42:elinks:INFO:	Disabling clock on downlink 1
14:27:42:elinks:INFO:	Disabling clock on downlink 2
14:27:42:elinks:INFO:	Disabling clock on downlink 3
14:27:42:elinks:INFO:	Disabling clock on downlink 4
14:27:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:27:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:27:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:27:42:elinks:INFO:	Disabling clock on downlink 0
14:27:42:elinks:INFO:	Disabling clock on downlink 1
14:27:42:elinks:INFO:	Disabling clock on downlink 2
14:27:42:elinks:INFO:	Disabling clock on downlink 3
14:27:42:elinks:INFO:	Disabling clock on downlink 4
14:27:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:27:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:27:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:27:42:elinks:INFO:	Disabling clock on downlink 0
14:27:42:elinks:INFO:	Disabling clock on downlink 1
14:27:42:elinks:INFO:	Disabling clock on downlink 2
14:27:42:elinks:INFO:	Disabling clock on downlink 3
14:27:42:elinks:INFO:	Disabling clock on downlink 4
14:27:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:27:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:27:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:27:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:27:43:elinks:INFO:	Disabling clock on downlink 0
14:27:43:elinks:INFO:	Disabling clock on downlink 1
14:27:43:elinks:INFO:	Disabling clock on downlink 2
14:27:43:elinks:INFO:	Disabling clock on downlink 3
14:27:43:elinks:INFO:	Disabling clock on downlink 4
14:27:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:27:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:27:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:27:43:elinks:INFO:	Disabling clock on downlink 0
14:27:43:elinks:INFO:	Disabling clock on downlink 1
14:27:43:elinks:INFO:	Disabling clock on downlink 2
14:27:43:elinks:INFO:	Disabling clock on downlink 3
14:27:43:elinks:INFO:	Disabling clock on downlink 4
14:27:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:27:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:27:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:27:43:setup_element:INFO:	Scanning clock phase
14:27:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:27:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:27:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:27:43:setup_element:INFO:	Eye window for uplink 16: ___________________________________________________________________XXX__________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 17: ___________________________________________________________________XXX__________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 20: __________________________________________________________________XXXXX_________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 21: __________________________________________________________________XXXXX_________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXX_________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXX_________
Clock Delay: 28
14:27:43:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXX________
Clock Delay: 29
14:27:43:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:27:43:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:27:43:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
14:27:43:setup_element:INFO:	Scanning data phases
14:27:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:27:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:27:48:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:27:48:setup_element:INFO:	Eye window for uplink 16: _____________________XXXXXXXX___________
Data delay found: 4
14:27:48:setup_element:INFO:	Eye window for uplink 17: __________________XXXXXXX_______________
Data delay found: 1
14:27:48:setup_element:INFO:	Eye window for uplink 18: __________________________XXXXXX________
Data delay found: 8
14:27:48:setup_element:INFO:	Eye window for uplink 19: ______________________XXXXXXX___________
Data delay found: 5
14:27:48:setup_element:INFO:	Eye window for uplink 20: ____________________XXXXXX______________
Data delay found: 2
14:27:48:setup_element:INFO:	Eye window for uplink 21: __________________XXXXXXX_______________
Data delay found: 1
14:27:48:setup_element:INFO:	Eye window for uplink 22: __________________________XXXXX_________
Data delay found: 8
14:27:48:setup_element:INFO:	Eye window for uplink 23: ______________________XXXXXX____________
Data delay found: 4
14:27:48:setup_element:INFO:	Eye window for uplink 24: X________________________________XXXXXXX
Data delay found: 16
14:27:48:setup_element:INFO:	Eye window for uplink 25: XXXX__________________________________XX
Data delay found: 20
14:27:48:setup_element:INFO:	Eye window for uplink 26: X________________________________XXXXXXX
Data delay found: 16
14:27:48:setup_element:INFO:	Eye window for uplink 27: XXXXXX_______________________________XXX
Data delay found: 21
14:27:48:setup_element:INFO:	Eye window for uplink 28: XXXXXXX________________________________X
Data delay found: 22
14:27:48:setup_element:INFO:	Eye window for uplink 29: ___XXXXXX_______________________________
Data delay found: 25
14:27:48:setup_element:INFO:	Eye window for uplink 30: ___XXXXXXXXX____________________________
Data delay found: 27
14:27:48:setup_element:INFO:	Eye window for uplink 31: _____XXXXX______________________________
Data delay found: 27
14:27:48:setup_element:INFO:	Setting the data phase to 4 for uplink 16
14:27:48:setup_element:INFO:	Setting the data phase to 1 for uplink 17
14:27:48:setup_element:INFO:	Setting the data phase to 8 for uplink 18
14:27:48:setup_element:INFO:	Setting the data phase to 5 for uplink 19
14:27:48:setup_element:INFO:	Setting the data phase to 2 for uplink 20
14:27:48:setup_element:INFO:	Setting the data phase to 1 for uplink 21
14:27:48:setup_element:INFO:	Setting the data phase to 8 for uplink 22
14:27:48:setup_element:INFO:	Setting the data phase to 4 for uplink 23
14:27:48:setup_element:INFO:	Setting the data phase to 16 for uplink 24
14:27:48:setup_element:INFO:	Setting the data phase to 20 for uplink 25
14:27:49:setup_element:INFO:	Setting the data phase to 16 for uplink 26
14:27:49:setup_element:INFO:	Setting the data phase to 21 for uplink 27
14:27:49:setup_element:INFO:	Setting the data phase to 22 for uplink 28
14:27:49:setup_element:INFO:	Setting the data phase to 25 for uplink 29
14:27:49:setup_element:INFO:	Setting the data phase to 27 for uplink 30
14:27:49:setup_element:INFO:	Setting the data phase to 27 for uplink 31
14:27:49:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 72
    Eye Windows:
      Uplink 16: ___________________________________________________________________XXX__________
      Uplink 17: ___________________________________________________________________XXX__________
      Uplink 18: ____________________________________________________________________XXXX________
      Uplink 19: ____________________________________________________________________XXXX________
      Uplink 20: __________________________________________________________________XXXXX_________
      Uplink 21: __________________________________________________________________XXXXX_________
      Uplink 22: ___________________________________________________________________XXXXX________
      Uplink 23: ___________________________________________________________________XXXXX________
      Uplink 24: __________________________________________________________________XXXXX_________
      Uplink 25: __________________________________________________________________XXXXX_________
      Uplink 26: ___________________________________________________________________XXXXX________
      Uplink 27: ___________________________________________________________________XXXXX________
      Uplink 28: ____________________________________________________________________XXXX________
      Uplink 29: ____________________________________________________________________XXXX________
      Uplink 30: _____________________________________________________________________XXXXX______
      Uplink 31: _____________________________________________________________________XXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 4
      Window Length: 32
      Eye Window: _____________________XXXXXXXX___________
    Uplink 17:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 18:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 19:
      Optimal Phase: 5
      Window Length: 33
      Eye Window: ______________________XXXXXXX___________
    Uplink 20:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 21:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 22:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 23:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 26:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 31
      Eye Window: XXXXXX_______________________________XXX
    Uplink 28:
      Optimal Phase: 22
      Window Length: 32
      Eye Window: XXXXXXX________________________________X
    Uplink 29:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 30:
      Optimal Phase: 27
      Window Length: 31
      Eye Window: ___XXXXXXXXX____________________________
    Uplink 31:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
]
14:27:49:setup_element:INFO:	Beginning SMX ASICs map scan
14:27:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:27:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:27:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:27:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:27:49:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:27:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:27:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:27:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:27:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:27:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:27:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:27:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:27:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:27:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:27:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:27:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:27:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:27:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:27:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:27:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:27:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:27:51:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 72
    Eye Windows:
      Uplink 16: ___________________________________________________________________XXX__________
      Uplink 17: ___________________________________________________________________XXX__________
      Uplink 18: ____________________________________________________________________XXXX________
      Uplink 19: ____________________________________________________________________XXXX________
      Uplink 20: __________________________________________________________________XXXXX_________
      Uplink 21: __________________________________________________________________XXXXX_________
      Uplink 22: ___________________________________________________________________XXXXX________
      Uplink 23: ___________________________________________________________________XXXXX________
      Uplink 24: __________________________________________________________________XXXXX_________
      Uplink 25: __________________________________________________________________XXXXX_________
      Uplink 26: ___________________________________________________________________XXXXX________
      Uplink 27: ___________________________________________________________________XXXXX________
      Uplink 28: ____________________________________________________________________XXXX________
      Uplink 29: ____________________________________________________________________XXXX________
      Uplink 30: _____________________________________________________________________XXXXX______
      Uplink 31: _____________________________________________________________________XXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 4
      Window Length: 32
      Eye Window: _____________________XXXXXXXX___________
    Uplink 17:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 18:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 19:
      Optimal Phase: 5
      Window Length: 33
      Eye Window: ______________________XXXXXXX___________
    Uplink 20:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 21:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 22:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 23:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 26:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 31
      Eye Window: XXXXXX_______________________________XXX
    Uplink 28:
      Optimal Phase: 22
      Window Length: 32
      Eye Window: XXXXXXX________________________________X
    Uplink 29:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 30:
      Optimal Phase: 27
      Window Length: 31
      Eye Window: ___XXXXXXXXX____________________________
    Uplink 31:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________

14:27:51:setup_element:INFO:	Performing Elink synchronization
14:27:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:27:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:27:51:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:27:51:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:27:51:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:27:51:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:27:51:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
14:27:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:27:53:febtest:INFO:	23-00 | XA-000-08-003-000-001-093-11 | -102.5 | 1578.5
14:27:53:febtest:INFO:	30-01 | XA-000-08-003-000-001-087-11 | -120.8 | 1578.5
14:27:53:febtest:INFO:	21-02 | XA-000-08-003-000-001-085-11 | -111.6 | 1578.5
14:27:53:febtest:INFO:	28-03 | XA-000-08-003-000-001-094-11 | -93.3 | 1578.5
14:27:54:febtest:INFO:	19-04 | XA-000-08-003-000-001-089-11 | -87.1 | 1578.5
14:27:54:febtest:INFO:	26-05 | XA-000-08-003-000-001-083-11 | -99.4 | 1578.5
14:27:54:febtest:INFO:	17-06 | XA-000-08-003-000-001-096-02 | -90.2 | 1578.5
14:27:54:febtest:INFO:	24-07 | XA-000-08-003-000-001-088-11 | -102.5 | 1578.5
14:27:55:ST3_smx:INFO:	Configuring SMX FAST
14:27:57:ST3_smx:INFO:	chip: 23-0 	 -77.897670 C 	 1578.532875 mV
14:27:57:ST3_smx:INFO:		Electrons
14:27:57:ST3_smx:INFO:	# loops 0
14:28:00:ST3_smx:INFO:	# loops 1
14:28:02:ST3_smx:INFO:	# loops 2
14:28:04:ST3_smx:INFO:	# loops 3
14:28:06:ST3_smx:INFO:	# loops 4
14:28:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:28:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:28:08:ST3_smx:INFO:	Total # of broken channels: 128
14:28:08:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:28:08:ST3_smx:INFO:	Total # of broken channels: 128
14:28:08:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:28:08:ST3_smx:INFO:	Configuring SMX FAST
14:28:11:ST3_smx:INFO:	chip: 30-1 	 -77.897670 C 	 1578.532875 mV
14:28:11:ST3_smx:INFO:		Electrons
14:28:11:ST3_smx:INFO:	# loops 0
14:28:13:ST3_smx:INFO:	# loops 1
14:28:15:ST3_smx:INFO:	# loops 2
14:28:17:ST3_smx:INFO:	# loops 3
14:28:19:ST3_smx:INFO:	# loops 4
14:28:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:28:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:28:21:ST3_smx:INFO:	Total # of broken channels: 128
14:28:21:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:28:21:ST3_smx:INFO:	Total # of broken channels: 128
14:28:21:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:28:22:ST3_smx:INFO:	Configuring SMX FAST
14:28:25:ST3_smx:INFO:	chip: 21-2 	 15.590880 C 	 1300.290540 mV
14:28:25:ST3_smx:INFO:		Electrons
14:28:25:ST3_smx:INFO:	# loops 0
14:28:27:ST3_smx:INFO:	# loops 1
14:28:29:ST3_smx:INFO:	# loops 2
14:28:31:ST3_smx:INFO:	# loops 3
14:28:34:ST3_smx:INFO:	# loops 4
14:28:36:ST3_smx:INFO:	Total # of broken channels: 0
14:28:36:ST3_smx:INFO:	List of broken channels: []
14:28:36:ST3_smx:INFO:	Total # of broken channels: 0
14:28:36:ST3_smx:INFO:	List of broken channels: []
14:28:37:ST3_smx:INFO:	Configuring SMX FAST
14:28:39:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1242.040240 mV
14:28:39:ST3_smx:INFO:		Electrons
14:28:39:ST3_smx:INFO:	# loops 0
14:28:41:ST3_smx:INFO:	# loops 1
14:28:44:ST3_smx:INFO:	# loops 2
14:28:46:ST3_smx:INFO:	# loops 3
14:28:48:ST3_smx:INFO:	# loops 4
14:28:50:ST3_smx:INFO:	Total # of broken channels: 0
14:28:50:ST3_smx:INFO:	List of broken channels: []
14:28:50:ST3_smx:INFO:	Total # of broken channels: 0
14:28:50:ST3_smx:INFO:	List of broken channels: []
14:28:51:ST3_smx:INFO:	Configuring SMX FAST
14:28:54:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1242.040240 mV
14:28:54:ST3_smx:INFO:		Electrons
14:28:54:ST3_smx:INFO:	# loops 0
14:28:56:ST3_smx:INFO:	# loops 1
14:28:58:ST3_smx:INFO:	# loops 2
14:29:00:ST3_smx:INFO:	# loops 3
14:29:02:ST3_smx:INFO:	# loops 4
14:29:04:ST3_smx:INFO:	Total # of broken channels: 0
14:29:04:ST3_smx:INFO:	List of broken channels: []
14:29:04:ST3_smx:INFO:	Total # of broken channels: 0
14:29:04:ST3_smx:INFO:	List of broken channels: []
14:29:05:ST3_smx:INFO:	Configuring SMX FAST
14:29:08:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1259.567515 mV
14:29:08:ST3_smx:INFO:		Electrons
14:29:08:ST3_smx:INFO:	# loops 0
14:29:10:ST3_smx:INFO:	# loops 1
14:29:12:ST3_smx:INFO:	# loops 2
14:29:14:ST3_smx:INFO:	# loops 3
14:29:16:ST3_smx:INFO:	# loops 4
14:29:18:ST3_smx:INFO:	Total # of broken channels: 0
14:29:18:ST3_smx:INFO:	List of broken channels: []
14:29:18:ST3_smx:INFO:	Total # of broken channels: 0
14:29:18:ST3_smx:INFO:	List of broken channels: []
14:29:19:ST3_smx:INFO:	Configuring SMX FAST
14:29:21:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1253.730060 mV
14:29:21:ST3_smx:INFO:		Electrons
14:29:21:ST3_smx:INFO:	# loops 0
14:29:23:ST3_smx:INFO:	# loops 1
14:29:26:ST3_smx:INFO:	# loops 2
14:29:28:ST3_smx:INFO:	# loops 3
14:29:30:ST3_smx:INFO:	# loops 4
14:29:32:ST3_smx:INFO:	Total # of broken channels: 0
14:29:32:ST3_smx:INFO:	List of broken channels: []
14:29:32:ST3_smx:INFO:	Total # of broken channels: 0
14:29:32:ST3_smx:INFO:	List of broken channels: []
14:29:33:ST3_smx:INFO:	Configuring SMX FAST
14:29:35:ST3_smx:INFO:	chip: 24-7 	 21.902970 C 	 1277.050060 mV
14:29:35:ST3_smx:INFO:		Electrons
14:29:35:ST3_smx:INFO:	# loops 0
14:29:37:ST3_smx:INFO:	# loops 1
14:29:40:ST3_smx:INFO:	# loops 2
14:29:42:ST3_smx:INFO:	# loops 3
14:29:44:ST3_smx:INFO:	# loops 4
14:29:46:ST3_smx:INFO:	Total # of broken channels: 0
14:29:46:ST3_smx:INFO:	List of broken channels: []
14:29:46:ST3_smx:INFO:	Total # of broken channels: 0
14:29:46:ST3_smx:INFO:	List of broken channels: []
14:29:47:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:29:47:febtest:INFO:	23-00 | XA-000-08-003-000-001-093-11 |  21.9 | 1277.1
14:29:48:febtest:INFO:	30-01 | XA-000-08-003-000-001-087-11 |   9.3 | 1311.9
14:29:48:febtest:INFO:	21-02 | XA-000-08-003-000-001-085-11 |  18.7 | 1294.5
14:29:48:febtest:INFO:	28-03 | XA-000-08-003-000-001-094-11 |  31.4 | 1242.0
14:29:48:febtest:INFO:	19-04 | XA-000-08-003-000-001-089-11 |  34.6 | 1242.0
14:29:48:febtest:INFO:	26-05 | XA-000-08-003-000-001-083-11 |  25.1 | 1259.6
14:29:49:febtest:INFO:	17-06 | XA-000-08-003-000-001-096-02 |  31.4 | 1253.7
14:29:49:febtest:INFO:	24-07 | XA-000-08-003-000-001-088-11 |  21.9 | 1277.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_21-14_27_25
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3T2010172B2 124 B

FEB_SN : 4006
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
SENSOR_ID:	18264

MODULE_NAME:	L5UL301017 M5UL3T2010172B2 124 B

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '2.3090', '2.800', '0.4407']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7930', '2.800', '0.3254']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7910', '2.800', '0.3254']