14:32:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:32:47:ST3_Shared:INFO:	                       FEB-Microcable                       
14:32:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:32:47:febtest:INFO:	Testing FEB with SN 4016
14:32:50:smx_tester:INFO:	Scanning setup
14:32:50:elinks:INFO:	Disabling clock on downlink 0
14:32:50:elinks:INFO:	Disabling clock on downlink 1
14:32:50:elinks:INFO:	Disabling clock on downlink 2
14:32:50:elinks:INFO:	Disabling clock on downlink 3
14:32:50:elinks:INFO:	Disabling clock on downlink 4
14:32:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:32:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:32:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:32:50:elinks:INFO:	Disabling clock on downlink 0
14:32:50:elinks:INFO:	Disabling clock on downlink 1
14:32:50:elinks:INFO:	Disabling clock on downlink 2
14:32:50:elinks:INFO:	Disabling clock on downlink 3
14:32:50:elinks:INFO:	Disabling clock on downlink 4
14:32:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:32:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:32:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:32:50:elinks:INFO:	Disabling clock on downlink 0
14:32:50:elinks:INFO:	Disabling clock on downlink 1
14:32:50:elinks:INFO:	Disabling clock on downlink 2
14:32:50:elinks:INFO:	Disabling clock on downlink 3
14:32:50:elinks:INFO:	Disabling clock on downlink 4
14:32:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:32:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:32:50:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:32:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:32:50:elinks:INFO:	Disabling clock on downlink 0
14:32:50:elinks:INFO:	Disabling clock on downlink 1
14:32:50:elinks:INFO:	Disabling clock on downlink 2
14:32:50:elinks:INFO:	Disabling clock on downlink 3
14:32:50:elinks:INFO:	Disabling clock on downlink 4
14:32:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:32:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:32:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:32:51:elinks:INFO:	Disabling clock on downlink 0
14:32:51:elinks:INFO:	Disabling clock on downlink 1
14:32:51:elinks:INFO:	Disabling clock on downlink 2
14:32:51:elinks:INFO:	Disabling clock on downlink 3
14:32:51:elinks:INFO:	Disabling clock on downlink 4
14:32:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:32:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:32:51:setup_element:INFO:	Scanning clock phase
14:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:32:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:32:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:32:51:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:32:51:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:32:51:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXX_______
Clock Delay: 30
14:32:51:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXX_______
Clock Delay: 30
14:32:51:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:32:51:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXX_____
Clock Delay: 32
14:32:51:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXX_____
Clock Delay: 32
14:32:51:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
14:32:51:setup_element:INFO:	Scanning data phases
14:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:32:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:32:56:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:32:56:setup_element:INFO:	Eye window for uplink 16: _______________________________XXXXXX___
Data delay found: 13
14:32:56:setup_element:INFO:	Eye window for uplink 17: ____________________________XXXXX_______
Data delay found: 10
14:32:56:setup_element:INFO:	Eye window for uplink 18: _______________________________XXXXXXXXX
Data delay found: 15
14:32:56:setup_element:INFO:	Eye window for uplink 19: ____________________________XXXXX____XXX
Data delay found: 13
14:32:56:setup_element:INFO:	Eye window for uplink 20: ____________________________XXXXXX______
Data delay found: 10
14:32:56:setup_element:INFO:	Eye window for uplink 21: ___________________________XXXXXX_______
Data delay found: 9
14:32:56:setup_element:INFO:	Eye window for uplink 24: XXX________________________________XXXXX
Data delay found: 18
14:32:56:setup_element:INFO:	Eye window for uplink 25: XXXXXX__________________________________
Data delay found: 22
14:32:56:setup_element:INFO:	Eye window for uplink 26: XXXXX________________________________XXX
Data delay found: 20
14:32:56:setup_element:INFO:	Eye window for uplink 27: __XXXXXXXX______________________________
Data delay found: 25
14:32:56:setup_element:INFO:	Eye window for uplink 28: __XXXXXXX_______________________________
Data delay found: 25
14:32:56:setup_element:INFO:	Eye window for uplink 29: _____XXXXXX_____________________________
Data delay found: 27
14:32:56:setup_element:INFO:	Eye window for uplink 30: ______XXXXXXX___________________________
Data delay found: 29
14:32:56:setup_element:INFO:	Eye window for uplink 31: _______XXXXX____________________________
Data delay found: 29
14:32:56:setup_element:INFO:	Setting the data phase to 13 for uplink 16
14:32:56:setup_element:INFO:	Setting the data phase to 10 for uplink 17
14:32:56:setup_element:INFO:	Setting the data phase to 15 for uplink 18
14:32:56:setup_element:INFO:	Setting the data phase to 13 for uplink 19
14:32:56:setup_element:INFO:	Setting the data phase to 10 for uplink 20
14:32:56:setup_element:INFO:	Setting the data phase to 9 for uplink 21
14:32:56:setup_element:INFO:	Setting the data phase to 18 for uplink 24
14:32:56:setup_element:INFO:	Setting the data phase to 22 for uplink 25
14:32:56:setup_element:INFO:	Setting the data phase to 20 for uplink 26
14:32:56:setup_element:INFO:	Setting the data phase to 25 for uplink 27
14:32:56:setup_element:INFO:	Setting the data phase to 25 for uplink 28
14:32:56:setup_element:INFO:	Setting the data phase to 27 for uplink 29
14:32:56:setup_element:INFO:	Setting the data phase to 29 for uplink 30
14:32:56:setup_element:INFO:	Setting the data phase to 29 for uplink 31
14:32:56:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 73
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXX____
      Uplink 17: ______________________________________________________________________XXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXX_____
      Uplink 19: _____________________________________________________________________XXXXXX_____
      Uplink 20: _____________________________________________________________________XXXXX______
      Uplink 21: _____________________________________________________________________XXXXX______
      Uplink 24: _____________________________________________________________________XXXX_______
      Uplink 25: _____________________________________________________________________XXXX_______
      Uplink 26: _____________________________________________________________________XXXXXX_____
      Uplink 27: _____________________________________________________________________XXXXXX_____
      Uplink 28: _____________________________________________________________________XXXXX______
      Uplink 29: _____________________________________________________________________XXXXX______
      Uplink 30: _______________________________________________________________________XXXX_____
      Uplink 31: _______________________________________________________________________XXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 17:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 18:
      Optimal Phase: 15
      Window Length: 31
      Eye Window: _______________________________XXXXXXXXX
    Uplink 19:
      Optimal Phase: 13
      Window Length: 28
      Eye Window: ____________________________XXXXX____XXX
    Uplink 20:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 21:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 24:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 25:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 26:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 27:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 28:
      Optimal Phase: 25
      Window Length: 33
      Eye Window: __XXXXXXX_______________________________
    Uplink 29:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 30:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 31:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
]
14:32:56:setup_element:INFO:	Beginning SMX ASICs map scan
14:32:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:32:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:32:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:32:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:32:56:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
14:32:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:32:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:32:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:32:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:32:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:32:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:32:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:32:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:32:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:32:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:32:57:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:32:57:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:32:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:32:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:32:59:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 73
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXX____
      Uplink 17: ______________________________________________________________________XXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXX_____
      Uplink 19: _____________________________________________________________________XXXXXX_____
      Uplink 20: _____________________________________________________________________XXXXX______
      Uplink 21: _____________________________________________________________________XXXXX______
      Uplink 24: _____________________________________________________________________XXXX_______
      Uplink 25: _____________________________________________________________________XXXX_______
      Uplink 26: _____________________________________________________________________XXXXXX_____
      Uplink 27: _____________________________________________________________________XXXXXX_____
      Uplink 28: _____________________________________________________________________XXXXX______
      Uplink 29: _____________________________________________________________________XXXXX______
      Uplink 30: _______________________________________________________________________XXXX_____
      Uplink 31: _______________________________________________________________________XXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 17:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 18:
      Optimal Phase: 15
      Window Length: 31
      Eye Window: _______________________________XXXXXXXXX
    Uplink 19:
      Optimal Phase: 13
      Window Length: 28
      Eye Window: ____________________________XXXXX____XXX
    Uplink 20:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 21:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 24:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 25:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 26:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 27:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 28:
      Optimal Phase: 25
      Window Length: 33
      Eye Window: __XXXXXXX_______________________________
    Uplink 29:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 30:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 31:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________

14:32:59:setup_element:INFO:	Performing Elink synchronization
14:32:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:32:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:32:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:32:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:32:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:32:59:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
14:32:59:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
14:33:00:febtest:ERROR:	HW addres 1 != 0
14:33:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:33:07:febtest:INFO:	30-01 | XA-000-08-003-000-001-111-02 |  34.6 | 1230.3
14:33:07:febtest:INFO:	21-02 | XA-000-08-003-000-001-156-04 |  28.2 | 1253.7
14:33:07:febtest:INFO:	28-03 | XA-000-08-003-000-001-164-13 |  34.6 | 1224.5
14:33:07:febtest:INFO:	19-04 | XA-000-08-003-000-001-166-13 |  31.4 | 1230.3
14:33:08:febtest:INFO:	26-05 | XA-000-08-003-000-001-155-04 |  25.1 | 1265.4
14:33:08:febtest:INFO:	17-06 | XA-000-08-003-000-001-162-13 |  18.7 | 1271.2
14:33:08:febtest:INFO:	24-07 | XA-000-08-003-000-001-165-13 |  28.2 | 1236.2
14:33:08:ST3_smx:INFO:	Configuring SMX FAST
14:33:10:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1242.040240 mV
14:33:10:ST3_smx:INFO:		Electrons
14:33:10:ST3_smx:INFO:	# loops 0
14:33:12:ST3_smx:INFO:	# loops 1
14:33:14:ST3_smx:INFO:	# loops 2
14:33:16:ST3_smx:INFO:	Total # of broken channels: 0
14:33:16:ST3_smx:INFO:	List of broken channels: []
14:33:16:ST3_smx:INFO:	Total # of broken channels: 0
14:33:16:ST3_smx:INFO:	List of broken channels: []
14:33:17:ST3_smx:INFO:	Configuring SMX FAST
14:33:19:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1259.567515 mV
14:33:19:ST3_smx:INFO:		Electrons
14:33:19:ST3_smx:INFO:	# loops 0
14:33:21:ST3_smx:INFO:	# loops 1
14:33:23:ST3_smx:INFO:	# loops 2
14:33:25:ST3_smx:INFO:	Total # of broken channels: 0
14:33:25:ST3_smx:INFO:	List of broken channels: []
14:33:25:ST3_smx:INFO:	Total # of broken channels: 0
14:33:25:ST3_smx:INFO:	List of broken channels: []
14:33:26:ST3_smx:INFO:	Configuring SMX FAST
14:33:27:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1218.600960 mV
14:33:27:ST3_smx:INFO:		Electrons
14:33:27:ST3_smx:INFO:	# loops 0
14:33:29:ST3_smx:INFO:	# loops 1
14:33:30:ST3_smx:INFO:	# loops 2
14:33:32:ST3_smx:INFO:	Total # of broken channels: 0
14:33:32:ST3_smx:INFO:	List of broken channels: []
14:33:32:ST3_smx:INFO:	Total # of broken channels: 0
14:33:32:ST3_smx:INFO:	List of broken channels: []
14:33:33:ST3_smx:INFO:	Configuring SMX FAST
14:33:35:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1212.728715 mV
14:33:35:ST3_smx:INFO:		Electrons
14:33:35:ST3_smx:INFO:	# loops 0
14:33:36:ST3_smx:INFO:	# loops 1
14:33:38:ST3_smx:INFO:	# loops 2
14:33:40:ST3_smx:INFO:	Total # of broken channels: 0
14:33:40:ST3_smx:INFO:	List of broken channels: []
14:33:40:ST3_smx:INFO:	Total # of broken channels: 0
14:33:40:ST3_smx:INFO:	List of broken channels: []
14:33:41:ST3_smx:INFO:	Configuring SMX FAST
14:33:43:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1247.887635 mV
14:33:43:ST3_smx:INFO:		Electrons
14:33:43:ST3_smx:INFO:	# loops 0
14:33:44:ST3_smx:INFO:	# loops 1
14:33:46:ST3_smx:INFO:	# loops 2
14:33:47:ST3_smx:INFO:	Total # of broken channels: 0
14:33:47:ST3_smx:INFO:	List of broken channels: []
14:33:47:ST3_smx:INFO:	Total # of broken channels: 0
14:33:47:ST3_smx:INFO:	List of broken channels: []
14:33:48:ST3_smx:INFO:	Configuring SMX FAST
14:33:50:ST3_smx:INFO:	chip: 17-6 	 25.062742 C 	 1253.730060 mV
14:33:50:ST3_smx:INFO:		Electrons
14:33:50:ST3_smx:INFO:	# loops 0
14:33:52:ST3_smx:INFO:	# loops 1
14:33:53:ST3_smx:INFO:	# loops 2
14:33:55:ST3_smx:INFO:	Total # of broken channels: 0
14:33:55:ST3_smx:INFO:	List of broken channels: []
14:33:55:ST3_smx:INFO:	Total # of broken channels: 0
14:33:55:ST3_smx:INFO:	List of broken channels: []
14:33:56:ST3_smx:INFO:	Configuring SMX FAST
14:33:57:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1230.330540 mV
14:33:57:ST3_smx:INFO:		Electrons
14:33:57:ST3_smx:INFO:	# loops 0
14:33:59:ST3_smx:INFO:	# loops 1
14:34:00:ST3_smx:INFO:	# loops 2
14:34:02:ST3_smx:INFO:	Total # of broken channels: 0
14:34:02:ST3_smx:INFO:	List of broken channels: []
14:34:02:ST3_smx:INFO:	Total # of broken channels: 0
14:34:02:ST3_smx:INFO:	List of broken channels: []
14:34:03:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:03:febtest:INFO:	30-01 | XA-000-08-003-000-001-111-02 |  31.4 | 1259.6
14:34:03:febtest:INFO:	21-02 | XA-000-08-003-000-001-156-04 |  21.9 | 1277.1
14:34:04:febtest:INFO:	28-03 | XA-000-08-003-000-001-164-13 |  34.6 | 1247.9
14:34:04:febtest:INFO:	19-04 | XA-000-08-003-000-001-166-13 |  34.6 | 1224.5
14:34:04:febtest:INFO:	26-05 | XA-000-08-003-000-001-155-04 |  28.2 | 1259.6
14:34:04:febtest:INFO:	17-06 | XA-000-08-003-000-001-162-13 |  25.1 | 1259.6
14:34:04:febtest:INFO:	24-07 | XA-000-08-003-000-001-165-13 |  37.7 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_04_25-14_32_47
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 4016
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.5100', '2.800', '2.6010']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7930', '2.800', '0.5859']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.7920', '2.800', '0.5049']