14:02:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:13:ST3_Shared:INFO:	                       FEB-Microcable                       
14:02:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:14:febtest:INFO:	Testing FEB with SN 4018
14:02:16:smx_tester:INFO:	Scanning setup
14:02:16:elinks:INFO:	Disabling clock on downlink 0
14:02:16:elinks:INFO:	Disabling clock on downlink 1
14:02:16:elinks:INFO:	Disabling clock on downlink 2
14:02:16:elinks:INFO:	Disabling clock on downlink 3
14:02:16:elinks:INFO:	Disabling clock on downlink 4
14:02:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:02:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:02:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:02:17:elinks:INFO:	Disabling clock on downlink 0
14:02:17:elinks:INFO:	Disabling clock on downlink 1
14:02:17:elinks:INFO:	Disabling clock on downlink 2
14:02:17:elinks:INFO:	Disabling clock on downlink 3
14:02:17:elinks:INFO:	Disabling clock on downlink 4
14:02:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:02:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:02:17:elinks:INFO:	Disabling clock on downlink 0
14:02:17:elinks:INFO:	Disabling clock on downlink 1
14:02:17:elinks:INFO:	Disabling clock on downlink 2
14:02:17:elinks:INFO:	Disabling clock on downlink 3
14:02:17:elinks:INFO:	Disabling clock on downlink 4
14:02:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:02:17:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:02:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:02:17:elinks:INFO:	Disabling clock on downlink 0
14:02:17:elinks:INFO:	Disabling clock on downlink 1
14:02:17:elinks:INFO:	Disabling clock on downlink 2
14:02:17:elinks:INFO:	Disabling clock on downlink 3
14:02:17:elinks:INFO:	Disabling clock on downlink 4
14:02:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:02:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:02:17:elinks:INFO:	Disabling clock on downlink 0
14:02:17:elinks:INFO:	Disabling clock on downlink 1
14:02:17:elinks:INFO:	Disabling clock on downlink 2
14:02:17:elinks:INFO:	Disabling clock on downlink 3
14:02:17:elinks:INFO:	Disabling clock on downlink 4
14:02:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:02:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:02:17:setup_element:INFO:	Scanning clock phase
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:02:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:02:17:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:02:17:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
14:02:17:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
14:02:17:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:02:17:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:02:17:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:02:17:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:02:17:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:02:17:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
14:02:17:setup_element:INFO:	Scanning data phases
14:02:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:02:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:02:22:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:02:22:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
14:02:22:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
14:02:23:setup_element:INFO:	Eye window for uplink 22: ___________________________________XXXX_
Data delay found: 16
14:02:23:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
14:02:23:setup_element:INFO:	Eye window for uplink 24: __XXXXX_________________________________
Data delay found: 24
14:02:23:setup_element:INFO:	Eye window for uplink 25: _____XXXXX______________________________
Data delay found: 27
14:02:23:setup_element:INFO:	Eye window for uplink 26: __XXXXX_________________________________
Data delay found: 24
14:02:23:setup_element:INFO:	Eye window for uplink 27: ______XXXXXXX___________________________
Data delay found: 29
14:02:23:setup_element:INFO:	Eye window for uplink 28: _______XXXXXX___________XXXXXXXXXXXXXXXX
Data delay found: 18
14:02:23:setup_element:INFO:	Eye window for uplink 29: _________XXXXXX_________XXXXXXXXXXXXXXXX
Data delay found: 4
14:02:23:setup_element:INFO:	Eye window for uplink 30: _______XXXXXXX__________________________
Data delay found: 30
14:02:23:setup_element:INFO:	Eye window for uplink 31: ________XXXXX___________________________
Data delay found: 30
14:02:23:setup_element:INFO:	Setting the data phase to 14 for uplink 20
14:02:23:setup_element:INFO:	Setting the data phase to 13 for uplink 21
14:02:23:setup_element:INFO:	Setting the data phase to 16 for uplink 22
14:02:23:setup_element:INFO:	Setting the data phase to 12 for uplink 23
14:02:23:setup_element:INFO:	Setting the data phase to 24 for uplink 24
14:02:23:setup_element:INFO:	Setting the data phase to 27 for uplink 25
14:02:23:setup_element:INFO:	Setting the data phase to 24 for uplink 26
14:02:23:setup_element:INFO:	Setting the data phase to 29 for uplink 27
14:02:23:setup_element:INFO:	Setting the data phase to 18 for uplink 28
14:02:23:setup_element:INFO:	Setting the data phase to 4 for uplink 29
14:02:23:setup_element:INFO:	Setting the data phase to 30 for uplink 30
14:02:23:setup_element:INFO:	Setting the data phase to 30 for uplink 31
14:02:23:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 74
    Eye Windows:
      Uplink 20: ________________________________________________________________________XXXXXX__
      Uplink 21: ________________________________________________________________________XXXXXX__
      Uplink 22: ________________________________________________________________________________
      Uplink 23: ________________________________________________________________________________
      Uplink 24: ________________________________________________________________________XXXXXX__
      Uplink 25: ________________________________________________________________________XXXXXX__
      Uplink 26: _________________________________________________________________________XXXXX__
      Uplink 27: _________________________________________________________________________XXXXX__
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: _________________________________________________________________________XXXXX__
      Uplink 31: _________________________________________________________________________XXXXX__
  Data phase characteristics:
    Uplink 20:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 21:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 22:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 23:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 24:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 26:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 27:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 28:
      Optimal Phase: 18
      Window Length: 11
      Eye Window: _______XXXXXX___________XXXXXXXXXXXXXXXX
    Uplink 29:
      Optimal Phase: 4
      Window Length: 9
      Eye Window: _________XXXXXX_________XXXXXXXXXXXXXXXX
    Uplink 30:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 31:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
]
14:02:23:setup_element:INFO:	Beginning SMX ASICs map scan
14:02:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:02:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:02:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:02:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:02:23:uplink:INFO:	Setting uplinks mask [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:02:23:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:02:23:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:02:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:02:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:02:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:02:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:02:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:02:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:02:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:02:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:02:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:02:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:02:25:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 74
    Eye Windows:
      Uplink 20: ________________________________________________________________________XXXXXX__
      Uplink 21: ________________________________________________________________________XXXXXX__
      Uplink 22: ________________________________________________________________________________
      Uplink 23: ________________________________________________________________________________
      Uplink 24: ________________________________________________________________________XXXXXX__
      Uplink 25: ________________________________________________________________________XXXXXX__
      Uplink 26: _________________________________________________________________________XXXXX__
      Uplink 27: _________________________________________________________________________XXXXX__
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: _________________________________________________________________________XXXXX__
      Uplink 31: _________________________________________________________________________XXXXX__
  Data phase characteristics:
    Uplink 20:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 21:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 22:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 23:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 24:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 26:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 27:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 28:
      Optimal Phase: 18
      Window Length: 11
      Eye Window: _______XXXXXX___________XXXXXXXXXXXXXXXX
    Uplink 29:
      Optimal Phase: 4
      Window Length: 9
      Eye Window: _________XXXXXX_________XXXXXXXXXXXXXXXX
    Uplink 30:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 31:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________

14:02:25:setup_element:INFO:	Performing Elink synchronization
14:02:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:02:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:02:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:02:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:02:25:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:02:25:uplink:INFO:	Enabling uplinks [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:02:25:ST3_emu:INFO:	Number of chips: 6
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
FEB type: B FEB_A: 0 FEB_B: 1
14:02:26:febtest:ERROR:	HW addres 5 != 4
14:02:31:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:02:31:febtest:INFO:	23-00 | XA-000-08-003-000-001-219-01 |  31.4 | 1294.5
14:02:31:febtest:INFO:	30-01 | XA-000-08-003-000-001-183-10 |  37.7 | 1212.7
14:02:31:febtest:INFO:	21-02 | XA-000-08-003-000-002-016-00 |  25.1 | 1236.2
14:02:31:febtest:INFO:	28-03 | XA-000-08-003-000-001-188-10 |  34.6 | 1212.7
14:02:32:febtest:INFO:	26-05 | XA-000-08-003-000-001-233-08 |  25.1 | 1247.9
14:02:32:febtest:INFO:	24-07 | XA-000-08-003-000-001-225-08 |  21.9 | 1253.7
14:02:32:ST3_smx:INFO:	Configuring SMX FAST
14:02:34:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1236.187875 mV
14:02:34:ST3_smx:INFO:		Electrons
14:02:34:ST3_smx:INFO:	# loops 0
14:02:35:ST3_smx:INFO:	# loops 1
14:02:37:ST3_smx:INFO:	# loops 2
14:02:39:ST3_smx:INFO:	Total # of broken channels: 0
14:02:39:ST3_smx:INFO:	List of broken channels: []
14:02:39:ST3_smx:INFO:	Total # of broken channels: 0
14:02:39:ST3_smx:INFO:	List of broken channels: []
14:02:40:ST3_smx:INFO:	Configuring SMX FAST
14:02:42:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1206.851500 mV
14:02:42:ST3_smx:INFO:		Electrons
14:02:42:ST3_smx:INFO:	# loops 0
14:02:43:ST3_smx:INFO:	# loops 1
14:02:45:ST3_smx:INFO:	# loops 2
14:02:46:ST3_smx:INFO:	Total # of broken channels: 0
14:02:46:ST3_smx:INFO:	List of broken channels: []
14:02:46:ST3_smx:INFO:	Total # of broken channels: 0
14:02:46:ST3_smx:INFO:	List of broken channels: []
14:02:47:ST3_smx:INFO:	Configuring SMX FAST
14:02:49:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1236.187875 mV
14:02:49:ST3_smx:INFO:		Electrons
14:02:49:ST3_smx:INFO:	# loops 0
14:02:51:ST3_smx:INFO:	# loops 1
14:02:52:ST3_smx:INFO:	# loops 2
14:02:54:ST3_smx:INFO:	Total # of broken channels: 0
14:02:54:ST3_smx:INFO:	List of broken channels: []
14:02:54:ST3_smx:INFO:	Total # of broken channels: 0
14:02:54:ST3_smx:INFO:	List of broken channels: []
14:02:55:ST3_smx:INFO:	Configuring SMX FAST
14:02:56:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1224.468235 mV
14:02:56:ST3_smx:INFO:		Electrons
14:02:56:ST3_smx:INFO:	# loops 0
14:02:58:ST3_smx:INFO:	# loops 1
14:03:00:ST3_smx:INFO:	# loops 2
14:03:01:ST3_smx:INFO:	Total # of broken channels: 0
14:03:01:ST3_smx:INFO:	List of broken channels: []
14:03:01:ST3_smx:INFO:	Total # of broken channels: 40
14:03:01:ST3_smx:INFO:	List of broken channels: [38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 116, 118, 120]
14:03:02:ST3_smx:INFO:	Configuring SMX FAST
14:03:04:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1230.330540 mV
14:03:04:ST3_smx:INFO:		Electrons
14:03:04:ST3_smx:INFO:	# loops 0
14:03:06:ST3_smx:INFO:	# loops 1
14:03:07:ST3_smx:INFO:	# loops 2
14:03:09:ST3_smx:INFO:	Total # of broken channels: 0
14:03:09:ST3_smx:INFO:	List of broken channels: []
14:03:09:ST3_smx:INFO:	Total # of broken channels: 17
14:03:09:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33]
14:03:10:ST3_smx:INFO:	Configuring SMX FAST
14:03:11:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1242.040240 mV
14:03:11:ST3_smx:INFO:		Electrons
14:03:11:ST3_smx:INFO:	# loops 0
14:03:13:ST3_smx:INFO:	# loops 1
14:03:15:ST3_smx:INFO:	# loops 2
14:03:17:ST3_smx:INFO:	Total # of broken channels: 0
14:03:17:ST3_smx:INFO:	List of broken channels: []
14:03:17:ST3_smx:INFO:	Total # of broken channels: 0
14:03:17:ST3_smx:INFO:	List of broken channels: []
14:03:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:03:18:febtest:INFO:	23-00 | XA-000-08-003-000-001-219-01 |  44.1 | 1247.9
14:03:18:febtest:INFO:	30-01 | XA-000-08-003-000-001-183-10 |  37.7 | 1218.6
14:03:18:febtest:INFO:	21-02 | XA-000-08-003-000-002-016-00 |  25.1 | 1247.9
14:03:18:febtest:INFO:	28-03 | XA-000-08-003-000-001-188-10 |  31.4 | 1230.3
14:03:18:febtest:INFO:	26-05 | XA-000-08-003-000-001-233-08 |  31.4 | 1230.3
14:03:19:febtest:INFO:	24-07 | XA-000-08-003-000-001-225-08 |  28.2 | 1242.0
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_07-14_02_13
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 4018
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.199', '1.3130', '2.800', '2.0830']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.4120', '2.800', '0.2365']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.200', '1.4100', '2.800', '0.2366']