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FEB_4020 05.06.24 11:01:55
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11:01:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:01:55:ST3_Shared:INFO: FEB-Sensor
11:01:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:01:58:ST3_ModuleSelector:INFO: L5UL101016 M5UL1T4010164B2 124 C
11:01:58:ST3_ModuleSelector:INFO: 02204
11:01:58:febtest:INFO: Testing FEB with SN 4020
11:02:01:smx_tester:INFO: Scanning setup
11:02:01:elinks:INFO: Disabling clock on downlink 0
11:02:01:elinks:INFO: Disabling clock on downlink 1
11:02:01:elinks:INFO: Disabling clock on downlink 2
11:02:01:elinks:INFO: Disabling clock on downlink 3
11:02:01:elinks:INFO: Disabling clock on downlink 4
11:02:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:01:elinks:INFO: Disabling clock on downlink 0
11:02:01:elinks:INFO: Disabling clock on downlink 1
11:02:01:elinks:INFO: Disabling clock on downlink 2
11:02:01:elinks:INFO: Disabling clock on downlink 3
11:02:01:elinks:INFO: Disabling clock on downlink 4
11:02:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:01:elinks:INFO: Disabling clock on downlink 0
11:02:01:elinks:INFO: Disabling clock on downlink 1
11:02:01:elinks:INFO: Disabling clock on downlink 2
11:02:01:elinks:INFO: Disabling clock on downlink 3
11:02:01:elinks:INFO: Disabling clock on downlink 4
11:02:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:02:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:02:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:01:elinks:INFO: Disabling clock on downlink 0
11:02:01:elinks:INFO: Disabling clock on downlink 1
11:02:01:elinks:INFO: Disabling clock on downlink 2
11:02:01:elinks:INFO: Disabling clock on downlink 3
11:02:01:elinks:INFO: Disabling clock on downlink 4
11:02:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:02:elinks:INFO: Disabling clock on downlink 0
11:02:02:elinks:INFO: Disabling clock on downlink 1
11:02:02:elinks:INFO: Disabling clock on downlink 2
11:02:02:elinks:INFO: Disabling clock on downlink 3
11:02:02:elinks:INFO: Disabling clock on downlink 4
11:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:02:setup_element:INFO: Scanning clock phase
11:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:02:02:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:02:02:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:02:02:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:02:02:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:02:02:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:02:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:02:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:02:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:02:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:02:02:setup_element:INFO: Eye window for uplink 30: X___________________________________________________________________________XXXX
Clock Delay: 38
11:02:02:setup_element:INFO: Eye window for uplink 31: X___________________________________________________________________________XXXX
Clock Delay: 38
11:02:02:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 2
11:02:02:setup_element:INFO: Scanning data phases
11:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:07:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:02:07:setup_element:INFO: Eye window for uplink 16: _____________________________XXXXXXX____
Data delay found: 12
11:02:07:setup_element:INFO: Eye window for uplink 17: __________________________XXXXXX________
Data delay found: 8
11:02:07:setup_element:INFO: Eye window for uplink 18: _______________________________XXXXX____
Data delay found: 13
11:02:07:setup_element:INFO: Eye window for uplink 19: ___________________________XXXXXXX______
Data delay found: 10
11:02:07:setup_element:INFO: Eye window for uplink 20: ____________________________XXXXX_______
Data delay found: 10
11:02:07:setup_element:INFO: Eye window for uplink 21: ___________________________XXXXX________
Data delay found: 9
11:02:07:setup_element:INFO: Eye window for uplink 22: _____________________________XXXXX______
Data delay found: 11
11:02:07:setup_element:INFO: Eye window for uplink 23: _________________________XXXXX__________
Data delay found: 7
11:02:07:setup_element:INFO: Eye window for uplink 24: XXXX________________________________XXXX
Data delay found: 19
11:02:07:setup_element:INFO: Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
11:02:07:setup_element:INFO: Eye window for uplink 26: XXXX__________________________________XX
Data delay found: 20
11:02:07:setup_element:INFO: Eye window for uplink 27: ___XXXXXX_______________________________
Data delay found: 25
11:02:07:setup_element:INFO: Eye window for uplink 28: _____XXXXXXX____________________________
Data delay found: 28
11:02:07:setup_element:INFO: Eye window for uplink 29: ________XXXXXXX_________________________
Data delay found: 31
11:02:07:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXX______________________
Data delay found: 34
11:02:07:setup_element:INFO: Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
11:02:07:setup_element:INFO: Setting the data phase to 12 for uplink 16
11:02:07:setup_element:INFO: Setting the data phase to 8 for uplink 17
11:02:07:setup_element:INFO: Setting the data phase to 13 for uplink 18
11:02:07:setup_element:INFO: Setting the data phase to 10 for uplink 19
11:02:07:setup_element:INFO: Setting the data phase to 10 for uplink 20
11:02:07:setup_element:INFO: Setting the data phase to 9 for uplink 21
11:02:07:setup_element:INFO: Setting the data phase to 11 for uplink 22
11:02:07:setup_element:INFO: Setting the data phase to 7 for uplink 23
11:02:07:setup_element:INFO: Setting the data phase to 19 for uplink 24
11:02:07:setup_element:INFO: Setting the data phase to 23 for uplink 25
11:02:07:setup_element:INFO: Setting the data phase to 20 for uplink 26
11:02:07:setup_element:INFO: Setting the data phase to 25 for uplink 27
11:02:07:setup_element:INFO: Setting the data phase to 28 for uplink 28
11:02:07:setup_element:INFO: Setting the data phase to 31 for uplink 29
11:02:07:setup_element:INFO: Setting the data phase to 34 for uplink 30
11:02:07:setup_element:INFO: Setting the data phase to 33 for uplink 31
11:02:07:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 16: __________________________________________________________________________XXXXX_
Uplink 17: __________________________________________________________________________XXXXX_
Uplink 18: __________________________________________________________________________XXXXXX
Uplink 19: __________________________________________________________________________XXXXXX
Uplink 20: _________________________________________________________________________XXXXXX_
Uplink 21: _________________________________________________________________________XXXXXX_
Uplink 22: _________________________________________________________________________XXXXX__
Uplink 23: _________________________________________________________________________XXXXX__
Uplink 24: ________________________________________________________________________XXXXXX__
Uplink 25: ________________________________________________________________________XXXXXX__
Uplink 26: ________________________________________________________________________XXXXXX__
Uplink 27: ________________________________________________________________________XXXXXX__
Uplink 28: __________________________________________________________________________XXXXX_
Uplink 29: __________________________________________________________________________XXXXX_
Uplink 30: X___________________________________________________________________________XXXX
Uplink 31: X___________________________________________________________________________XXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 12
Window Length: 33
Eye Window: _____________________________XXXXXXX____
Uplink 17:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 18:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 19:
Optimal Phase: 10
Window Length: 33
Eye Window: ___________________________XXXXXXX______
Uplink 20:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 21:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 22:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 23:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 24:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 27:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 28:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 29:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 30:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
]
11:02:07:setup_element:INFO: Beginning SMX ASICs map scan
11:02:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:02:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:02:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:02:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:02:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:02:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:02:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:02:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:02:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:02:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:02:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:02:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:02:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:02:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:02:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:02:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:02:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:02:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:02:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:02:10:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 16: __________________________________________________________________________XXXXX_
Uplink 17: __________________________________________________________________________XXXXX_
Uplink 18: __________________________________________________________________________XXXXXX
Uplink 19: __________________________________________________________________________XXXXXX
Uplink 20: _________________________________________________________________________XXXXXX_
Uplink 21: _________________________________________________________________________XXXXXX_
Uplink 22: _________________________________________________________________________XXXXX__
Uplink 23: _________________________________________________________________________XXXXX__
Uplink 24: ________________________________________________________________________XXXXXX__
Uplink 25: ________________________________________________________________________XXXXXX__
Uplink 26: ________________________________________________________________________XXXXXX__
Uplink 27: ________________________________________________________________________XXXXXX__
Uplink 28: __________________________________________________________________________XXXXX_
Uplink 29: __________________________________________________________________________XXXXX_
Uplink 30: X___________________________________________________________________________XXXX
Uplink 31: X___________________________________________________________________________XXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 12
Window Length: 33
Eye Window: _____________________________XXXXXXX____
Uplink 17:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 18:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 19:
Optimal Phase: 10
Window Length: 33
Eye Window: ___________________________XXXXXXX______
Uplink 20:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 21:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 22:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 23:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 24:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 27:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 28:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 29:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 30:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
11:02:10:setup_element:INFO: Performing Elink synchronization
11:02:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:02:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:02:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:02:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:02:10:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
FEB type: B FEB_A: 0 FEB_B: 1
11:02:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:02:11:febtest:INFO: 23-00 | XA-000-08-003-000-001-007-09 | 31.4 | 1218.6
11:02:12:febtest:INFO: 30-01 | XA-000-08-003-000-000-253-02 | 50.4 | 1159.7
11:02:12:febtest:INFO: 21-02 | XA-000-08-003-000-001-011-09 | 60.0 | 1112.1
11:02:12:febtest:INFO: 28-03 | XA-000-08-003-000-001-005-09 | 50.4 | 1159.7
11:02:12:febtest:INFO: 19-04 | XA-000-08-003-000-001-001-09 | 31.4 | 1212.7
11:02:12:febtest:INFO: 26-05 | XA-000-08-003-000-001-010-09 | 53.6 | 1141.9
11:02:13:febtest:INFO: 17-06 | XA-000-08-003-000-001-008-09 | 56.8 | 1130.0
11:02:13:febtest:INFO: 24-07 | XA-000-08-003-000-001-000-09 | 37.7 | 1201.0
11:02:14:ST3_smx:INFO: Configuring SMX FAST
11:02:16:ST3_smx:INFO: chip: 23-0 44.073563 C 1177.390875 mV
11:02:16:ST3_smx:INFO: Electrons
11:02:16:ST3_smx:INFO: # loops 0
11:02:18:ST3_smx:INFO: # loops 1
11:02:20:ST3_smx:INFO: # loops 2
11:02:22:ST3_smx:INFO: Total # of broken channels: 0
11:02:22:ST3_smx:INFO: List of broken channels: []
11:02:22:ST3_smx:INFO: Total # of broken channels: 0
11:02:22:ST3_smx:INFO: List of broken channels: []
11:02:23:ST3_smx:INFO: Configuring SMX FAST
11:02:25:ST3_smx:INFO: chip: 30-1 44.073563 C 1171.483840 mV
11:02:25:ST3_smx:INFO: Electrons
11:02:25:ST3_smx:INFO: # loops 0
11:02:26:ST3_smx:INFO: # loops 1
11:02:28:ST3_smx:INFO: # loops 2
11:02:30:ST3_smx:INFO: Total # of broken channels: 0
11:02:30:ST3_smx:INFO: List of broken channels: []
11:02:30:ST3_smx:INFO: Total # of broken channels: 0
11:02:30:ST3_smx:INFO: List of broken channels: []
11:02:31:ST3_smx:INFO: Configuring SMX FAST
11:02:33:ST3_smx:INFO: chip: 21-2 59.984250 C 1124.048640 mV
11:02:33:ST3_smx:INFO: Electrons
11:02:33:ST3_smx:INFO: # loops 0
11:02:34:ST3_smx:INFO: # loops 1
11:02:36:ST3_smx:INFO: # loops 2
11:02:38:ST3_smx:INFO: Total # of broken channels: 0
11:02:38:ST3_smx:INFO: List of broken channels: []
11:02:38:ST3_smx:INFO: Total # of broken channels: 0
11:02:38:ST3_smx:INFO: List of broken channels: []
11:02:39:ST3_smx:INFO: Configuring SMX FAST
11:02:41:ST3_smx:INFO: chip: 28-3 53.612520 C 1147.806000 mV
11:02:41:ST3_smx:INFO: Electrons
11:02:41:ST3_smx:INFO: # loops 0
11:02:42:ST3_smx:INFO: # loops 1
11:02:44:ST3_smx:INFO: # loops 2
11:02:45:ST3_smx:INFO: Total # of broken channels: 0
11:02:45:ST3_smx:INFO: List of broken channels: []
11:02:45:ST3_smx:INFO: Total # of broken channels: 0
11:02:45:ST3_smx:INFO: List of broken channels: []
11:02:46:ST3_smx:INFO: Configuring SMX FAST
11:02:48:ST3_smx:INFO: chip: 19-4 44.073563 C 1177.390875 mV
11:02:48:ST3_smx:INFO: Electrons
11:02:48:ST3_smx:INFO: # loops 0
11:02:50:ST3_smx:INFO: # loops 1
11:02:52:ST3_smx:INFO: # loops 2
11:02:53:ST3_smx:INFO: Total # of broken channels: 0
11:02:53:ST3_smx:INFO: List of broken channels: []
11:02:53:ST3_smx:INFO: Total # of broken channels: 0
11:02:53:ST3_smx:INFO: List of broken channels: []
11:02:54:ST3_smx:INFO: Configuring SMX FAST
11:02:56:ST3_smx:INFO: chip: 26-5 59.984250 C 1135.937260 mV
11:02:56:ST3_smx:INFO: Electrons
11:02:56:ST3_smx:INFO: # loops 0
11:02:58:ST3_smx:INFO: # loops 1
11:02:59:ST3_smx:INFO: # loops 2
11:03:01:ST3_smx:INFO: Total # of broken channels: 0
11:03:01:ST3_smx:INFO: List of broken channels: []
11:03:01:ST3_smx:INFO: Total # of broken channels: 0
11:03:01:ST3_smx:INFO: List of broken channels: []
11:03:02:ST3_smx:INFO: Configuring SMX FAST
11:03:04:ST3_smx:INFO: chip: 17-6 59.984250 C 1124.048640 mV
11:03:04:ST3_smx:INFO: Electrons
11:03:04:ST3_smx:INFO: # loops 0
11:03:05:ST3_smx:INFO: # loops 1
11:03:07:ST3_smx:INFO: # loops 2
11:03:09:ST3_smx:INFO: Total # of broken channels: 0
11:03:09:ST3_smx:INFO: List of broken channels: []
11:03:09:ST3_smx:INFO: Total # of broken channels: 0
11:03:09:ST3_smx:INFO: List of broken channels: []
11:03:09:ST3_smx:INFO: Configuring SMX FAST
11:03:12:ST3_smx:INFO: chip: 24-7 47.250730 C 1177.390875 mV
11:03:12:ST3_smx:INFO: Electrons
11:03:12:ST3_smx:INFO: # loops 0
11:03:13:ST3_smx:INFO: # loops 1
11:03:15:ST3_smx:INFO: # loops 2
11:03:17:ST3_smx:INFO: Total # of broken channels: 0
11:03:17:ST3_smx:INFO: List of broken channels: []
11:03:17:ST3_smx:INFO: Total # of broken channels: 0
11:03:17:ST3_smx:INFO: List of broken channels: []
11:03:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:03:18:febtest:INFO: 23-00 | XA-000-08-003-000-001-007-09 | 44.1 | 1183.3
11:03:18:febtest:INFO: 30-01 | XA-000-08-003-000-000-253-02 | 47.3 | 1171.5
11:03:19:febtest:INFO: 21-02 | XA-000-08-003-000-001-011-09 | 63.2 | 1124.0
11:03:19:febtest:INFO: 28-03 | XA-000-08-003-000-001-005-09 | 53.6 | 1153.7
11:03:19:febtest:INFO: 19-04 | XA-000-08-003-000-001-001-09 | 44.1 | 1177.4
11:03:19:febtest:INFO: 26-05 | XA-000-08-003-000-001-010-09 | 60.0 | 1135.9
11:03:19:febtest:INFO: 17-06 | XA-000-08-003-000-001-008-09 | 60.0 | 1124.0
11:03:20:febtest:INFO: 24-07 | XA-000-08-003-000-001-000-09 | 47.3 | 1177.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_05-11_01_55
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1T4010164B2 124 C
FEB_SN : 4020
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
SENSOR_ID: 02204
MODULE_NAME: L5UL101016 M5UL1T4010164B2 124 C
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8220', '1.850', '0.4383']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '0.3272']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.3272']