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FEB_4028 12.06.24 10:47:21
Info
10:47:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:21:ST3_Shared:INFO: FEB-Microcable
10:47:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:21:febtest:INFO: Testing FEB with SN 4028
10:47:24:smx_tester:INFO: Scanning setup
10:47:24:elinks:INFO: Disabling clock on downlink 0
10:47:24:elinks:INFO: Disabling clock on downlink 1
10:47:24:elinks:INFO: Disabling clock on downlink 2
10:47:24:elinks:INFO: Disabling clock on downlink 3
10:47:24:elinks:INFO: Disabling clock on downlink 4
10:47:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:24:elinks:INFO: Disabling clock on downlink 0
10:47:24:elinks:INFO: Disabling clock on downlink 1
10:47:24:elinks:INFO: Disabling clock on downlink 2
10:47:24:elinks:INFO: Disabling clock on downlink 3
10:47:24:elinks:INFO: Disabling clock on downlink 4
10:47:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:24:elinks:INFO: Disabling clock on downlink 0
10:47:24:elinks:INFO: Disabling clock on downlink 1
10:47:24:elinks:INFO: Disabling clock on downlink 2
10:47:24:elinks:INFO: Disabling clock on downlink 3
10:47:24:elinks:INFO: Disabling clock on downlink 4
10:47:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:47:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:24:elinks:INFO: Disabling clock on downlink 0
10:47:24:elinks:INFO: Disabling clock on downlink 1
10:47:24:elinks:INFO: Disabling clock on downlink 2
10:47:24:elinks:INFO: Disabling clock on downlink 3
10:47:24:elinks:INFO: Disabling clock on downlink 4
10:47:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:24:elinks:INFO: Disabling clock on downlink 0
10:47:24:elinks:INFO: Disabling clock on downlink 1
10:47:24:elinks:INFO: Disabling clock on downlink 2
10:47:24:elinks:INFO: Disabling clock on downlink 3
10:47:24:elinks:INFO: Disabling clock on downlink 4
10:47:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:24:setup_element:INFO: Scanning clock phase
10:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:25:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:47:25:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:47:25:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:47:25:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:47:25:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:47:25:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:25:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:25:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:25:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:25:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
10:47:25:setup_element:INFO: Scanning data phases
10:47:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:30:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:47:30:setup_element:INFO: Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
10:47:30:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
10:47:30:setup_element:INFO: Eye window for uplink 26: __XXXXXX________________________________
Data delay found: 24
10:47:30:setup_element:INFO: Eye window for uplink 27: _______XXXXXX___________________________
Data delay found: 29
10:47:30:setup_element:INFO: Eye window for uplink 28: _______XXXXXX___________________________
Data delay found: 29
10:47:30:setup_element:INFO: Eye window for uplink 29: _________XXXXXX_________________________
Data delay found: 31
10:47:30:setup_element:INFO: Eye window for uplink 30: _________XXXXXX_________________________
Data delay found: 31
10:47:30:setup_element:INFO: Eye window for uplink 31: _________XXXXX__________________________
Data delay found: 31
10:47:30:setup_element:INFO: Setting the data phase to 25 for uplink 24
10:47:30:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:47:30:setup_element:INFO: Setting the data phase to 24 for uplink 26
10:47:30:setup_element:INFO: Setting the data phase to 29 for uplink 27
10:47:30:setup_element:INFO: Setting the data phase to 29 for uplink 28
10:47:30:setup_element:INFO: Setting the data phase to 31 for uplink 29
10:47:30:setup_element:INFO: Setting the data phase to 31 for uplink 30
10:47:30:setup_element:INFO: Setting the data phase to 31 for uplink 31
10:47:30:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 74
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXX____
Uplink 25: ______________________________________________________________________XXXXXX____
Uplink 26: ______________________________________________________________________XXXXXX____
Uplink 27: ______________________________________________________________________XXXXXX____
Uplink 28: _______________________________________________________________________XXXXX____
Uplink 29: _______________________________________________________________________XXXXX____
Uplink 30: _______________________________________________________________________XXXXX____
Uplink 31: _______________________________________________________________________XXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 28:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 29:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 30:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 31:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
]
10:47:30:setup_element:INFO: Beginning SMX ASICs map scan
10:47:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:47:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:47:30:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:47:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:47:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:47:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:47:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:47:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:47:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:47:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:47:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:47:33:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 74
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXX____
Uplink 25: ______________________________________________________________________XXXXXX____
Uplink 26: ______________________________________________________________________XXXXXX____
Uplink 27: ______________________________________________________________________XXXXXX____
Uplink 28: _______________________________________________________________________XXXXX____
Uplink 29: _______________________________________________________________________XXXXX____
Uplink 30: _______________________________________________________________________XXXXX____
Uplink 31: _______________________________________________________________________XXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 28:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 29:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 30:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 31:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
10:47:33:setup_element:INFO: Performing Elink synchronization
10:47:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:47:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:47:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:47:33:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:47:33:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
10:47:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:47:34:febtest:INFO: 30-01 | XA-000-08-003-000-000-056-13 | 50.4 | 1177.4
10:47:34:febtest:INFO: 28-03 | XA-000-08-003-000-000-055-13 | 56.8 | 1141.9
10:47:34:febtest:INFO: 26-05 | XA-000-08-003-000-000-054-13 | 60.0 | 1135.9
10:47:34:febtest:INFO: 24-07 | XA-000-08-003-000-000-052-13 | 63.2 | 1124.0
10:47:34:ST3_smx:INFO: Configuring SMX FAST
10:47:36:ST3_smx:INFO: chip: 30-1 53.612520 C 1159.654860 mV
10:47:36:ST3_smx:INFO: Electrons
10:47:36:ST3_smx:INFO: # loops 0
10:47:38:ST3_smx:INFO: # loops 1
10:47:40:ST3_smx:INFO: # loops 2
10:47:42:ST3_smx:INFO: Total # of broken channels: 0
10:47:42:ST3_smx:INFO: List of broken channels: []
10:47:42:ST3_smx:INFO: Total # of broken channels: 0
10:47:42:ST3_smx:INFO: List of broken channels: []
10:47:43:ST3_smx:INFO: Configuring SMX FAST
10:47:44:ST3_smx:INFO: chip: 28-3 63.173842 C 1118.096875 mV
10:47:44:ST3_smx:INFO: Electrons
10:47:44:ST3_smx:INFO: # loops 0
10:47:46:ST3_smx:INFO: # loops 1
10:47:48:ST3_smx:INFO: # loops 2
10:47:49:ST3_smx:INFO: Total # of broken channels: 0
10:47:49:ST3_smx:INFO: List of broken channels: []
10:47:49:ST3_smx:INFO: Total # of broken channels: 0
10:47:49:ST3_smx:INFO: List of broken channels: []
10:47:50:ST3_smx:INFO: Configuring SMX FAST
10:47:52:ST3_smx:INFO: chip: 26-5 59.984250 C 1135.937260 mV
10:47:52:ST3_smx:INFO: Electrons
10:47:52:ST3_smx:INFO: # loops 0
10:47:54:ST3_smx:INFO: # loops 1
10:47:55:ST3_smx:INFO: # loops 2
10:47:57:ST3_smx:INFO: Total # of broken channels: 0
10:47:57:ST3_smx:INFO: List of broken channels: []
10:47:57:ST3_smx:INFO: Total # of broken channels: 0
10:47:57:ST3_smx:INFO: List of broken channels: []
10:47:58:ST3_smx:INFO: Configuring SMX FAST
10:48:00:ST3_smx:INFO: chip: 24-7 56.797143 C 1147.806000 mV
10:48:00:ST3_smx:INFO: Electrons
10:48:00:ST3_smx:INFO: # loops 0
10:48:02:ST3_smx:INFO: # loops 1
10:48:03:ST3_smx:INFO: # loops 2
10:48:05:ST3_smx:INFO: Total # of broken channels: 0
10:48:05:ST3_smx:INFO: List of broken channels: []
10:48:05:ST3_smx:INFO: Total # of broken channels: 0
10:48:05:ST3_smx:INFO: List of broken channels: []
10:48:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:48:06:febtest:INFO: 30-01 | XA-000-08-003-000-000-056-13 | 53.6 | 1159.7
10:48:06:febtest:INFO: 28-03 | XA-000-08-003-000-000-055-13 | 63.2 | 1118.1
10:48:06:febtest:INFO: 26-05 | XA-000-08-003-000-000-054-13 | 60.0 | 1141.9
10:48:07:febtest:INFO: 24-07 | XA-000-08-003-000-000-052-13 | 56.8 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_12-10_47_21
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1B4010164A2 124 C
FEB_SN : 4028
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7707', '1.849', '1.1180']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0010', '1.850', '0.2554']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0000', '1.850', '0.1652']