
FEB_4037 20.06.24 13:19:57
TextEdit.txt
13:19:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:19:57:ST3_Shared:INFO: FEB-Microcable 13:19:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:19:58:febtest:INFO: Testing FEB with SN 4037 13:20:00:smx_tester:INFO: Scanning setup 13:20:00:elinks:INFO: Disabling clock on downlink 0 13:20:00:elinks:INFO: Disabling clock on downlink 1 13:20:00:elinks:INFO: Disabling clock on downlink 2 13:20:00:elinks:INFO: Disabling clock on downlink 3 13:20:00:elinks:INFO: Disabling clock on downlink 4 13:20:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:20:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:20:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:20:00:elinks:INFO: Disabling clock on downlink 0 13:20:00:elinks:INFO: Disabling clock on downlink 1 13:20:00:elinks:INFO: Disabling clock on downlink 2 13:20:00:elinks:INFO: Disabling clock on downlink 3 13:20:00:elinks:INFO: Disabling clock on downlink 4 13:20:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:20:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:20:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:20:01:elinks:INFO: Disabling clock on downlink 0 13:20:01:elinks:INFO: Disabling clock on downlink 1 13:20:01:elinks:INFO: Disabling clock on downlink 2 13:20:01:elinks:INFO: Disabling clock on downlink 3 13:20:01:elinks:INFO: Disabling clock on downlink 4 13:20:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:20:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:20:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:20:01:elinks:INFO: Disabling clock on downlink 0 13:20:01:elinks:INFO: Disabling clock on downlink 1 13:20:01:elinks:INFO: Disabling clock on downlink 2 13:20:01:elinks:INFO: Disabling clock on downlink 3 13:20:01:elinks:INFO: Disabling clock on downlink 4 13:20:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:20:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:20:01:elinks:INFO: Disabling clock on downlink 0 13:20:01:elinks:INFO: Disabling clock on downlink 1 13:20:01:elinks:INFO: Disabling clock on downlink 2 13:20:01:elinks:INFO: Disabling clock on downlink 3 13:20:01:elinks:INFO: Disabling clock on downlink 4 13:20:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:20:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:20:01:setup_element:INFO: Scanning clock phase 13:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:20:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:20:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:20:01:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXX______ Clock Delay: 30 13:20:01:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXX________ Clock Delay: 28 13:20:01:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXX________ Clock Delay: 28 13:20:01:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2 13:20:01:setup_element:INFO: Scanning data phases 13:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:20:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:20:06:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:20:06:setup_element:INFO: Eye window for uplink 24: XXXXXX_______________________________XXX Data delay found: 21 13:20:06:setup_element:INFO: Eye window for uplink 25: _XXXXXXXXX______________________________ Data delay found: 25 13:20:06:setup_element:INFO: Eye window for uplink 26: _XXXXXX________________________________X Data delay found: 22 13:20:06:setup_element:INFO: Eye window for uplink 27: ____XXXXXXXX____________________________ Data delay found: 27 13:20:06:setup_element:INFO: Eye window for uplink 28: _______XXXXXXXX_________________________ Data delay found: 30 13:20:06:setup_element:INFO: Eye window for uplink 29: _________XXXXXXXX_______________________ Data delay found: 32 13:20:06:setup_element:INFO: Eye window for uplink 30: _______XXXXXXXX_________________________ Data delay found: 30 13:20:06:setup_element:INFO: Eye window for uplink 31: _______XXXXXX___________________________ Data delay found: 29 13:20:06:setup_element:INFO: Setting the data phase to 21 for uplink 24 13:20:06:setup_element:INFO: Setting the data phase to 25 for uplink 25 13:20:06:setup_element:INFO: Setting the data phase to 22 for uplink 26 13:20:06:setup_element:INFO: Setting the data phase to 27 for uplink 27 13:20:06:setup_element:INFO: Setting the data phase to 30 for uplink 28 13:20:06:setup_element:INFO: Setting the data phase to 32 for uplink 29 13:20:06:setup_element:INFO: Setting the data phase to 30 for uplink 30 13:20:06:setup_element:INFO: Setting the data phase to 29 for uplink 31 13:20:06:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 29 Window Length: 72 Eye Windows: Uplink 24: ____________________________________________________________________XXXXXX______ Uplink 25: ____________________________________________________________________XXXXXX______ Uplink 26: ____________________________________________________________________XXXXXX______ Uplink 27: ____________________________________________________________________XXXXXX______ Uplink 28: ____________________________________________________________________XXXXXX______ Uplink 29: ____________________________________________________________________XXXXXX______ Uplink 30: __________________________________________________________________XXXXXX________ Uplink 31: __________________________________________________________________XXXXXX________ Data phase characteristics: Uplink 24: Optimal Phase: 21 Window Length: 31 Eye Window: XXXXXX_______________________________XXX Uplink 25: Optimal Phase: 25 Window Length: 31 Eye Window: _XXXXXXXXX______________________________ Uplink 26: Optimal Phase: 22 Window Length: 32 Eye Window: _XXXXXX________________________________X Uplink 27: Optimal Phase: 27 Window Length: 32 Eye Window: ____XXXXXXXX____________________________ Uplink 28: Optimal Phase: 30 Window Length: 32 Eye Window: _______XXXXXXXX_________________________ Uplink 29: Optimal Phase: 32 Window Length: 32 Eye Window: _________XXXXXXXX_______________________ Uplink 30: Optimal Phase: 30 Window Length: 32 Eye Window: _______XXXXXXXX_________________________ Uplink 31: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ ] 13:20:06:setup_element:INFO: Beginning SMX ASICs map scan 13:20:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:20:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:20:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:20:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:20:07:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 13:20:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:20:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:20:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:20:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:20:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:20:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:20:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:20:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:20:09:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 29 Window Length: 72 Eye Windows: Uplink 24: ____________________________________________________________________XXXXXX______ Uplink 25: ____________________________________________________________________XXXXXX______ Uplink 26: ____________________________________________________________________XXXXXX______ Uplink 27: ____________________________________________________________________XXXXXX______ Uplink 28: ____________________________________________________________________XXXXXX______ Uplink 29: ____________________________________________________________________XXXXXX______ Uplink 30: __________________________________________________________________XXXXXX________ Uplink 31: __________________________________________________________________XXXXXX________ Data phase characteristics: Uplink 24: Optimal Phase: 21 Window Length: 31 Eye Window: XXXXXX_______________________________XXX Uplink 25: Optimal Phase: 25 Window Length: 31 Eye Window: _XXXXXXXXX______________________________ Uplink 26: Optimal Phase: 22 Window Length: 32 Eye Window: _XXXXXX________________________________X Uplink 27: Optimal Phase: 27 Window Length: 32 Eye Window: ____XXXXXXXX____________________________ Uplink 28: Optimal Phase: 30 Window Length: 32 Eye Window: _______XXXXXXXX_________________________ Uplink 29: Optimal Phase: 32 Window Length: 32 Eye Window: _________XXXXXXXX_______________________ Uplink 30: Optimal Phase: 30 Window Length: 32 Eye Window: _______XXXXXXXX_________________________ Uplink 31: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ 13:20:09:setup_element:INFO: Performing Elink synchronization 13:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:20:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:20:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:20:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:20:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:20:09:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] 13:20:09:ST3_emu:INFO: Number of chips: 4 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24 FEB type: B FEB_A: 0 FEB_B: 1 13:20:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:20:10:febtest:INFO: 30-01 | XA-000-08-001-064-042-096-02 | 47.3 | 1159.7 13:20:11:febtest:INFO: 28-03 | XA-000-08-001-064-041-176-04 | 40.9 | 1183.3 13:20:11:febtest:INFO: 26-05 | XA-000-08-001-064-041-128-13 | 53.6 | 1141.9 13:20:11:febtest:INFO: 24-07 | XA-000-08-001-064-042-072-12 | 47.3 | 1159.7 13:20:11:ST3_smx:INFO: Configuring SMX FAST 13:20:14:ST3_smx:INFO: chip: 30-1 40.898880 C 1183.292940 mV 13:20:14:ST3_smx:INFO: Electrons 13:20:14:ST3_smx:INFO: # loops 0 13:20:16:ST3_smx:INFO: # loops 1 13:20:17:ST3_smx:INFO: # loops 2 13:20:19:ST3_smx:INFO: Total # of broken channels: 0 13:20:19:ST3_smx:INFO: List of broken channels: [] 13:20:19:ST3_smx:INFO: Total # of broken channels: 0 13:20:19:ST3_smx:INFO: List of broken channels: [] 13:20:20:ST3_smx:INFO: Configuring SMX FAST 13:20:23:ST3_smx:INFO: chip: 28-3 40.898880 C 1189.190035 mV 13:20:23:ST3_smx:INFO: Electrons 13:20:23:ST3_smx:INFO: # loops 0 13:20:25:ST3_smx:INFO: # loops 1 13:20:27:ST3_smx:INFO: # loops 2 13:20:29:ST3_smx:INFO: Total # of broken channels: 0 13:20:29:ST3_smx:INFO: List of broken channels: [] 13:20:29:ST3_smx:INFO: Total # of broken channels: 0 13:20:29:ST3_smx:INFO: List of broken channels: [] 13:20:30:ST3_smx:INFO: Configuring SMX FAST 13:20:32:ST3_smx:INFO: chip: 26-5 56.797143 C 1135.937260 mV 13:20:32:ST3_smx:INFO: Electrons 13:20:32:ST3_smx:INFO: # loops 0 13:20:34:ST3_smx:INFO: # loops 1 13:20:36:ST3_smx:INFO: # loops 2 13:20:39:ST3_smx:INFO: Total # of broken channels: 0 13:20:39:ST3_smx:INFO: List of broken channels: [] 13:20:39:ST3_smx:INFO: Total # of broken channels: 0 13:20:39:ST3_smx:INFO: List of broken channels: [] 13:20:40:ST3_smx:INFO: Configuring SMX FAST 13:20:42:ST3_smx:INFO: chip: 24-7 50.430383 C 1147.806000 mV 13:20:42:ST3_smx:INFO: Electrons 13:20:42:ST3_smx:INFO: # loops 0 13:20:44:ST3_smx:INFO: # loops 1 13:20:46:ST3_smx:INFO: # loops 2 13:20:48:ST3_smx:INFO: Total # of broken channels: 0 13:20:48:ST3_smx:INFO: List of broken channels: [] 13:20:48:ST3_smx:INFO: Total # of broken channels: 0 13:20:48:ST3_smx:INFO: List of broken channels: [] 13:20:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:20:49:febtest:INFO: 30-01 | XA-000-08-001-064-042-096-02 | 40.9 | 1189.2 13:20:49:febtest:INFO: 28-03 | XA-000-08-001-064-041-176-04 | 40.9 | 1183.3 13:20:50:febtest:INFO: 26-05 | XA-000-08-001-064-041-128-13 | 56.8 | 1135.9 13:20:50:febtest:INFO: 24-07 | XA-000-08-001-064-042-072-12 | 53.6 | 1147.8 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_06_20-13_19_57 OPERATOR : Benjamin; SITE : KIT SETUP : KIT_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L6UL201035 M6UL2T0010350B2 42 A FEB_SN : 4037 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8506', '1.850', '0.9981'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0150', '1.850', '0.2015'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '0.1695']