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FEB_4040 19.06.24 10:33:26
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10:33:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:27:ST3_Shared:INFO: FEB-Microcable
10:33:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:27:febtest:INFO: Testing FEB with SN 4040
10:33:30:smx_tester:INFO: Scanning setup
10:33:30:elinks:INFO: Disabling clock on downlink 0
10:33:30:elinks:INFO: Disabling clock on downlink 1
10:33:30:elinks:INFO: Disabling clock on downlink 2
10:33:30:elinks:INFO: Disabling clock on downlink 3
10:33:30:elinks:INFO: Disabling clock on downlink 4
10:33:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:33:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:30:elinks:INFO: Disabling clock on downlink 0
10:33:30:elinks:INFO: Disabling clock on downlink 1
10:33:30:elinks:INFO: Disabling clock on downlink 2
10:33:30:elinks:INFO: Disabling clock on downlink 3
10:33:30:elinks:INFO: Disabling clock on downlink 4
10:33:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:33:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:30:elinks:INFO: Disabling clock on downlink 0
10:33:30:elinks:INFO: Disabling clock on downlink 1
10:33:30:elinks:INFO: Disabling clock on downlink 2
10:33:30:elinks:INFO: Disabling clock on downlink 3
10:33:30:elinks:INFO: Disabling clock on downlink 4
10:33:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:33:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:33:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:30:elinks:INFO: Disabling clock on downlink 0
10:33:30:elinks:INFO: Disabling clock on downlink 1
10:33:30:elinks:INFO: Disabling clock on downlink 2
10:33:30:elinks:INFO: Disabling clock on downlink 3
10:33:30:elinks:INFO: Disabling clock on downlink 4
10:33:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:33:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:30:elinks:INFO: Disabling clock on downlink 0
10:33:30:elinks:INFO: Disabling clock on downlink 1
10:33:30:elinks:INFO: Disabling clock on downlink 2
10:33:30:elinks:INFO: Disabling clock on downlink 3
10:33:30:elinks:INFO: Disabling clock on downlink 4
10:33:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:33:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:30:setup_element:INFO: Scanning clock phase
10:33:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:31:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:33:31:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:33:31:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:33:31:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:33:31:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:33:31:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:33:31:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:33:31:setup_element:INFO: Scanning data phases
10:33:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:36:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:33:36:setup_element:INFO: Eye window for uplink 16: ____________________________XXXXXXXXX___
Data delay found: 12
10:33:36:setup_element:INFO: Eye window for uplink 17: ________________________XXXXXXXX________
Data delay found: 7
10:33:36:setup_element:INFO: Eye window for uplink 18: __________________________XXXXXXXXXX____
Data delay found: 10
10:33:36:setup_element:INFO: Eye window for uplink 19: _______________________XXXXXXXXX________
Data delay found: 7
10:33:36:setup_element:INFO: Eye window for uplink 20: ___________________________XXXXXXXX_____
Data delay found: 10
10:33:36:setup_element:INFO: Eye window for uplink 21: __________________________XXXXXXXX______
Data delay found: 9
10:33:36:setup_element:INFO: Eye window for uplink 22: ______________________________XXXXXX____
Data delay found: 12
10:33:36:setup_element:INFO: Eye window for uplink 23: __________________________XXXXXX________
Data delay found: 8
10:33:36:setup_element:INFO: Eye window for uplink 24: XXXX____________________________XXXXXXXX
Data delay found: 17
10:33:36:setup_element:INFO: Eye window for uplink 25: XXXXXXXX_____________________________XXX
Data delay found: 22
10:33:36:setup_element:INFO: Eye window for uplink 26: XXXXXXXXX____________________________XXX
Data delay found: 22
10:33:36:setup_element:INFO: Eye window for uplink 27: ___XXXXXXXXXXX__________________________
Data delay found: 28
10:33:36:setup_element:INFO: Eye window for uplink 28: ____XXXXXXXX____________________________
Data delay found: 27
10:33:36:setup_element:INFO: Eye window for uplink 29: ______XXXXXXXXXX________________________
Data delay found: 30
10:33:36:setup_element:INFO: Eye window for uplink 30: ____XXXXXXXXXXX_________________________
Data delay found: 29
10:33:36:setup_element:INFO: Eye window for uplink 31: ____XXXXXXXXX___________________________
Data delay found: 28
10:33:36:setup_element:INFO: Setting the data phase to 12 for uplink 16
10:33:36:setup_element:INFO: Setting the data phase to 7 for uplink 17
10:33:36:setup_element:INFO: Setting the data phase to 10 for uplink 18
10:33:36:setup_element:INFO: Setting the data phase to 7 for uplink 19
10:33:36:setup_element:INFO: Setting the data phase to 10 for uplink 20
10:33:36:setup_element:INFO: Setting the data phase to 9 for uplink 21
10:33:36:setup_element:INFO: Setting the data phase to 12 for uplink 22
10:33:36:setup_element:INFO: Setting the data phase to 8 for uplink 23
10:33:36:setup_element:INFO: Setting the data phase to 17 for uplink 24
10:33:36:setup_element:INFO: Setting the data phase to 22 for uplink 25
10:33:36:setup_element:INFO: Setting the data phase to 22 for uplink 26
10:33:36:setup_element:INFO: Setting the data phase to 28 for uplink 27
10:33:36:setup_element:INFO: Setting the data phase to 27 for uplink 28
10:33:36:setup_element:INFO: Setting the data phase to 30 for uplink 29
10:33:36:setup_element:INFO: Setting the data phase to 29 for uplink 30
10:33:36:setup_element:INFO: Setting the data phase to 28 for uplink 31
10:33:36:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 73
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXX___
Uplink 17: _______________________________________________________________________XXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: _______________________________________________________________________XXXXXX___
Uplink 21: _______________________________________________________________________XXXXXX___
Uplink 22: ________________________________________________________________________XXXXX___
Uplink 23: ________________________________________________________________________XXXXX___
Uplink 24: _______________________________________________________________________XXXXX____
Uplink 25: _______________________________________________________________________XXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: ________________________________________________________________________XXXXX___
Uplink 29: ________________________________________________________________________XXXXX___
Uplink 30: ________________________________________________________________________XXXXXX__
Uplink 31: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 12
Window Length: 31
Eye Window: ____________________________XXXXXXXXX___
Uplink 17:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 18:
Optimal Phase: 10
Window Length: 30
Eye Window: __________________________XXXXXXXXXX____
Uplink 19:
Optimal Phase: 7
Window Length: 31
Eye Window: _______________________XXXXXXXXX________
Uplink 20:
Optimal Phase: 10
Window Length: 32
Eye Window: ___________________________XXXXXXXX_____
Uplink 21:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 22:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 23:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 24:
Optimal Phase: 17
Window Length: 28
Eye Window: XXXX____________________________XXXXXXXX
Uplink 25:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 26:
Optimal Phase: 22
Window Length: 28
Eye Window: XXXXXXXXX____________________________XXX
Uplink 27:
Optimal Phase: 28
Window Length: 29
Eye Window: ___XXXXXXXXXXX__________________________
Uplink 28:
Optimal Phase: 27
Window Length: 32
Eye Window: ____XXXXXXXX____________________________
Uplink 29:
Optimal Phase: 30
Window Length: 30
Eye Window: ______XXXXXXXXXX________________________
Uplink 30:
Optimal Phase: 29
Window Length: 29
Eye Window: ____XXXXXXXXXXX_________________________
Uplink 31:
Optimal Phase: 28
Window Length: 31
Eye Window: ____XXXXXXXXX___________________________
]
10:33:36:setup_element:INFO: Beginning SMX ASICs map scan
10:33:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:33:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:33:36:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:33:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:33:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:33:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:33:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:33:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:33:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:33:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:33:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:33:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:33:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:33:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:33:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:33:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:33:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:33:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:33:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:33:39:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 73
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXX___
Uplink 17: _______________________________________________________________________XXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: _______________________________________________________________________XXXXXX___
Uplink 21: _______________________________________________________________________XXXXXX___
Uplink 22: ________________________________________________________________________XXXXX___
Uplink 23: ________________________________________________________________________XXXXX___
Uplink 24: _______________________________________________________________________XXXXX____
Uplink 25: _______________________________________________________________________XXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: ________________________________________________________________________XXXXX___
Uplink 29: ________________________________________________________________________XXXXX___
Uplink 30: ________________________________________________________________________XXXXXX__
Uplink 31: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 12
Window Length: 31
Eye Window: ____________________________XXXXXXXXX___
Uplink 17:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 18:
Optimal Phase: 10
Window Length: 30
Eye Window: __________________________XXXXXXXXXX____
Uplink 19:
Optimal Phase: 7
Window Length: 31
Eye Window: _______________________XXXXXXXXX________
Uplink 20:
Optimal Phase: 10
Window Length: 32
Eye Window: ___________________________XXXXXXXX_____
Uplink 21:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 22:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 23:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 24:
Optimal Phase: 17
Window Length: 28
Eye Window: XXXX____________________________XXXXXXXX
Uplink 25:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 26:
Optimal Phase: 22
Window Length: 28
Eye Window: XXXXXXXXX____________________________XXX
Uplink 27:
Optimal Phase: 28
Window Length: 29
Eye Window: ___XXXXXXXXXXX__________________________
Uplink 28:
Optimal Phase: 27
Window Length: 32
Eye Window: ____XXXXXXXX____________________________
Uplink 29:
Optimal Phase: 30
Window Length: 30
Eye Window: ______XXXXXXXXXX________________________
Uplink 30:
Optimal Phase: 29
Window Length: 29
Eye Window: ____XXXXXXXXXXX_________________________
Uplink 31:
Optimal Phase: 28
Window Length: 31
Eye Window: ____XXXXXXXXX___________________________
10:33:39:setup_element:INFO: Performing Elink synchronization
10:33:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:33:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:33:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:33:39:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:33:39:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
FEB type: B FEB_A: 0 FEB_B: 1
10:33:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:33:40:febtest:INFO: 23-00 | XA-000-08-003-000-003-166-14 | 40.9 | 1171.5
10:33:41:febtest:INFO: 30-01 | XA-000-08-003-000-003-155-07 | 28.2 | 1218.6
10:33:41:febtest:INFO: 21-02 | XA-000-08-003-000-003-162-14 | 15.6 | 1265.4
10:33:41:febtest:INFO: 28-03 | XA-000-08-003-000-003-165-14 | 21.9 | 1247.9
10:33:41:febtest:INFO: 19-04 | XA-000-08-003-000-003-158-07 | 21.9 | 1230.3
10:33:41:febtest:INFO: 26-05 | XA-000-08-003-000-003-161-14 | 18.7 | 1271.2
10:33:42:febtest:INFO: 17-06 | XA-000-08-003-000-003-168-14 | 21.9 | 1242.0
10:33:42:febtest:INFO: 24-07 | XA-000-08-003-000-003-157-07 | 31.4 | 1195.1
10:33:42:ST3_smx:INFO: Configuring SMX FAST
10:33:44:ST3_smx:INFO: chip: 23-0 40.898880 C 1177.390875 mV
10:33:44:ST3_smx:INFO: Electrons
10:33:44:ST3_smx:INFO: # loops 0
10:33:45:ST3_smx:INFO: # loops 1
10:33:47:ST3_smx:INFO: # loops 2
10:33:48:ST3_smx:INFO: Total # of broken channels: 0
10:33:48:ST3_smx:INFO: List of broken channels: []
10:33:48:ST3_smx:INFO: Total # of broken channels: 0
10:33:48:ST3_smx:INFO: List of broken channels: []
10:33:49:ST3_smx:INFO: Configuring SMX FAST
10:33:51:ST3_smx:INFO: chip: 30-1 34.556970 C 1200.969315 mV
10:33:51:ST3_smx:INFO: Electrons
10:33:51:ST3_smx:INFO: # loops 0
10:33:53:ST3_smx:INFO: # loops 1
10:33:55:ST3_smx:INFO: # loops 2
10:33:56:ST3_smx:INFO: Total # of broken channels: 0
10:33:56:ST3_smx:INFO: List of broken channels: []
10:33:56:ST3_smx:INFO: Total # of broken channels: 0
10:33:56:ST3_smx:INFO: List of broken channels: []
10:33:57:ST3_smx:INFO: Configuring SMX FAST
10:33:59:ST3_smx:INFO: chip: 21-2 28.225000 C 1224.468235 mV
10:33:59:ST3_smx:INFO: Electrons
10:33:59:ST3_smx:INFO: # loops 0
10:34:01:ST3_smx:INFO: # loops 1
10:34:02:ST3_smx:INFO: # loops 2
10:34:04:ST3_smx:INFO: Total # of broken channels: 0
10:34:04:ST3_smx:INFO: List of broken channels: []
10:34:04:ST3_smx:INFO: Total # of broken channels: 0
10:34:04:ST3_smx:INFO: List of broken channels: []
10:34:05:ST3_smx:INFO: Configuring SMX FAST
10:34:07:ST3_smx:INFO: chip: 28-3 31.389742 C 1218.600960 mV
10:34:07:ST3_smx:INFO: Electrons
10:34:07:ST3_smx:INFO: # loops 0
10:34:08:ST3_smx:INFO: # loops 1
10:34:10:ST3_smx:INFO: # loops 2
10:34:11:ST3_smx:INFO: Total # of broken channels: 0
10:34:11:ST3_smx:INFO: List of broken channels: []
10:34:11:ST3_smx:INFO: Total # of broken channels: 0
10:34:11:ST3_smx:INFO: List of broken channels: []
10:34:12:ST3_smx:INFO: Configuring SMX FAST
10:34:14:ST3_smx:INFO: chip: 19-4 31.389742 C 1212.728715 mV
10:34:14:ST3_smx:INFO: Electrons
10:34:14:ST3_smx:INFO: # loops 0
10:34:16:ST3_smx:INFO: # loops 1
10:34:17:ST3_smx:INFO: # loops 2
10:34:19:ST3_smx:INFO: Total # of broken channels: 0
10:34:19:ST3_smx:INFO: List of broken channels: []
10:34:19:ST3_smx:INFO: Total # of broken channels: 0
10:34:19:ST3_smx:INFO: List of broken channels: []
10:34:20:ST3_smx:INFO: Configuring SMX FAST
10:34:22:ST3_smx:INFO: chip: 26-5 31.389742 C 1230.330540 mV
10:34:22:ST3_smx:INFO: Electrons
10:34:22:ST3_smx:INFO: # loops 0
10:34:23:ST3_smx:INFO: # loops 1
10:34:25:ST3_smx:INFO: # loops 2
10:34:27:ST3_smx:INFO: Total # of broken channels: 0
10:34:27:ST3_smx:INFO: List of broken channels: []
10:34:27:ST3_smx:INFO: Total # of broken channels: 0
10:34:27:ST3_smx:INFO: List of broken channels: []
10:34:28:ST3_smx:INFO: Configuring SMX FAST
10:34:29:ST3_smx:INFO: chip: 17-6 34.556970 C 1200.969315 mV
10:34:29:ST3_smx:INFO: Electrons
10:34:29:ST3_smx:INFO: # loops 0
10:34:31:ST3_smx:INFO: # loops 1
10:34:33:ST3_smx:INFO: # loops 2
10:34:34:ST3_smx:INFO: Total # of broken channels: 0
10:34:34:ST3_smx:INFO: List of broken channels: []
10:34:34:ST3_smx:INFO: Total # of broken channels: 0
10:34:34:ST3_smx:INFO: List of broken channels: []
10:34:35:ST3_smx:INFO: Configuring SMX FAST
10:34:37:ST3_smx:INFO: chip: 24-7 44.073563 C 1171.483840 mV
10:34:37:ST3_smx:INFO: Electrons
10:34:37:ST3_smx:INFO: # loops 0
10:34:39:ST3_smx:INFO: # loops 1
10:34:40:ST3_smx:INFO: # loops 2
10:34:42:ST3_smx:INFO: Total # of broken channels: 0
10:34:42:ST3_smx:INFO: List of broken channels: []
10:34:42:ST3_smx:INFO: Total # of broken channels: 0
10:34:42:ST3_smx:INFO: List of broken channels: []
10:34:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:34:43:febtest:INFO: 23-00 | XA-000-08-003-000-003-166-14 | 47.3 | 1177.4
10:34:43:febtest:INFO: 30-01 | XA-000-08-003-000-003-155-07 | 37.7 | 1201.0
10:34:43:febtest:INFO: 21-02 | XA-000-08-003-000-003-162-14 | 31.4 | 1224.5
10:34:44:febtest:INFO: 28-03 | XA-000-08-003-000-003-165-14 | 34.6 | 1224.5
10:34:44:febtest:INFO: 19-04 | XA-000-08-003-000-003-158-07 | 31.4 | 1212.7
10:34:44:febtest:INFO: 26-05 | XA-000-08-003-000-003-161-14 | 31.4 | 1230.3
10:34:44:febtest:INFO: 17-06 | XA-000-08-003-000-003-168-14 | 37.7 | 1201.0
10:34:44:febtest:INFO: 24-07 | XA-000-08-003-000-003-157-07 | 44.1 | 1171.5
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_19-10_33_26
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 4040
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3480', '1.850', '1.8730']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '0.3192']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.850', '0.3192']