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FEB_4044 25.06.24 15:39:19
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15:39:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:39:19:ST3_Shared:INFO: FEB-Microcable
15:39:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:39:19:febtest:INFO: Testing FEB with SN 4044
15:39:22:smx_tester:INFO: Scanning setup
15:39:22:elinks:INFO: Disabling clock on downlink 0
15:39:22:elinks:INFO: Disabling clock on downlink 1
15:39:22:elinks:INFO: Disabling clock on downlink 2
15:39:22:elinks:INFO: Disabling clock on downlink 3
15:39:22:elinks:INFO: Disabling clock on downlink 4
15:39:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:39:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:39:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:39:22:elinks:INFO: Disabling clock on downlink 0
15:39:22:elinks:INFO: Disabling clock on downlink 1
15:39:22:elinks:INFO: Disabling clock on downlink 2
15:39:22:elinks:INFO: Disabling clock on downlink 3
15:39:22:elinks:INFO: Disabling clock on downlink 4
15:39:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:39:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:39:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:39:22:elinks:INFO: Disabling clock on downlink 0
15:39:22:elinks:INFO: Disabling clock on downlink 1
15:39:22:elinks:INFO: Disabling clock on downlink 2
15:39:22:elinks:INFO: Disabling clock on downlink 3
15:39:22:elinks:INFO: Disabling clock on downlink 4
15:39:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:39:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:39:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:39:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:39:23:elinks:INFO: Disabling clock on downlink 0
15:39:23:elinks:INFO: Disabling clock on downlink 1
15:39:23:elinks:INFO: Disabling clock on downlink 2
15:39:23:elinks:INFO: Disabling clock on downlink 3
15:39:23:elinks:INFO: Disabling clock on downlink 4
15:39:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:39:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:39:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:39:23:elinks:INFO: Disabling clock on downlink 0
15:39:23:elinks:INFO: Disabling clock on downlink 1
15:39:23:elinks:INFO: Disabling clock on downlink 2
15:39:23:elinks:INFO: Disabling clock on downlink 3
15:39:23:elinks:INFO: Disabling clock on downlink 4
15:39:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:39:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:39:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:39:23:setup_element:INFO: Scanning clock phase
15:39:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:39:23:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________XXXXXX_________
Clock Delay: 27
15:39:23:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________XXXXXX_________
Clock Delay: 27
15:39:23:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXX__________
Clock Delay: 26
15:39:23:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXX__________
Clock Delay: 26
15:39:23:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________
Clock Delay: 27
15:39:23:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________
Clock Delay: 27
15:39:23:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:39:23:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:39:23:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
15:39:23:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
15:39:23:setup_element:INFO: Scanning data phases
15:39:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:39:28:setup_element:INFO: Eye window for uplink 16: XXXXX________________________________XXX
Data delay found: 20
15:39:28:setup_element:INFO: Eye window for uplink 17: XX________________________________XXXXXX
Data delay found: 17
15:39:28:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
15:39:28:setup_element:INFO: Eye window for uplink 19: XX________________________________XXXXXX
Data delay found: 17
15:39:28:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXXX_
Data delay found: 15
15:39:28:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXX___
Data delay found: 14
15:39:28:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
15:39:28:setup_element:INFO: Eye window for uplink 23: XXXXXXX___________________________XXXXXX
Data delay found: 20
15:39:28:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________
Data delay found: 28
15:39:28:setup_element:INFO: Eye window for uplink 25: ________XXXXXXX_________________________
Data delay found: 31
15:39:28:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXX__________________________
Data delay found: 29
15:39:28:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
15:39:28:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
15:39:28:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX________________
Data delay found: 0
15:39:28:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
15:39:28:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
15:39:28:setup_element:INFO: Setting the data phase to 20 for uplink 16
15:39:28:setup_element:INFO: Setting the data phase to 17 for uplink 17
15:39:28:setup_element:INFO: Setting the data phase to 19 for uplink 18
15:39:28:setup_element:INFO: Setting the data phase to 17 for uplink 19
15:39:28:setup_element:INFO: Setting the data phase to 15 for uplink 20
15:39:28:setup_element:INFO: Setting the data phase to 14 for uplink 21
15:39:28:setup_element:INFO: Setting the data phase to 20 for uplink 22
15:39:28:setup_element:INFO: Setting the data phase to 20 for uplink 23
15:39:28:setup_element:INFO: Setting the data phase to 28 for uplink 24
15:39:28:setup_element:INFO: Setting the data phase to 31 for uplink 25
15:39:28:setup_element:INFO: Setting the data phase to 29 for uplink 26
15:39:28:setup_element:INFO: Setting the data phase to 34 for uplink 27
15:39:28:setup_element:INFO: Setting the data phase to 37 for uplink 28
15:39:28:setup_element:INFO: Setting the data phase to 0 for uplink 29
15:39:28:setup_element:INFO: Setting the data phase to 38 for uplink 30
15:39:28:setup_element:INFO: Setting the data phase to 38 for uplink 31
15:39:28:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 27
Window Length: 72
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: _________________________________________________________________XXXXXX_________
Uplink 19: _________________________________________________________________XXXXXX_________
Uplink 20: ________________________________________________________________XXXXXX__________
Uplink 21: ________________________________________________________________XXXXXX__________
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _________________________________________________________________XXXXXX_________
Uplink 25: _________________________________________________________________XXXXXX_________
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: __________________________________________________________________XXXXXX________
Uplink 29: __________________________________________________________________XXXXXX________
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 32
Eye Window: XXXXX________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 20:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 21:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 22:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 23:
Optimal Phase: 20
Window Length: 27
Eye Window: XXXXXXX___________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 26:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 32
Eye Window: ___________XXXXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
]
15:39:28:setup_element:INFO: Beginning SMX ASICs map scan
15:39:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:39:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:39:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:39:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:39:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:39:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:39:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:39:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:39:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:39:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:39:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:39:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:39:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:39:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:39:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:39:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:39:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:39:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:39:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:39:31:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 27
Window Length: 72
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: _________________________________________________________________XXXXXX_________
Uplink 19: _________________________________________________________________XXXXXX_________
Uplink 20: ________________________________________________________________XXXXXX__________
Uplink 21: ________________________________________________________________XXXXXX__________
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _________________________________________________________________XXXXXX_________
Uplink 25: _________________________________________________________________XXXXXX_________
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: __________________________________________________________________XXXXXX________
Uplink 29: __________________________________________________________________XXXXXX________
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 32
Eye Window: XXXXX________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 20:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 21:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 22:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 23:
Optimal Phase: 20
Window Length: 27
Eye Window: XXXXXXX___________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 26:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 32
Eye Window: ___________XXXXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
15:39:31:setup_element:INFO: Performing Elink synchronization
15:39:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:39:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:39:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:39:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:39:31:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
FEB type: B FEB_A: 0 FEB_B: 1
15:39:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:33:febtest:INFO: 23-00 | XA-000-08-003-000-002-056-14 | 28.2 | 1242.0
15:39:33:febtest:INFO: 30-01 | XA-000-08-003-000-002-037-09 | 34.6 | 1218.6
15:39:33:febtest:INFO: 21-02 | XA-000-08-003-000-003-116-06 | 47.3 | 1165.6
15:39:33:febtest:INFO: 28-03 | XA-000-08-003-000-002-033-09 | 31.4 | 1242.0
15:39:33:febtest:INFO: 19-04 | XA-000-08-003-000-002-051-14 | 50.4 | 1171.5
15:39:34:febtest:INFO: 26-05 | XA-000-08-003-000-002-027-00 | 37.7 | 1230.3
15:39:34:febtest:INFO: 17-06 | XA-000-08-003-000-002-055-14 | 56.8 | 1147.8
15:39:34:febtest:INFO: 24-07 | XA-000-08-003-000-002-039-09 | 40.9 | 1212.7
15:39:34:ST3_smx:INFO: Configuring SMX FAST
15:39:36:ST3_smx:INFO: chip: 23-0 37.726682 C 1212.728715 mV
15:39:36:ST3_smx:INFO: Electrons
15:39:36:ST3_smx:INFO: # loops 0
15:39:38:ST3_smx:INFO: # loops 1
15:39:40:ST3_smx:INFO: # loops 2
15:39:42:ST3_smx:INFO: Total # of broken channels: 0
15:39:42:ST3_smx:INFO: List of broken channels: []
15:39:42:ST3_smx:INFO: Total # of broken channels: 0
15:39:42:ST3_smx:INFO: List of broken channels: []
15:39:42:ST3_smx:INFO: Configuring SMX FAST
15:39:45:ST3_smx:INFO: chip: 30-1 34.556970 C 1224.468235 mV
15:39:45:ST3_smx:INFO: Electrons
15:39:45:ST3_smx:INFO: # loops 0
15:39:46:ST3_smx:INFO: # loops 1
15:39:48:ST3_smx:INFO: # loops 2
15:39:50:ST3_smx:INFO: Total # of broken channels: 0
15:39:50:ST3_smx:INFO: List of broken channels: []
15:39:50:ST3_smx:INFO: Total # of broken channels: 0
15:39:50:ST3_smx:INFO: List of broken channels: []
15:39:51:ST3_smx:INFO: Configuring SMX FAST
15:39:53:ST3_smx:INFO: chip: 21-2 56.797143 C 1159.654860 mV
15:39:53:ST3_smx:INFO: Electrons
15:39:53:ST3_smx:INFO: # loops 0
15:39:55:ST3_smx:INFO: # loops 1
15:39:57:ST3_smx:INFO: # loops 2
15:39:58:ST3_smx:INFO: Total # of broken channels: 0
15:39:58:ST3_smx:INFO: List of broken channels: []
15:39:58:ST3_smx:INFO: Total # of broken channels: 0
15:39:58:ST3_smx:INFO: List of broken channels: []
15:39:59:ST3_smx:INFO: Configuring SMX FAST
15:40:01:ST3_smx:INFO: chip: 28-3 44.073563 C 1212.728715 mV
15:40:01:ST3_smx:INFO: Electrons
15:40:01:ST3_smx:INFO: # loops 0
15:40:03:ST3_smx:INFO: # loops 1
15:40:05:ST3_smx:INFO: # loops 2
15:40:07:ST3_smx:INFO: Total # of broken channels: 0
15:40:07:ST3_smx:INFO: List of broken channels: []
15:40:07:ST3_smx:INFO: Total # of broken channels: 0
15:40:07:ST3_smx:INFO: List of broken channels: []
15:40:08:ST3_smx:INFO: Configuring SMX FAST
15:40:10:ST3_smx:INFO: chip: 19-4 56.797143 C 1177.390875 mV
15:40:10:ST3_smx:INFO: Electrons
15:40:10:ST3_smx:INFO: # loops 0
15:40:12:ST3_smx:INFO: # loops 1
15:40:13:ST3_smx:INFO: # loops 2
15:40:15:ST3_smx:INFO: Total # of broken channels: 0
15:40:15:ST3_smx:INFO: List of broken channels: []
15:40:15:ST3_smx:INFO: Total # of broken channels: 9
15:40:15:ST3_smx:INFO: List of broken channels: [10, 12, 14, 16, 18, 20, 22, 24, 26]
15:40:16:ST3_smx:INFO: Configuring SMX FAST
15:40:18:ST3_smx:INFO: chip: 26-5 47.250730 C 1230.330540 mV
15:40:18:ST3_smx:INFO: Electrons
15:40:18:ST3_smx:INFO: # loops 0
15:40:20:ST3_smx:INFO: # loops 1
15:40:22:ST3_smx:INFO: # loops 2
15:40:24:ST3_smx:INFO: Total # of broken channels: 0
15:40:24:ST3_smx:INFO: List of broken channels: []
15:40:24:ST3_smx:INFO: Total # of broken channels: 10
15:40:24:ST3_smx:INFO: List of broken channels: [107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
15:40:25:ST3_smx:INFO: Configuring SMX FAST
15:40:27:ST3_smx:INFO: chip: 17-6 66.365920 C 1159.654860 mV
15:40:27:ST3_smx:INFO: Electrons
15:40:27:ST3_smx:INFO: # loops 0
15:40:28:ST3_smx:INFO: # loops 1
15:40:30:ST3_smx:INFO: # loops 2
15:40:32:ST3_smx:INFO: Total # of broken channels: 0
15:40:32:ST3_smx:INFO: List of broken channels: []
15:40:32:ST3_smx:INFO: Total # of broken channels: 0
15:40:32:ST3_smx:INFO: List of broken channels: []
15:40:33:ST3_smx:INFO: Configuring SMX FAST
15:40:35:ST3_smx:INFO: chip: 24-7 53.612520 C 1206.851500 mV
15:40:35:ST3_smx:INFO: Electrons
15:40:35:ST3_smx:INFO: # loops 0
15:40:37:ST3_smx:INFO: # loops 1
15:40:39:ST3_smx:INFO: # loops 2
15:40:41:ST3_smx:INFO: Total # of broken channels: 0
15:40:41:ST3_smx:INFO: List of broken channels: []
15:40:41:ST3_smx:INFO: Total # of broken channels: 0
15:40:41:ST3_smx:INFO: List of broken channels: []
15:40:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:40:42:febtest:INFO: 23-00 | XA-000-08-003-000-002-056-14 | 47.3 | 1212.7
15:40:42:febtest:INFO: 30-01 | XA-000-08-003-000-002-037-09 | 37.7 | 1224.5
15:40:42:febtest:INFO: 21-02 | XA-000-08-003-000-003-116-06 | 63.2 | 1153.7
15:40:42:febtest:INFO: 28-03 | XA-000-08-003-000-002-033-09 | 47.3 | 1218.6
Traceback (most recent call last):
File "febtest.py", line 452, in DoFEB_MicrocableTest
self.Talk2FEB() # read temperatures
File "febtest.py", line 696, in Talk2FEB
vd = self.EMU.mysmx[i].ReadDiag('Vddm')
File "/home/cbm/ST3_v2.29.16/lib/ST3_smx.py", line 671, in ReadDiag
self.smx.write(130, 20, msrc) # 3-bit MUX
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 51, in write
return self.ack_monitor.check_write()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 63, in check_write
return self._check(self._check_write, timeout)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 60, in _check
raise AckNotReceived
hctsp.ack_monitor.AckNotReceived: Ack frame not received