
FEB_4045 10.07.24 07:15:19
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07:15:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:15:19:ST3_Shared:INFO: FEB-Microcable 07:15:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:15:19:febtest:INFO: Testing FEB with SN 4045 07:15:21:smx_tester:INFO: Scanning setup 07:15:21:elinks:INFO: Disabling clock on downlink 0 07:15:21:elinks:INFO: Disabling clock on downlink 1 07:15:21:elinks:INFO: Disabling clock on downlink 2 07:15:21:elinks:INFO: Disabling clock on downlink 3 07:15:21:elinks:INFO: Disabling clock on downlink 4 07:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:15:21:elinks:INFO: Disabling clock on downlink 0 07:15:21:elinks:INFO: Disabling clock on downlink 1 07:15:21:elinks:INFO: Disabling clock on downlink 2 07:15:21:elinks:INFO: Disabling clock on downlink 3 07:15:21:elinks:INFO: Disabling clock on downlink 4 07:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:15:21:elinks:INFO: Disabling clock on downlink 0 07:15:21:elinks:INFO: Disabling clock on downlink 1 07:15:21:elinks:INFO: Disabling clock on downlink 2 07:15:21:elinks:INFO: Disabling clock on downlink 3 07:15:21:elinks:INFO: Disabling clock on downlink 4 07:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:15:21:elinks:INFO: Disabling clock on downlink 0 07:15:21:elinks:INFO: Disabling clock on downlink 1 07:15:21:elinks:INFO: Disabling clock on downlink 2 07:15:21:elinks:INFO: Disabling clock on downlink 3 07:15:21:elinks:INFO: Disabling clock on downlink 4 07:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:15:21:elinks:INFO: Disabling clock on downlink 0 07:15:21:elinks:INFO: Disabling clock on downlink 1 07:15:21:elinks:INFO: Disabling clock on downlink 2 07:15:21:elinks:INFO: Disabling clock on downlink 3 07:15:21:elinks:INFO: Disabling clock on downlink 4 07:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:15:21:setup_element:INFO: Scanning clock phase 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:15:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:15:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:15:21:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________XXXXXX____________ Clock Delay: 24 07:15:21:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________XXXXXX____________ Clock Delay: 24 07:15:21:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:15:21:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:15:21:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXX____________ Clock Delay: 25 07:15:21:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXX____________ Clock Delay: 25 07:15:21:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXX____________ Clock Delay: 25 07:15:21:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXX____________ Clock Delay: 25 07:15:21:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 2 07:15:21:setup_element:INFO: Scanning data phases 07:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:15:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:15:26:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:15:26:setup_element:INFO: Eye window for uplink 24: XXXXXXXX_______________________________X Data delay found: 23 07:15:26:setup_element:INFO: Eye window for uplink 25: ___XXXXXXXX_____________________________ Data delay found: 26 07:15:27:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX_________XXXXXXXXXXXXXXXXX Data delay found: 18 07:15:27:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXXX___XXXXXXXXXXXXXXXXX Data delay found: 5 07:15:27:setup_element:INFO: Eye window for uplink 28: __________XXXXXXX_______________________ Data delay found: 33 07:15:27:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXX___________________ Data delay found: 36 07:15:27:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXX__XXXXXXXXXXXXXXXXX Data delay found: 6 07:15:27:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX__XXXXXXXXXXXXXXXXX Data delay found: 7 07:15:27:setup_element:INFO: Setting the data phase to 23 for uplink 24 07:15:27:setup_element:INFO: Setting the data phase to 26 for uplink 25 07:15:27:setup_element:INFO: Setting the data phase to 18 for uplink 26 07:15:27:setup_element:INFO: Setting the data phase to 5 for uplink 27 07:15:27:setup_element:INFO: Setting the data phase to 33 for uplink 28 07:15:27:setup_element:INFO: Setting the data phase to 36 for uplink 29 07:15:27:setup_element:INFO: Setting the data phase to 6 for uplink 30 07:15:27:setup_element:INFO: Setting the data phase to 7 for uplink 31 07:15:27:setup_element:INFO: Beginning SMX ASICs map scan 07:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:15:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:15:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:15:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:15:27:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 07:15:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:15:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:15:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:15:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:15:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:15:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:15:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:15:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:15:29:setup_element:INFO: Performing Elink synchronization 07:15:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:15:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:15:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:15:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:15:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:15:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:15:30:febtest:INFO: Init all SMX (CSA): 30 07:15:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:15:37:febtest:INFO: 30-01 | XA-000-08-003-000-002-209-15 | 37.7 | 1159.7 07:15:37:febtest:INFO: 28-03 | XA-000-08-003-000-002-202-08 | 40.9 | 1141.9 07:15:37:febtest:INFO: 26-05 | XA-000-08-003-000-002-205-08 | 40.9 | 1141.9 07:15:37:febtest:INFO: 24-07 | XA-000-08-003-000-001-092-11 | 47.3 | 1118.1 07:15:38:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:15:40:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV 07:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:40:ST3_smx:INFO: Electrons 07:15:40:ST3_smx:INFO: # loops 0 07:15:42:ST3_smx:INFO: # loops 1 07:15:43:ST3_smx:INFO: # loops 2 07:15:45:ST3_smx:INFO: Total # of broken channels: 0 07:15:45:ST3_smx:INFO: List of broken channels: [] 07:15:45:ST3_smx:INFO: Total # of broken channels: 0 07:15:45:ST3_smx:INFO: List of broken channels: [] 07:15:46:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV 07:15:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:46:ST3_smx:INFO: Electrons 07:15:46:ST3_smx:INFO: # loops 0 07:15:48:ST3_smx:INFO: # loops 1 07:15:50:ST3_smx:INFO: # loops 2 07:15:51:ST3_smx:INFO: Total # of broken channels: 0 07:15:51:ST3_smx:INFO: List of broken channels: [] 07:15:51:ST3_smx:INFO: Total # of broken channels: 0 07:15:51:ST3_smx:INFO: List of broken channels: [] 07:15:53:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV 07:15:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:53:ST3_smx:INFO: Electrons 07:15:53:ST3_smx:INFO: # loops 0 07:15:54:ST3_smx:INFO: # loops 1 07:15:56:ST3_smx:INFO: # loops 2 07:15:58:ST3_smx:INFO: Total # of broken channels: 0 07:15:58:ST3_smx:INFO: List of broken channels: [] 07:15:58:ST3_smx:INFO: Total # of broken channels: 0 07:15:58:ST3_smx:INFO: List of broken channels: [] 07:15:59:ST3_smx:INFO: chip: 24-7 47.250730 C 1124.048640 mV 07:15:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:15:59:ST3_smx:INFO: Electrons 07:15:59:ST3_smx:INFO: # loops 0 07:16:01:ST3_smx:INFO: # loops 1 07:16:02:ST3_smx:INFO: # loops 2 07:16:04:ST3_smx:INFO: Total # of broken channels: 0 07:16:04:ST3_smx:INFO: List of broken channels: [] 07:16:04:ST3_smx:INFO: Total # of broken channels: 0 07:16:04:ST3_smx:INFO: List of broken channels: [] 07:16:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:16:04:febtest:INFO: 30-01 | XA-000-08-003-000-002-209-15 | 37.7 | 1189.2 07:16:05:febtest:INFO: 28-03 | XA-000-08-003-000-002-202-08 | 40.9 | 1177.4 07:16:05:febtest:INFO: 26-05 | XA-000-08-003-000-002-205-08 | 40.9 | 1177.4 07:16:05:febtest:INFO: 24-07 | XA-000-08-003-000-001-092-11 | 50.4 | 1141.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_10-07_15_19 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4045| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '0.7694', '1.850', '1.3790'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.2400'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9904', '1.850', '0.2690']