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FEB_4045 11.07.24 11:21:38
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11:21:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:38:ST3_Shared:INFO: FEB-Microcable
11:21:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:21:38:febtest:INFO: Testing FEB with SN 4045
11:21:39:smx_tester:INFO: Scanning setup
11:21:39:elinks:INFO: Disabling clock on downlink 0
11:21:39:elinks:INFO: Disabling clock on downlink 1
11:21:39:elinks:INFO: Disabling clock on downlink 2
11:21:39:elinks:INFO: Disabling clock on downlink 3
11:21:39:elinks:INFO: Disabling clock on downlink 4
11:21:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:21:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:39:elinks:INFO: Disabling clock on downlink 0
11:21:39:elinks:INFO: Disabling clock on downlink 1
11:21:39:elinks:INFO: Disabling clock on downlink 2
11:21:39:elinks:INFO: Disabling clock on downlink 3
11:21:39:elinks:INFO: Disabling clock on downlink 4
11:21:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:21:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:40:elinks:INFO: Disabling clock on downlink 0
11:21:40:elinks:INFO: Disabling clock on downlink 1
11:21:40:elinks:INFO: Disabling clock on downlink 2
11:21:40:elinks:INFO: Disabling clock on downlink 3
11:21:40:elinks:INFO: Disabling clock on downlink 4
11:21:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:21:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:21:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:40:elinks:INFO: Disabling clock on downlink 0
11:21:40:elinks:INFO: Disabling clock on downlink 1
11:21:40:elinks:INFO: Disabling clock on downlink 2
11:21:40:elinks:INFO: Disabling clock on downlink 3
11:21:40:elinks:INFO: Disabling clock on downlink 4
11:21:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:21:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:40:elinks:INFO: Disabling clock on downlink 0
11:21:40:elinks:INFO: Disabling clock on downlink 1
11:21:40:elinks:INFO: Disabling clock on downlink 2
11:21:40:elinks:INFO: Disabling clock on downlink 3
11:21:40:elinks:INFO: Disabling clock on downlink 4
11:21:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:21:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:21:40:setup_element:INFO: Scanning clock phase
11:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:21:40:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:21:40:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXXX________
Clock Delay: 28
11:21:40:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXXX________
Clock Delay: 28
11:21:40:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
11:21:40:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
11:21:40:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
11:21:40:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
11:21:40:setup_element:INFO: Scanning data phases
11:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:21:45:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:21:45:setup_element:INFO: Eye window for uplink 16: XX________________________________XXXXXX
Data delay found: 17
11:21:45:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXXXX__
Data delay found: 14
11:21:45:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
11:21:45:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXXX
Data delay found: 17
11:21:45:setup_element:INFO: Eye window for uplink 20: XXXX_______________________________XXXXX
Data delay found: 19
11:21:45:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXXX
Data delay found: 17
11:21:45:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
11:21:45:setup_element:INFO: Eye window for uplink 23: XXXXXX___________________________XXXXXXX
Data delay found: 19
11:21:45:setup_element:INFO: Eye window for uplink 24: XXXXXX____________________________X_XXXX
Data delay found: 19
11:21:45:setup_element:INFO: Eye window for uplink 25: XXXXXXXXX______________________________X
Data delay found: 23
11:21:45:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
11:21:45:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________
Data delay found: 33
11:21:45:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXX______________________
Data delay found: 33
11:21:46:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
11:21:46:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXX__________________
Data delay found: 38
11:21:46:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
11:21:46:setup_element:INFO: Setting the data phase to 17 for uplink 16
11:21:46:setup_element:INFO: Setting the data phase to 14 for uplink 17
11:21:46:setup_element:INFO: Setting the data phase to 19 for uplink 18
11:21:46:setup_element:INFO: Setting the data phase to 17 for uplink 19
11:21:46:setup_element:INFO: Setting the data phase to 19 for uplink 20
11:21:46:setup_element:INFO: Setting the data phase to 17 for uplink 21
11:21:46:setup_element:INFO: Setting the data phase to 20 for uplink 22
11:21:46:setup_element:INFO: Setting the data phase to 19 for uplink 23
11:21:46:setup_element:INFO: Setting the data phase to 19 for uplink 24
11:21:46:setup_element:INFO: Setting the data phase to 23 for uplink 25
11:21:46:setup_element:INFO: Setting the data phase to 29 for uplink 26
11:21:46:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:21:46:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:21:46:setup_element:INFO: Setting the data phase to 36 for uplink 29
11:21:46:setup_element:INFO: Setting the data phase to 38 for uplink 30
11:21:46:setup_element:INFO: Setting the data phase to 38 for uplink 31
11:21:46:setup_element:INFO: Beginning SMX ASICs map scan
11:21:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:21:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:21:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:21:46:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:21:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:21:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:21:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:21:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:21:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:21:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:21:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:21:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:21:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:21:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:21:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:21:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:21:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:21:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:21:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:21:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:21:48:setup_element:INFO: Performing Elink synchronization
11:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:21:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:21:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:21:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:21:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:21:48:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:21:49:febtest:INFO: Init all SMX (CSA): 30
11:22:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:07:febtest:INFO: 23-00 | XA-000-08-003-000-002-201-08 | 50.4 | 1124.0
11:22:07:febtest:INFO: 30-01 | XA-000-08-003-000-002-209-15 | 44.1 | 1153.7
11:22:07:febtest:INFO: 21-02 | XA-000-08-003-000-002-208-15 | 44.1 | 1147.8
11:22:07:febtest:INFO: 28-03 | XA-000-08-003-000-002-202-08 | 47.3 | 1135.9
11:22:07:febtest:INFO: 19-04 | XA-000-08-003-000-002-204-08 | 44.1 | 1147.8
11:22:08:febtest:INFO: 26-05 | XA-000-08-003-000-002-205-08 | 44.1 | 1135.9
11:22:08:febtest:INFO: 17-06 | XA-000-08-003-000-002-200-08 | 44.1 | 1147.8
11:22:08:febtest:INFO: 24-07 | XA-000-08-003-000-001-092-11 | 53.6 | 1112.1
11:22:09:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:22:11:ST3_smx:INFO: chip: 23-0 50.430383 C 1135.937260 mV
11:22:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:11:ST3_smx:INFO: Electrons
11:22:11:ST3_smx:INFO: # loops 0
11:22:13:ST3_smx:INFO: # loops 1
11:22:15:ST3_smx:INFO: # loops 2
11:22:17:ST3_smx:INFO: Total # of broken channels: 0
11:22:17:ST3_smx:INFO: List of broken channels: []
11:22:17:ST3_smx:INFO: Total # of broken channels: 0
11:22:17:ST3_smx:INFO: List of broken channels: []
11:22:19:ST3_smx:INFO: chip: 30-1 44.073563 C 1165.571835 mV
11:22:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:19:ST3_smx:INFO: Electrons
11:22:19:ST3_smx:INFO: # loops 0
11:22:21:ST3_smx:INFO: # loops 1
11:22:23:ST3_smx:INFO: # loops 2
11:22:24:ST3_smx:INFO: Total # of broken channels: 0
11:22:24:ST3_smx:INFO: List of broken channels: []
11:22:24:ST3_smx:INFO: Total # of broken channels: 0
11:22:24:ST3_smx:INFO: List of broken channels: []
11:22:26:ST3_smx:INFO: chip: 21-2 44.073563 C 1159.654860 mV
11:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:26:ST3_smx:INFO: Electrons
11:22:26:ST3_smx:INFO: # loops 0
11:22:28:ST3_smx:INFO: # loops 1
11:22:29:ST3_smx:INFO: # loops 2
11:22:31:ST3_smx:INFO: Total # of broken channels: 0
11:22:31:ST3_smx:INFO: List of broken channels: []
11:22:31:ST3_smx:INFO: Total # of broken channels: 0
11:22:31:ST3_smx:INFO: List of broken channels: []
11:22:33:ST3_smx:INFO: chip: 28-3 50.430383 C 1147.806000 mV
11:22:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:33:ST3_smx:INFO: Electrons
11:22:33:ST3_smx:INFO: # loops 0
11:22:34:ST3_smx:INFO: # loops 1
11:22:36:ST3_smx:INFO: # loops 2
11:22:38:ST3_smx:INFO: Total # of broken channels: 0
11:22:38:ST3_smx:INFO: List of broken channels: []
11:22:38:ST3_smx:INFO: Total # of broken channels: 0
11:22:38:ST3_smx:INFO: List of broken channels: []
11:22:40:ST3_smx:INFO: chip: 19-4 47.250730 C 1159.654860 mV
11:22:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:40:ST3_smx:INFO: Electrons
11:22:40:ST3_smx:INFO: # loops 0
11:22:41:ST3_smx:INFO: # loops 1
11:22:43:ST3_smx:INFO: # loops 2
11:22:45:ST3_smx:INFO: Total # of broken channels: 0
11:22:45:ST3_smx:INFO: List of broken channels: []
11:22:45:ST3_smx:INFO: Total # of broken channels: 0
11:22:45:ST3_smx:INFO: List of broken channels: []
11:22:46:ST3_smx:INFO: chip: 26-5 47.250730 C 1147.806000 mV
11:22:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:46:ST3_smx:INFO: Electrons
11:22:46:ST3_smx:INFO: # loops 0
11:22:48:ST3_smx:INFO: # loops 1
11:22:50:ST3_smx:INFO: # loops 2
11:22:51:ST3_smx:INFO: Total # of broken channels: 0
11:22:51:ST3_smx:INFO: List of broken channels: []
11:22:51:ST3_smx:INFO: Total # of broken channels: 0
11:22:51:ST3_smx:INFO: List of broken channels: []
11:22:53:ST3_smx:INFO: chip: 17-6 44.073563 C 1153.732915 mV
11:22:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:53:ST3_smx:INFO: Electrons
11:22:53:ST3_smx:INFO: # loops 0
11:22:55:ST3_smx:INFO: # loops 1
11:22:56:ST3_smx:INFO: # loops 2
11:22:58:ST3_smx:INFO: Total # of broken channels: 0
11:22:58:ST3_smx:INFO: List of broken channels: []
11:22:58:ST3_smx:INFO: Total # of broken channels: 0
11:22:58:ST3_smx:INFO: List of broken channels: []
11:23:00:ST3_smx:INFO: chip: 24-7 56.797143 C 1118.096875 mV
11:23:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:00:ST3_smx:INFO: Electrons
11:23:00:ST3_smx:INFO: # loops 0
11:23:01:ST3_smx:INFO: # loops 1
11:23:03:ST3_smx:INFO: # loops 2
11:23:04:ST3_smx:INFO: Total # of broken channels: 0
11:23:04:ST3_smx:INFO: List of broken channels: []
11:23:04:ST3_smx:INFO: Total # of broken channels: 0
11:23:04:ST3_smx:INFO: List of broken channels: []
11:23:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:23:05:febtest:INFO: 23-00 | XA-000-08-003-000-002-201-08 | 53.6 | 1159.7
11:23:05:febtest:INFO: 30-01 | XA-000-08-003-000-002-209-15 | 47.3 | 1189.2
11:23:05:febtest:INFO: 21-02 | XA-000-08-003-000-002-208-15 | 47.3 | 1177.4
11:23:05:febtest:INFO: 28-03 | XA-000-08-003-000-002-202-08 | 50.4 | 1165.6
11:23:06:febtest:INFO: 19-04 | XA-000-08-003-000-002-204-08 | 47.3 | 1177.4
11:23:06:febtest:INFO: 26-05 | XA-000-08-003-000-002-205-08 | 47.3 | 1171.5
11:23:06:febtest:INFO: 17-06 | XA-000-08-003-000-002-200-08 | 47.3 | 1177.4
11:23:06:febtest:INFO: 24-07 | XA-000-08-003-000-001-092-11 | 56.8 | 1135.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_11-11_21_38
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4045| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4660', '1.849', '2.7280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '2.4680']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9570', '1.850', '0.5240']